From 05099149f193cac0c81b0129c17feb78b1a9681a Mon Sep 17 00:00:00 2001 From: Michael Sevakis Date: Sun, 6 Apr 2008 04:34:57 +0000 Subject: Enable nocache sections using the linker. PP5022/4 must use SW_CORELOCK now with shared variables in DRAM (it seems swp(b) is at least partially broken on all PP or I'm doing something very wrong here :\). For core-shared data use SHAREDBSS/DATA_ATTR. NOCACHEBSS/DATA_ATTR is available whether or not single core is forced for static peripheral-DMA buffer allocation without use of the UNCACHED_ADDR macro in code and is likely useful on a non-PP target with a data cache (although not actually enabled in config.h and the .lds's in this commit). git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16981 a1c6a512-1295-4272-9138-f99709370657 --- firmware/export/config.h | 24 +++++++++++++++--------- 1 file changed, 15 insertions(+), 9 deletions(-) (limited to 'firmware/export') diff --git a/firmware/export/config.h b/firmware/export/config.h index cd98fc9dca..a93152b5e7 100644 --- a/firmware/export/config.h +++ b/firmware/export/config.h @@ -457,25 +457,30 @@ and not a special semaphore instruction */ #define CORELOCK_SWAP 2 /* A swap (exchange) instruction */ -/* Dual core support - not yet working on the 1G/2G and 3G iPod */ #if defined(CPU_PP) #define IDLE_STACK_SIZE 0x80 #define IDLE_STACK_WORDS 0x20 +/* Attributes to place data in uncached DRAM */ +/* These are useful beyond dual-core and ultimately beyond PP since they may + * be used for DMA buffers and such without cache maintenence calls. */ +#define NOCACHEBSS_ATTR __attribute__((section(".ncbss"),nocommon)) +#define NOCACHEDATA_ATTR __attribute__((section(".ncdata"),nocommon)) + #if !defined(FORCE_SINGLE_CORE) #define NUM_CORES 2 #define CURRENT_CORE current_core() -/* Use IRAM for variables shared across cores - large memory buffers should - * use UNCACHED_ADDR(a) and be appropriately aligned and padded */ -#define NOCACHEBSS_ATTR IBSS_ATTR -#define NOCACHEDATA_ATTR IDATA_ATTR +/* Attributes for core-shared data in DRAM where IRAM is better used for other + * purposes. */ +#define SHAREDBSS_ATTR NOCACHEBSS_ATTR +#define SHAREDDATA_ATTR NOCACHEDATA_ATTR #define IF_COP(...) __VA_ARGS__ #define IF_COP_VOID(...) __VA_ARGS__ #define IF_COP_CORE(core) core -#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5002 +#ifdef CPU_PP #define CONFIG_CORELOCK SW_CORELOCK /* SWP(B) is broken */ #else #define CONFIG_CORELOCK CORELOCK_SWAP @@ -500,9 +505,10 @@ #ifndef NUM_CORES /* Default to single core */ #define NUM_CORES 1 -#define CURRENT_CORE CPU -#define NOCACHEBSS_ATTR -#define NOCACHEDATA_ATTR +#define CURRENT_CORE CPU +/* Attributes for core-shared data in DRAM - no caching considerations */ +#define SHAREDBSS_ATTR +#define SHAREDDATA_ATTR #define CONFIG_CORELOCK CORELOCK_NONE #define IF_COP(...) -- cgit v1.2.3