From ef572fec523c3064cbec8df3ef7610a2a9b5df54 Mon Sep 17 00:00:00 2001 From: Cástor Muñoz Date: Sun, 31 Jul 2016 03:48:11 +0200 Subject: iPod Nano 2G: use the new USB DesignWare driver Change-Id: I8d1561bf4e239b55617a8d5075457a668e0c312c --- firmware/export/s5l8700.h | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) (limited to 'firmware/export/s5l8700.h') diff --git a/firmware/export/s5l8700.h b/firmware/export/s5l8700.h index 3444919bc3..b559992c6a 100644 --- a/firmware/export/s5l8700.h +++ b/firmware/export/s5l8700.h @@ -788,7 +788,24 @@ /* Synopsys OTG - S5L8701 only */ #define OTGBASE 0x38800000 #define PHYBASE 0x3C400000 -#define SYNOPSYSOTG_CLOCK 0 -#define SYNOPSYSOTG_AHBCFG (GAHBCFG_dma_enable | (GAHBCFG_INT_DMA_BURST_INCR4 << GAHBCFG_hburstlen_bitp) | GAHBCFG_glblintrmsk) + +/* OTG PHY control registers */ +#define OPHYPWR (*((uint32_t volatile*)(PHYBASE + 0x000))) +#define OPHYCLK (*((uint32_t volatile*)(PHYBASE + 0x004))) +#define ORSTCON (*((uint32_t volatile*)(PHYBASE + 0x008))) +#define OPHYUNK3 (*((uint32_t volatile*)(PHYBASE + 0x018))) +#define OPHYUNK1 (*((uint32_t volatile*)(PHYBASE + 0x01c))) +#define OPHYUNK2 (*((uint32_t volatile*)(PHYBASE + 0x044))) + +/* 7 available EPs (0b00000000011101010000000001101011), 6 used */ +#define USB_NUM_ENDPOINTS 6 + +/* Define this if the DWC implemented on this SoC does not support + dedicated FIFOs. */ +#define USB_DW_SHARED_FIFO + +/* Define this if the DWC implemented on this SoC does not support + DMA or you want to disable it. */ +// #define USB_DW_ARCH_SLAVE #endif /* CONFIG_CPU==S5L8701 */ -- cgit v1.2.3