From 82f9056988331572e01231d70fadc64b7ab76c6f Mon Sep 17 00:00:00 2001 From: Daniel Ankers Date: Sun, 4 Mar 2007 20:06:41 +0000 Subject: Dual core support for PP502x players (iPod G4 and later, iriver h10, Sansa - iPod G3 will be coming soon.) This allows threads to be run on either core provided that all communications between the cores is done using uncached memory. There should be no significant change in battery life from doing this. Documentation (on the RockboxKernel wiki page) will follow shortly. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12601 a1c6a512-1295-4272-9138-f99709370657 --- firmware/export/pp5020.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'firmware/export/pp5020.h') diff --git a/firmware/export/pp5020.h b/firmware/export/pp5020.h index 3d205a0ea1..a34f1251c9 100644 --- a/firmware/export/pp5020.h +++ b/firmware/export/pp5020.h @@ -30,6 +30,15 @@ #define PROC_ID_CPU 0x55 #define PROC_ID_COP 0xaa +/* Mailboxes */ +/* Each processor has two mailboxes it can write to and two which + it can read from. We define the first to be for sending messages + and the second for replying to messages */ +#define CPU_MESSAGE (*(volatile unsigned long *)(0x60001000)) +#define COP_MESSAGE (*(volatile unsigned long *)(0x60001004)) +#define CPU_REPLY (*(volatile unsigned long *)(0x60001008)) +#define COP_REPLY (*(volatile unsigned long *)(0x6000100c)) + /* Interrupts */ #define CPU_INT_STAT (*(volatile unsigned long*)(0x64004000)) #define COP_INT_STAT (*(volatile unsigned long*)(0x60004004)) -- cgit v1.2.3