From d3e783b268afd3ef9c96eaefaa0b3af5158b48a0 Mon Sep 17 00:00:00 2001 From: Rafaël Carré Date: Sun, 16 Nov 2008 22:26:50 +0000 Subject: Fix the Sansa AMS SD driver - Make write_sectors() function fail. - Disable interrupts while transferring data and do not yield(), so we are sure the FIFO is not overflowed Note this solution is only temporary since it's not friendly to other threads and confuse kernel tick precision This will be reverted when we will be using DMA to access the SD card, but for now it permits further development - PL180: Rename the MMC_* registers into MCI_*, to not make people believe it is a MMC only controller - Supports non aligned destination buffers when reading - Correct the timeout units which were lamely copied from ata-sd-pp.c and were in milliseconds (note that the timeouts are disabled now) - Higher a bit the stack size - Use the full initialization procedure in the bootloader and the loaded firmware - Use the CCU_IO register only when a SD slot is present - Put some panicf() around to catch problems git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19122 a1c6a512-1295-4272-9138-f99709370657 --- firmware/export/pl180.h | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'firmware/export/pl180.h') diff --git a/firmware/export/pl180.h b/firmware/export/pl180.h index 98993cc244..4c439fb431 100644 --- a/firmware/export/pl180.h +++ b/firmware/export/pl180.h @@ -22,6 +22,8 @@ /* ARM PrimeCell PL180 SD/MMC controller */ /* MCIStatus bits */ + +/* bits 10:0 can be cleared by a write in MCIClear */ #define MCI_CMD_CRC_FAIL (1<<0) #define MCI_DATA_CRC_FAIL (1<<1) #define MCI_CMD_TIMEOUT (1<<2) @@ -33,7 +35,18 @@ #define MCI_DATA_END (1<<8) #define MCI_START_BIT_ERR (1<<9) #define MCI_DATA_BLOCK_END (1<<10) -#define MCI_CMD_ACTIVE (1<<11) +/* bits 21:11 are only cleared by the hardware logic */ +#define MCI_CMD_ACTIVE (1<<11) +#define MCI_TX_ACTIVE (1<<12) +#define MCI_RX_ACTIVE (1<<13) +#define MCI_TX_FIFO_HALF_EMPTY (1<<14) +#define MCI_RX_FIFO_HALF_FULL (1<<15) +#define MCI_TX_FIFO_FULL (1<<16) +#define MCI_RX_FIFO_FULL (1<<17) +#define MCI_TX_FIFO_EMPTY (1<<18) +#define MCI_RX_FIFO_EMPTY (1<<19) +#define MCI_TX_DATA_AVAIL (1<<20) +#define MCI_RX_DATA_AVAIL (1<<21) /* MCIPower bits */ -- cgit v1.2.3