From d462a64a918117991e11dade2d7fa3a28196e07a Mon Sep 17 00:00:00 2001
From: Dave Chapman <dave@dchapman.com>
Date: Sat, 6 Sep 2008 17:50:59 +0000
Subject: Initial commit of iaudio 7 port by Vitja Makarov (FS#9245).  Port is
 at quite an advanced stage, but is troubled by the lack of a reliable NAND
 driver (similar to the Cowon D2 port) and is not yet suitable for
 non-developers.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@18435 a1c6a512-1295-4272-9138-f99709370657
---
 firmware/export/hd66789r.h | 68 ++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 68 insertions(+)
 create mode 100644 firmware/export/hd66789r.h

(limited to 'firmware/export/hd66789r.h')

diff --git a/firmware/export/hd66789r.h b/firmware/export/hd66789r.h
new file mode 100644
index 0000000000..464ddbab4f
--- /dev/null
+++ b/firmware/export/hd66789r.h
@@ -0,0 +1,68 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2008 Vitja Makarov
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#ifndef _HD66789R_H_
+#define _HD66789R_H_
+
+/* HD66789R registers */
+#define R_START_OSC             0x00
+#define R_DRV_OUTPUT_CONTROL    0x01
+#define R_DRV_WAVEFORM_CONTROL  0x02
+#define R_ENTRY_MODE            0x03
+#define R_COMPARE_REG1          0x04
+#define R_COMPARE_REG2          0x05
+
+#define R_DISP_CONTROL1     0x07
+#define R_DISP_CONTROL2     0x08
+#define R_DISP_CONTROL3     0x09
+
+#define R_FRAME_CYCLE_CONTROL 0x0b
+#define R_EXT_DISP_IF_CONTROL 0x0c
+
+#define R_POWER_CONTROL1    0x10
+#define R_POWER_CONTROL2    0x11
+#define R_POWER_CONTROL3    0x12
+#define R_POWER_CONTROL4    0x13
+
+#define R_RAM_ADDR_SET  0x21
+#define R_WRITE_DATA_2_GRAM 0x22
+
+#define R_GAMMA_FINE_ADJ_POS1   0x30
+#define R_GAMMA_FINE_ADJ_POS2   0x31
+#define R_GAMMA_FINE_ADJ_POS3   0x32
+#define R_GAMMA_GRAD_ADJ_POS    0x33
+
+#define R_GAMMA_FINE_ADJ_NEG1   0x34
+#define R_GAMMA_FINE_ADJ_NEG2   0x35
+#define R_GAMMA_FINE_ADJ_NEG3   0x36
+#define R_GAMMA_GRAD_ADJ_NEG    0x37
+
+#define R_GAMMA_AMP_ADJ_RES_POS     0x38
+#define R_GAMMA_AMP_AVG_ADJ_RES_NEG 0x39
+
+#define R_GATE_SCAN_POS         0x40
+#define R_VERT_SCROLL_CONTROL   0x41
+#define R_1ST_SCR_DRV_POS       0x42
+#define R_2ND_SCR_DRV_POS       0x43
+#define R_HORIZ_RAM_ADDR_POS    0x44
+#define R_VERT_RAM_ADDR_POS     0x45
+
+#endif /* _HD66789R_H_ */
-- 
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