From 90a5a8a068f63290ffb4b1d1b017dd8d408321b1 Mon Sep 17 00:00:00 2001
From: Andree Buschmann <AndreeBuschmann@t-online.de>
Date: Fri, 19 Nov 2010 07:17:20 +0000
Subject: Define CACHEALIGN_BITS for missing ARM CPUs for later use.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28619 a1c6a512-1295-4272-9138-f99709370657
---
 firmware/export/as3525v2.h | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'firmware/export/as3525v2.h')

diff --git a/firmware/export/as3525v2.h b/firmware/export/as3525v2.h
index c5c9c0504f..5cff4d6f75 100644
--- a/firmware/export/as3525v2.h
+++ b/firmware/export/as3525v2.h
@@ -26,6 +26,8 @@
 
 /* insert differences here */
 
+#define CACHEALIGN_BITS (5)
+
 #ifndef IRAM_SIZE   /* protect in case the define name changes */
 #   error IRAM_SIZE not defined !
 #endif
-- 
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