From 05099149f193cac0c81b0129c17feb78b1a9681a Mon Sep 17 00:00:00 2001 From: Michael Sevakis Date: Sun, 6 Apr 2008 04:34:57 +0000 Subject: Enable nocache sections using the linker. PP5022/4 must use SW_CORELOCK now with shared variables in DRAM (it seems swp(b) is at least partially broken on all PP or I'm doing something very wrong here :\). For core-shared data use SHAREDBSS/DATA_ATTR. NOCACHEBSS/DATA_ATTR is available whether or not single core is forced for static peripheral-DMA buffer allocation without use of the UNCACHED_ADDR macro in code and is likely useful on a non-PP target with a data cache (although not actually enabled in config.h and the .lds's in this commit). git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16981 a1c6a512-1295-4272-9138-f99709370657 --- firmware/drivers/ata.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'firmware/drivers/ata.c') diff --git a/firmware/drivers/ata.c b/firmware/drivers/ata.c index 681160cf01..57164c4749 100644 --- a/firmware/drivers/ata.c +++ b/firmware/drivers/ata.c @@ -134,7 +134,7 @@ static void ata_lock_unlock(struct ata_lock *l) #define mutex_unlock ata_lock_unlock #endif /* MAX_PHYS_SECTOR_SIZE */ -static struct mutex ata_mtx NOCACHEBSS_ATTR; +static struct mutex ata_mtx SHAREDBSS_ATTR; int ata_device; /* device 0 (master) or 1 (slave) */ int ata_spinup_time = 0; -- cgit v1.2.3