From 58b2e457824dc93916233627b98614409e5f258d Mon Sep 17 00:00:00 2001 From: Aidan MacDonald Date: Thu, 23 Mar 2023 18:16:15 +0000 Subject: Fix unified syntax in ARM inline assembly GCC 4.9 always emits assembly with divided syntax. Setting unified syntax in inline assembly causes the assembler to complain about GCC's generated code, because the directive extends past the scope of the inline asm. Fix this by setting divided mode at the end of the inline assembly block. The assembler directives are hidden behind macros because later versions of GCC won't need this workaround: they can be told to use the unified syntax with -masm-syntax-unified. Change-Id: Ic09e729e5bbb6fd44d08dac348daf6f55c75d7d8 --- firmware/asm/arm/corelock.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'firmware/asm/arm/corelock.c') diff --git a/firmware/asm/arm/corelock.c b/firmware/asm/arm/corelock.c index 07ec77a60e..a60299436f 100644 --- a/firmware/asm/arm/corelock.c +++ b/firmware/asm/arm/corelock.c @@ -61,7 +61,7 @@ int corelock_try_lock(struct corelock *cl) /* Relies on the fact that core IDs are complementary bitmasks (0x55,0xaa) */ asm volatile ( - ".syntax unified \n" + BEGIN_ARM_ASM_SYNTAX_UNIFIED "mov r1, %[id] \n" /* r1 = PROCESSOR_ID */ "ldrb r1, [r1] \n" "strb r1, [%[cl], r1, lsr #7] \n" /* cl->myl[core] = core */ @@ -74,6 +74,7 @@ int corelock_try_lock(struct corelock *cl) "ands %[rv], %[rv], r1 \n" "strbeq %[rv], [%[cl], r1, lsr #7] \n" /* if not, cl->myl[core] = 0 */ "1: \n" /* Done */ + END_ARM_ASM_SYNTAX_UNIFIED : [rv] "=r"(rval) : [id] "i" (&PROCESSOR_ID), [cl] "r" (cl) : "r1","r2","cc" -- cgit v1.2.3