From 45c7498f59ad2889f2120a865a51043004eddd5d Mon Sep 17 00:00:00 2001 From: Rafaël Carré Date: Fri, 11 Jun 2010 04:41:36 +0000 Subject: FS#11335 by me: make ARM assembly functions thumb-friendly We can't pop into pc on ARMv4t when using thumb: the T bit won't be modified if we are returning to a thumb function Code running on ARMv4t should use the new ldrpc / ldmpc macros instead of ldr pc, [sp], #4 and ldm(cond) sp!, {regs, pc} No modification on pure ARM builds and ARMv5+ Note: USE_THUMB is currently never defined, no targets can currently be built with -mthumb, see FS#6734 git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26756 a1c6a512-1295-4272-9138-f99709370657 --- apps/plugins/mpegplayer/motion_comp_arm_s.S | 32 ++++++++++++++--------------- 1 file changed, 16 insertions(+), 16 deletions(-) (limited to 'apps/plugins/mpegplayer/motion_comp_arm_s.S') diff --git a/apps/plugins/mpegplayer/motion_comp_arm_s.S b/apps/plugins/mpegplayer/motion_comp_arm_s.S index fb29d59e99..49628c6ad5 100644 --- a/apps/plugins/mpegplayer/motion_comp_arm_s.S +++ b/apps/plugins/mpegplayer/motion_comp_arm_s.S @@ -47,7 +47,7 @@ MC_put_o_16_align0: subs r3, r3, #1 add r0, r0, r2 bne MC_put_o_16_align0 - ldmfd sp!, {r4-r7, pc} @@ update PC with LR content. + ldmpc regs=r4-r7 @@ update PC with LR content. .macro ADJ_ALIGN_QW shift, R0, R1, R2, R3, R4 mov \R0, \R0, lsr #(\shift) @@ -71,7 +71,7 @@ MC_put_o_16_align1: subs r3, r3, #1 add r0, r0, r2 bne 1b - ldmfd sp!, {r4-r7, pc} @@ update PC with LR content. + ldmpc regs=r4-r7 @@ update PC with LR content. MC_put_o_16_align2: and r1, r1, #0xFFFFFFFC @@ -83,7 +83,7 @@ MC_put_o_16_align2: subs r3, r3, #1 add r0, r0, r2 bne 1b - ldmfd sp!, {r4-r7, pc} @@ update PC with LR content. + ldmpc regs=r4-r7 @@ update PC with LR content. MC_put_o_16_align3: and r1, r1, #0xFFFFFFFC @@ -95,7 +95,7 @@ MC_put_o_16_align3: subs r3, r3, #1 add r0, r0, r2 bne 1b - ldmfd sp!, {r4-r7, pc} @@ update PC with LR content. + ldmpc regs=r4-r7 @@ update PC with LR content. @ ---------------------------------------------------------------- .align @@ -120,7 +120,7 @@ MC_put_o_8_align0: add r0, r0, r2 subs r3, r3, #1 bne MC_put_o_8_align0 - ldmfd sp!, {r4, r5, pc} @@ update PC with LR content. + ldmpc regs=r4-r5 @@ update PC with LR content. .macro ADJ_ALIGN_DW shift, R0, R1, R2 mov \R0, \R0, lsr #(\shift) @@ -140,7 +140,7 @@ MC_put_o_8_align1: subs r3, r3, #1 add r0, r0, r2 bne 1b - ldmfd sp!, {r4, r5, pc} @@ update PC with LR content. + ldmpc regs=r4-r5 @@ update PC with LR content. MC_put_o_8_align2: and r1, r1, #0xFFFFFFFC @@ -152,7 +152,7 @@ MC_put_o_8_align2: subs r3, r3, #1 add r0, r0, r2 bne 1b - ldmfd sp!, {r4, r5, pc} @@ update PC with LR content. + ldmpc regs=r4-r5 @@ update PC with LR content. MC_put_o_8_align3: and r1, r1, #0xFFFFFFFC @@ -164,7 +164,7 @@ MC_put_o_8_align3: subs r3, r3, #1 add r0, r0, r2 bne 1b - ldmfd sp!, {r4, r5, pc} @@ update PC with LR content. + ldmpc regs=r4-r5 @@ update PC with LR content. @ ---------------------------------------------------------------- .macro AVG_PW rW1, rW2 @@ -218,7 +218,7 @@ MC_put_x_16_align0: subs r3, r3, #1 add r0, r0, r2 bne MC_put_x_16_align0 - ldmfd sp!, {r4-r8, HIGH_REGS, pc} @@ update PC with LR content. + ldmpc regs="r4-r8, HIGH_REGS" @@ update PC with LR content. MC_put_x_16_align1: and r1, r1, #0xFFFFFFFC @@ -234,7 +234,7 @@ MC_put_x_16_align1: subs r3, r3, #1 add r0, r0, r2 bne 1b - ldmfd sp!, {r4-r8, HIGH_REGS, pc} @@ update PC with LR content. + ldmpc regs="r4-r8, HIGH_REGS" @@ update PC with LR content. MC_put_x_16_align2: and r1, r1, #0xFFFFFFFC @@ -250,7 +250,7 @@ MC_put_x_16_align2: subs r3, r3, #1 add r0, r0, r2 bne 1b - ldmfd sp!, {r4-r8, HIGH_REGS, pc} @@ update PC with LR content. + ldmpc regs="r4-r8, HIGH_REGS" @@ update PC with LR content. MC_put_x_16_align3: and r1, r1, #0xFFFFFFFC @@ -266,7 +266,7 @@ MC_put_x_16_align3: subs r3, r3, #1 add r0, r0, r2 bne 1b - ldmfd sp!, {r4-r8, HIGH_REGS, pc} @@ update PC with LR content. + ldmpc regs="r4-r8, HIGH_REGS" @@ update PC with LR content. @ ---------------------------------------------------------------- .align @@ -297,7 +297,7 @@ MC_put_x_8_align0: subs r3, r3, #1 add r0, r0, r2 bne MC_put_x_8_align0 - ldmfd sp!, {r4-r6, HIGH_REGS, pc} @@ update PC with LR content. + ldmpc regs="r4-r6, HIGH_REGS" @@ update PC with LR content. MC_put_x_8_align1: and r1, r1, #0xFFFFFFFC @@ -311,7 +311,7 @@ MC_put_x_8_align1: subs r3, r3, #1 add r0, r0, r2 bne 1b - ldmfd sp!, {r4-r6, HIGH_REGS, pc} @@ update PC with LR content. + ldmpc regs="r4-r6, HIGH_REGS" @@ update PC with LR content. MC_put_x_8_align2: and r1, r1, #0xFFFFFFFC @@ -325,7 +325,7 @@ MC_put_x_8_align2: subs r3, r3, #1 add r0, r0, r2 bne 1b - ldmfd sp!, {r4-r6, HIGH_REGS, pc} @@ update PC with LR content. + ldmpc regs="r4-r6, HIGH_REGS" @@ update PC with LR content. MC_put_x_8_align3: and r1, r1, #0xFFFFFFFC @@ -339,4 +339,4 @@ MC_put_x_8_align3: subs r3, r3, #1 add r0, r0, r2 bne 1b - ldmfd sp!, {r4-r6, HIGH_REGS, pc} @@ update PC with LR content. + ldmpc regs="r4-r6, HIGH_REGS @@ update PC with LR content. -- cgit v1.2.3