From e2876ee4e2ff260e616863b2c54004516743e766 Mon Sep 17 00:00:00 2001 From: Michael Sevakis Date: Mon, 5 Jan 2009 00:00:29 +0000 Subject: Gigabeat S: Get timer API working. metronome will work now. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19676 a1c6a512-1295-4272-9138-f99709370657 --- firmware/SOURCES | 3 +- firmware/export/timer.h | 2 +- firmware/target/arm/imx31/gigabeat-s/timer-imx31.c | 112 +++++++++++++++++++++ .../target/arm/imx31/gigabeat-s/timer-target.h | 41 ++++++++ firmware/timer.c | 18 ++-- 5 files changed, 166 insertions(+), 10 deletions(-) create mode 100644 firmware/target/arm/imx31/gigabeat-s/timer-imx31.c create mode 100644 firmware/target/arm/imx31/gigabeat-s/timer-target.h diff --git a/firmware/SOURCES b/firmware/SOURCES index 7cbb3c7c18..c8f824a849 100644 --- a/firmware/SOURCES +++ b/firmware/SOURCES @@ -768,9 +768,10 @@ target/arm/imx31/gigabeat-s/system-imx31.c target/arm/imx31/gigabeat-s/usb-imx31.c target/arm/imx31/gigabeat-s/wmcodec-imx31.c #ifndef BOOTLOADER -target/arm/imx31/gigabeat-s/pcm-imx31.c target/arm/imx31/gigabeat-s/audio-gigabeat-s.c target/arm/imx31/gigabeat-s/fmradio-i2c-gigabeat-s.c +target/arm/imx31/gigabeat-s/pcm-imx31.c +target/arm/imx31/gigabeat-s/timer-imx31.c #endif #endif /* SIMULATOR */ #endif /* GIGABEAT_S */ diff --git a/firmware/export/timer.h b/firmware/export/timer.h index f9aa650071..258ab1767a 100644 --- a/firmware/export/timer.h +++ b/firmware/export/timer.h @@ -34,7 +34,7 @@ #elif CONFIG_CPU == PNX0101 #define TIMER_FREQ 3000000 #elif CONFIG_CPU == S3C2440 || CONFIG_CPU == DM320 || CONFIG_CPU == TCC7801 \ - || defined(CPU_TCC77X) || CONFIG_CPU == AS3525 + || defined(CPU_TCC77X) || CONFIG_CPU == AS3525 || CONFIG_CPU == IMX31L #include "timer-target.h" #elif defined(SIMULATOR) #define TIMER_FREQ 1000000 diff --git a/firmware/target/arm/imx31/gigabeat-s/timer-imx31.c b/firmware/target/arm/imx31/gigabeat-s/timer-imx31.c new file mode 100644 index 0000000000..f32e0e841b --- /dev/null +++ b/firmware/target/arm/imx31/gigabeat-s/timer-imx31.c @@ -0,0 +1,112 @@ +/*************************************************************************** +* __________ __ ___. +* Open \______ \ ____ ____ | | _\_ |__ _______ ___ +* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / +* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < +* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ +* \/ \/ \/ \/ \/ +* $Id$ +* +* Copyright (C) 2007 by Michael Sevakis +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License +* as published by the Free Software Foundation; either version 2 +* of the License, or (at your option) any later version. +* +* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY +* KIND, either express or implied. +* +****************************************************************************/ +#include "config.h" +#include "system.h" +#include "timer.h" +#include "clkctl-imx31.h" +#include "avic-imx31.h" + +static void __attribute__((interrupt("IRQ"))) EPIT2_HANDLER(void) +{ + EPITSR2 = EPITSR_OCIF; /* Clear the pending status */ + + if (pfn_timer != NULL) + pfn_timer(); +} + +static void stop_timer(bool clock_off) +{ + /* Ensure clock gating on (before touching any module registers) */ + imx31_clkctl_module_clock_gating(CG_EPIT2, CGM_ON_ALL); + /* Disable insterrupt */ + avic_disable_int(EPIT2); + /* Clear wakeup mask */ + CLKCTL_WIMR0 &= ~WIM_IPI_INT_EPIT2; + /* Disable counter */ + EPITCR2 &= ~(EPITCR_OCIEN | EPITCR_EN); + /* Clear pending */ + EPITSR2 = EPITSR_OCIF; + + if (clock_off) + { + /* Final stop, not reset; don't clock module any longer */ + imx31_clkctl_module_clock_gating(CG_EPIT2, CGM_OFF); + } +} + +bool _timer_set(long cycles, bool start) +{ + /* Maximum cycle count expressible in the cycles parameter is 2^31-1 + * and the modulus counter is capable of 2^32-1 and as a result there is + * no requirement to use a prescaler > 1. This gives a frequency range of + * ~0.015366822Hz - 66000000Hz. The highest input frequency gives the + * greatest possible accuracy anyway. */ + int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); + + /* Halt timer if running - leave module clock enabled */ + stop_timer(false); + + if (start && pfn_unregister != NULL) + { + pfn_unregister(); + pfn_unregister = NULL; + } + + /* CLKSRC = ipg_clk, + * EPIT output disconnected, + * Enabled in wait mode + * Prescale 1 for 66MHz + * Reload from modulus register, + * Count from load value */ + EPITCR2 = EPITCR_CLKSRC_IPG_CLK | EPITCR_WAITEN | EPITCR_IOVW | + EPITCR_PRESCALER(1-1) | EPITCR_RLD | EPITCR_ENMOD; + EPITLR2 = cycles; + /* Event when counter reaches 0 */ + EPITCMPR2 = 0; + + restore_interrupt(oldstatus); + return true; +} + +bool _timer_register(void) +{ + int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); + + /* Halt timer if running - leave module clock enabled */ + stop_timer(false); + + /* Enable interrupt */ + EPITCR2 |= EPITCR_OCIEN; + avic_enable_int(EPIT2, IRQ, 8, EPIT2_HANDLER); + /* Start timer */ + EPITCR2 |= EPITCR_EN; + + restore_interrupt(oldstatus); + return true; +} + +void _timer_unregister(void) +{ + int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); + /* Halt timer if running - stop module clock */ + stop_timer(true); + restore_interrupt(oldstatus); +} diff --git a/firmware/target/arm/imx31/gigabeat-s/timer-target.h b/firmware/target/arm/imx31/gigabeat-s/timer-target.h new file mode 100644 index 0000000000..92a3ee350d --- /dev/null +++ b/firmware/target/arm/imx31/gigabeat-s/timer-target.h @@ -0,0 +1,41 @@ +/*************************************************************************** +* __________ __ ___. +* Open \______ \ ____ ____ | | _\_ |__ _______ ___ +* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / +* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < +* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ +* \/ \/ \/ \/ \/ +* $Id$ +* +* Copyright (C) 2007 by Michael Sevakis +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License +* as published by the Free Software Foundation; either version 2 +* of the License, or (at your option) any later version. +* +* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY +* KIND, either express or implied. +* +****************************************************************************/ +#ifndef TIMER_TARGET_H +#define TIMER_TARGET_H + +/* timer is based on ipg_clk */ +#define TIMER_FREQ (66000000) + +bool _timer_set(long cycles, bool set); +bool _timer_register(void); +void _timer_unregister(void); + +#define __TIMER_SET(cycles, set) \ + _timer_set(cycles, set) + +#define __TIMER_REGISTER(reg_prio, unregister_callback, cycles, \ + int_prio, timer_callback) \ + _timer_register() + +#define __TIMER_UNREGISTER(...) \ + _timer_unregister() + +#endif /* TIMER_TARGET_H */ diff --git a/firmware/timer.c b/firmware/timer.c index a11cd10b7e..e9f11b6ae7 100644 --- a/firmware/timer.c +++ b/firmware/timer.c @@ -35,6 +35,15 @@ static int base_prescale; static long SHAREDBSS_ATTR cycles_new = 0; #endif +#ifndef __TIMER_SET +/* Define these if not defined by target to make the #else cases compile + * even if the target doesn't have them implemented. */ +#define __TIMER_SET(cycles, set) false +#define __TIMER_REGISTER(reg_prio, unregister_callback, cycles, \ + int_prio, timer_callback) false +#define __TIMER_UNREGISTER(...) +#endif + /* interrupt handler */ #if CONFIG_CPU == SH7034 void IMIA4(void) __attribute__((interrupt_handler)); @@ -245,10 +254,6 @@ static bool timer_set(long cycles, bool start) cycles_new = cycles; return true; -#elif (CONFIG_CPU == IMX31L) - /* TODO */ - (void)cycles; (void)start; - return false; #else return __TIMER_SET(cycles, start); #endif /* CONFIG_CPU */ @@ -319,9 +324,6 @@ bool timer_register(int reg_prio, void (*unregister_callback)(void), CGU_PERI |= CGU_TIMER1_CLOCK_ENABLE; /* enable peripheral */ VIC_INT_ENABLE |= INTERRUPT_TIMER1; return true; -#elif CONFIG_CPU == IMX31L - /* TODO */ - return false; #else return __TIMER_REGISTER(reg_prio, unregister_callback, cycles, int_prio, timer_callback); @@ -359,7 +361,7 @@ void timer_unregister(void) TIMER1_CONTROL &= 0x10; /* disable timer 1 (don't modify bit 4) */ VIC_INT_EN_CLEAR = INTERRUPT_TIMER1; /* disable interrupt */ CGU_PERI &= ~CGU_TIMER1_CLOCK_ENABLE; /* disable peripheral */ -#elif CONFIG_CPU == S3C2440 || CONFIG_CPU == DM320 +#else __TIMER_UNREGISTER(); #endif pfn_timer = NULL; -- cgit v1.2.3