From c0a823e2ab4fb9ceabdd28f0533354b01adfd395 Mon Sep 17 00:00:00 2001 From: Aidan MacDonald Date: Wed, 7 Apr 2021 23:14:35 +0100 Subject: x1000: Trim unused cache functions from the SPL build Change-Id: Ib645d8ff10cfc672de8ac2debaa17d7dd50dfafb --- firmware/target/mips/ingenic_x1000/system-target.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/firmware/target/mips/ingenic_x1000/system-target.h b/firmware/target/mips/ingenic_x1000/system-target.h index a2f0a6ff70..050afcca9e 100644 --- a/firmware/target/mips/ingenic_x1000/system-target.h +++ b/firmware/target/mips/ingenic_x1000/system-target.h @@ -28,6 +28,15 @@ #define CACHEALIGN_BITS 5 #define CACHE_SIZE (16*1024) +#ifdef BOOTLOADER_SPL +/* This saves ~200 bytes in the SPL by allowing -ffunction-sections to split + * up the cache management functions, most of which aren't called by the SPL. + * If they are placed in .icode, then they all end up in one section and the + * linker can't discard the unused functions. + */ +# define MIPS_CACHEFUNC_ATTR +#endif + #include "mmu-mips.h" #include "mipsregs.h" #include "mipsr2-endian.h" -- cgit v1.2.3