From b73d15e9c6175ac48b2280b089a40f0554d15d6f Mon Sep 17 00:00:00 2001 From: Bertrik Sikken Date: Wed, 18 Aug 2010 21:42:03 +0000 Subject: Sansa AMSv2: enable PLLB and use it to generate a more accurate PCM frequency (playback rate error improves from 1.1% to 0.04%) - FS #10906 by me. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27845 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/arm/as3525/clock-target.h | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/firmware/target/arm/as3525/clock-target.h b/firmware/target/arm/as3525/clock-target.h index 1689c59448..7c388ad6c9 100644 --- a/firmware/target/arm/as3525/clock-target.h +++ b/firmware/target/arm/as3525/clock-target.h @@ -73,7 +73,7 @@ #define AS3525_PLLA_FREQ 240000000 #define AS3525_PLLA_SETTING 0x113B -#define AS3525_PLLB_FREQ 192000000 +#define AS3525_PLLB_FREQ 192000000 /* allows 44.1kHz with 0.04% error*/ #define AS3525_PLLB_SETTING 0x155F #define AS3525_FCLK_PREDIV 0 @@ -146,7 +146,14 @@ #endif /* CONFIG_CPU == AS3525v2 */ /* MCLK */ +#if CONFIG_CPU == AS3525v2 +/* on AMSv2 we can enable PLLB for MCLK to increase PCM sample rate accuracy + with no significant impact on battery life */ +#define AS3525_MCLK_SEL AS3525_CLK_PLLB +#else #define AS3525_MCLK_SEL AS3525_CLK_PLLA +#endif /* CONFIG_CPU == AS3525v2 */ + #if (AS3525_MCLK_SEL==AS3525_CLK_PLLA) #define AS3525_MCLK_FREQ AS3525_PLLA_FREQ #elif (AS3525_MCLK_SEL==AS3525_CLK_PLLB) -- cgit v1.2.3