From 8e44d4bdc7c5d3f8afe98ad70e1de533c9df9bbe Mon Sep 17 00:00:00 2001 From: Linus Nielsen Feltzing Date: Fri, 9 Dec 2005 00:42:06 +0000 Subject: H300 max CPU frequency is now back to 124MHz git-svn-id: svn://svn.rockbox.org/rockbox/trunk@8208 a1c6a512-1295-4272-9138-f99709370657 --- firmware/export/system.h | 4 ---- firmware/system.c | 4 ---- 2 files changed, 8 deletions(-) diff --git a/firmware/export/system.h b/firmware/export/system.h index 8ab2ac7174..e4de5889c5 100644 --- a/firmware/export/system.h +++ b/firmware/export/system.h @@ -289,11 +289,7 @@ static inline void invalidate_icache(void) #define CPUFREQ_DEFAULT (CPUFREQ_DEFAULT_MULT * CPU_FREQ) #define CPUFREQ_NORMAL_MULT 4 #define CPUFREQ_NORMAL (CPUFREQ_NORMAL_MULT * CPU_FREQ) -#ifdef IRIVER_H300_SERIES -#define CPUFREQ_MAX_MULT 8 -#else #define CPUFREQ_MAX_MULT 11 -#endif #define CPUFREQ_MAX (CPUFREQ_MAX_MULT * CPU_FREQ) #elif CONFIG_CPU == PP5020 diff --git a/firmware/system.c b/firmware/system.c index a6474549f5..5e8a7cd4d7 100644 --- a/firmware/system.c +++ b/firmware/system.c @@ -599,11 +599,7 @@ void set_cpu_frequency(long frequency) /* Refresh timer for bypass frequency */ PLLCR &= ~1; /* Bypass mode */ timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, false); -#ifdef IRIVER_H300_SERIES - PLLCR = 0x1183e005; -#else PLLCR = 0x11856005; -#endif CSCR0 = 0x00001180; /* Flash: 4 wait states */ CSCR1 = 0x00000980; /* LCD: 2 wait states */ while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked. -- cgit v1.2.3