From 7936649919af1b759fd86a0b1d10f45b96827165 Mon Sep 17 00:00:00 2001 From: Marcin Bukat Date: Tue, 6 Sep 2011 12:39:13 +0000 Subject: rk27xx - disable core_sleep() as it simply hangs when cache is enabled for unknown reason. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30452 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/arm/rk27xx/system-target.h | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/firmware/target/arm/rk27xx/system-target.h b/firmware/target/arm/rk27xx/system-target.h index 7fcf470ced..49f1a281cc 100644 --- a/firmware/target/arm/rk27xx/system-target.h +++ b/firmware/target/arm/rk27xx/system-target.h @@ -31,17 +31,25 @@ static inline void mdelay(unsigned msecs) udelay(1000 * msecs); } -/* this needs more testing */ +/* Datasheet is very cryptic how to use this. + * With cache enabled it simpy hangs here + */ static inline void core_sleep(void) { enable_irq(); - SCU_CPUPD = 0xdeedbabe; + /* SCU_CPUPD = 0xdeedbabe; */ } #define HAVE_CPUCACHE_COMMIT_DISCARD /* deprecated alias */ #define HAVE_CPUCACHE_INVALIDATE +/* Write DCache back to RAM for the given range and remove cache lines + * from DCache afterwards */ +void commit_discard_dcache_range(const void *base, unsigned int size); +/* deprecated alias */ +void invalidate_dcache_range(const void *base, unsigned int size); + #define CPUFREQ_NORMAL 200000000 #define CPUFREQ_MAX 200000000 -- cgit v1.2.3