From 63212628543e4f7e6b2e7a30c8c815231d1d3140 Mon Sep 17 00:00:00 2001 From: Maurus Cuelenaere Date: Fri, 15 Aug 2008 15:52:54 +0000 Subject: Jz4740: get exception handling working git-svn-id: svn://svn.rockbox.org/rockbox/trunk@18287 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/mips/ingenic_jz47xx/crt0.S | 18 ++++++++---- .../target/mips/ingenic_jz47xx/system-jz4740.c | 34 +++++++++++++++++++--- 2 files changed, 42 insertions(+), 10 deletions(-) diff --git a/firmware/target/mips/ingenic_jz47xx/crt0.S b/firmware/target/mips/ingenic_jz47xx/crt0.S index 3d2308a578..b9ffde3b65 100644 --- a/firmware/target/mips/ingenic_jz47xx/crt0.S +++ b/firmware/target/mips/ingenic_jz47xx/crt0.S @@ -135,15 +135,14 @@ except_common_entry: nop nop nop - + .fill 0x20 + .extern _int .extern _exception .global real_exception_handler .type real_exception_handler,@function .set noreorder real_exception_handler: - - addiu sp, -0x80 sw ra, 0(sp) sw fp, 4(sp) @@ -196,8 +195,7 @@ real_exception_handler: and k0, k1 beq zero, k0, _int nop - la k0, _exception - jr k0 + j _exception nop .global _int @@ -261,9 +259,17 @@ _int: .global _exception .type _exception,@function _exception: - move a0, sp + add a0, sp, $0 mfc0 a1, C0_CAUSE # C0_CAUSE of last exception + sll zero, 1 + sll zero, 1 + sll zero, 1 + sll zero, 1 mfc0 a2, C0_EPC # Exception Program Counter + sll zero, 1 + sll zero, 1 + sll zero, 1 + sll zero, 1 la k0, exception_handler jr k0 nop diff --git a/firmware/target/mips/ingenic_jz47xx/system-jz4740.c b/firmware/target/mips/ingenic_jz47xx/system-jz4740.c index e878173abd..25b14106c4 100644 --- a/firmware/target/mips/ingenic_jz47xx/system-jz4740.c +++ b/firmware/target/mips/ingenic_jz47xx/system-jz4740.c @@ -345,9 +345,36 @@ void intr_handler(void) return; } +#define EXC(x,y) if(_cause == (x)) return (y); +static char* parse_exception(unsigned int cause) +{ + unsigned int _cause = cause & M_CauseExcCode; + EXC(EXC_INT, "Interrupt"); + EXC(EXC_MOD, "TLB Modified"); + EXC(EXC_TLBL, "TLB Exception (Load or Ifetch)"); + EXC(EXC_ADEL, "Address Error (Load or Ifetch)"); + EXC(EXC_ADES, "Address Error (Store)"); + EXC(EXC_TLBS, "TLB Exception (Store)"); + EXC(EXC_IBE, "Instruction Bus Error"); + EXC(EXC_DBE, "Data Bus Error"); + EXC(EXC_SYS, "Syscall"); + EXC(EXC_BP, "Breakpoint"); + EXC(EXC_RI, "Reserved Instruction"); + EXC(EXC_CPU, "Coprocessor Unusable"); + EXC(EXC_OV, "Overflow"); + EXC(EXC_TR, "Trap Instruction"); + EXC(EXC_FPE, "Floating Point Exception"); + EXC(EXC_C2E, "COP2 Exception"); + EXC(EXC_MDMX, "MDMX Exception"); + EXC(EXC_WATCH, "Watch Exception"); + EXC(EXC_MCHECK, "Machine Check Exception"); + EXC(EXC_CacheErr, "Cache error caused re-entry to Debug Mode"); + return NULL; +} + void exception_handler(void* stack_ptr, unsigned int cause, unsigned int epc) { - panicf("Exception occurred: [0x%x] at 0x%x (stack at 0x%x)", cause, epc, (unsigned int)stack_ptr); + panicf("Exception occurred: %s [0x%08x] at 0x%08x (stack at 0x%08x)", parse_exception(cause), cause, epc, (unsigned int)stack_ptr); } static const int FR2n[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32}; @@ -559,9 +586,8 @@ void system_main(void) __dcache_writeback_all(); __icache_invalidate_all(); - /* Init interrupt handling */ - ipl = 0; - for(i=0;i