From 3656382f7d302e3ef6c2be16c1527298ab1f29a2 Mon Sep 17 00:00:00 2001 From: Jens Arnold Date: Wed, 10 Sep 2008 23:50:26 +0000 Subject: iPod G4, Color/Photo and Nano audio driver rework: Fix playback after recording (FS #7402). Implement recording gain adjustment. * Fix slightly off Bass/Treble scale. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@18490 a1c6a512-1295-4272-9138-f99709370657 --- firmware/drivers/audio/wm8975.c | 317 ++++++++++++++++++++------------------- firmware/export/wm8975.h | 278 +++++++++++++++++++++++++++++++--- firmware/sound.c | 4 +- firmware/target/arm/pcm-pp.c | 13 +- firmware/target/arm/wmcodec-pp.c | 4 +- 5 files changed, 438 insertions(+), 178 deletions(-) diff --git a/firmware/drivers/audio/wm8975.c b/firmware/drivers/audio/wm8975.c index 13cfab75ba..6809bf823f 100644 --- a/firmware/drivers/audio/wm8975.c +++ b/firmware/drivers/audio/wm8975.c @@ -34,9 +34,6 @@ #include "audiohw.h" #include "i2s.h" -/* use zero crossing to reduce clicks during volume changes */ -#define VOLUME_ZC_WAIT (1<<7) - const struct sound_settings_info audiohw_settings[] = { [SOUND_VOLUME] = {"dB", 0, 1, -74, 6, -25}, [SOUND_BASS] = {"dB", 0, 1, -6, 9, 0}, @@ -45,12 +42,38 @@ const struct sound_settings_info audiohw_settings[] = { [SOUND_CHANNELS] = {"", 0, 1, 0, 5, 0}, [SOUND_STEREO_WIDTH] = {"%", 0, 5, 0, 250, 100}, #ifdef HAVE_RECORDING - [SOUND_LEFT_GAIN] = {"dB", 1, 1,-128, 96, 0}, - [SOUND_RIGHT_GAIN] = {"dB", 1, 1,-128, 96, 0}, - [SOUND_MIC_GAIN] = {"dB", 1, 1,-128, 108, 16}, + [SOUND_LEFT_GAIN] = {"dB", 1, 1, 0, 63, 23}, + [SOUND_RIGHT_GAIN] = {"dB", 1, 1, 0, 63, 23}, + [SOUND_MIC_GAIN] = {"dB", 1, 1, 0, 63, 0}, #endif }; +static unsigned short wm8975_regs[] = +{ + [LINVOL] = LINVOL_LZCEN | 23, /* 0dB */ + [RINVOL] = RINVOL_RIVU | RINVOL_RZCEN | 23, /* 0dB */ + [DAPCTRL] = DAPCTRL_DACMU, + [PWRMGMT1] = PWRMGMT1_VMIDSEL_5K | PWRMGMT1_VREF, + [PWRMGMT2] = PWRMGMT2_DACL | PWRMGMT2_DACR | PWRMGMT2_LOUT1 + | PWRMGMT2_ROUT1 | PWRMGMT2_LOUT2 | PWRMGMT2_ROUT2, +}; + +static void wm8975_write(int reg, unsigned val) +{ + wm8975_regs[reg] = val; + wmcodec_write(reg, val); +} + +static void wm8975_write_and(int reg, unsigned bits) +{ + wm8975_write(reg, wm8975_regs[reg] & bits); +} + +static void wm8975_write_or(int reg, unsigned bits) +{ + wm8975_write(reg, wm8975_regs[reg] | bits); +} + /* convert tenth of dB volume (-730..60) to master volume register value */ int tenthdb2master(int db) { @@ -67,65 +90,83 @@ int tenthdb2master(int db) } } -#define IPOD_PCM_LEVEL 0x65 /* -6dB */ +int sound_val2phys(int setting, int value) +{ + int result; + + switch(setting) + { +#ifdef HAVE_RECORDING + case SOUND_LEFT_GAIN: + case SOUND_RIGHT_GAIN: + result = ((value - 23) * 15) / 2; + break; + case SOUND_MIC_GAIN: + result = ((value - 23) * 15) / 2 + 200; + break; +#endif + default: + result = value; + break; + } + return result; +} -/* Silently enable / disable audio output */ -void audiohw_enable_output(bool enable) +void audiohw_mute(bool mute) { - if (enable) - { - /* reset the I2S controller into known state */ - i2s_reset(); - - /* - * 1. Switch on power supplies. - * By default the WM8750L is in Standby Mode, the DAC is - * digitally muted and the Audio Interface, Line outputs - * and Headphone outputs are all OFF (DACMU = 1 Power - * Management registers 1 and 2 are all zeros). - */ - wmcodec_write(RESET, 0x1ff); /*Reset*/ - wmcodec_write(RESET, 0x0); - - /* 2. Enable Vmid and VREF. */ - wmcodec_write(PWRMGMT1, 0xc0); /*Pwr Mgmt(1)*/ + if (mute) { + /* Set DACMU = 1 to soft-mute the audio DACs. */ + wm8975_write_or(DAPCTRL, DAPCTRL_DACMU); + } else { + /* Set DACMU = 0 to soft-un-mute the audio DACs. */ + wm8975_write_and(DAPCTRL, ~DAPCTRL_DACMU); + } +} - /* From app notes: allow Vref to stabilize to reduce clicks */ - sleep(HZ/4); - - /* 3. Enable DACs as required. */ - wmcodec_write(PWRMGMT2, 0x180); /*Pwr Mgmt(2)*/ - - /* 4. Enable line and / or headphone output buffers as required. */ - wmcodec_write(PWRMGMT2, 0x1f8); /*Pwr Mgmt(2)*/ - - /* BCLKINV=0(Dont invert BCLK) MS=1(Enable Master) LRSWAP=0 LRP=0 */ - /* IWL=00(16 bit) FORMAT=10(I2S format) */ - wmcodec_write(AINTFCE, 0x42); +#define IPOD_PCM_LEVEL 0x65 /* -6dB */ + +void audiohw_preinit(void) +{ + i2s_reset(); + + /* POWER UP SEQUENCE */ + wmcodec_write(RESET, RESET_RESET); + + /* 2. Enable Vmid and VREF, quick startup. */ + wm8975_write(PWRMGMT1, wm8975_regs[PWRMGMT1]); + sleep(HZ/50); + wm8975_regs[PWRMGMT1] &= ~PWRMGMT1_VMIDSEL_MASK; + wm8975_write(PWRMGMT1, wm8975_regs[PWRMGMT1] | PWRMGMT1_VMIDSEL_50K); - /* The iPod can handle multiple frequencies, but fix at 44.1KHz for now */ - audiohw_set_sample_rate(WM8975_44100HZ); + /* 4. Enable DACs, line and headphone output buffers as required. */ + wm8975_write(PWRMGMT2, wm8975_regs[PWRMGMT2]); - /* set the volume to -6dB */ - wmcodec_write(LOUT1VOL, VOLUME_ZC_WAIT | IPOD_PCM_LEVEL); - wmcodec_write(ROUT1VOL, VOLUME_ZC_WAIT | 0x100 | IPOD_PCM_LEVEL); + wmcodec_write(AINTFCE, AINTFCE_MS | AINTFCE_LRP_I2S_RLO + | AINTFCE_IWL_16BIT | AINTFCE_FORMAT_I2S); + + wm8975_write(DAPCTRL, wm8975_regs[DAPCTRL] ); + + audiohw_set_sample_rate(WM8975_44100HZ); - wmcodec_write(LOUTMIX1, 0x150); /* Left out Mix(def) */ - wmcodec_write(LOUTMIX2, 0x50); + /* set the volume to -6dB */ + wmcodec_write(LOUT1VOL, LOUT1VOL_LO1ZC | IPOD_PCM_LEVEL); + wmcodec_write(ROUT1VOL, ROUT1VOL_RO1VU | ROUT1VOL_RO1ZC | IPOD_PCM_LEVEL); + + wmcodec_write(LOUTMIX1, LOUTMIX1_LD2LO| LOUTMIX1_LI2LOVOL(5)); + wmcodec_write(LOUTMIX2, LOUTMIX2_RI2LOVOL(5)); - wmcodec_write(ROUTMIX1, 0x50); /* Right out Mix(def) */ - wmcodec_write(ROUTMIX2, 0x150); + wmcodec_write(ROUTMIX1, ROUTMIX1_LI2ROVOL(5)); + wmcodec_write(ROUTMIX2, ROUTMIX2_RD2RO| ROUTMIX2_RI2ROVOL(5)); - wmcodec_write(MOUTMIX1, 0x0); /* Mono out Mix */ - wmcodec_write(MOUTMIX2, 0x0); - - audiohw_mute(0); - } else { - audiohw_mute(1); - } + wmcodec_write(MOUTMIX1, 0); + wmcodec_write(MOUTMIX2, 0); } +void audiohw_postinit(void) +{ + audiohw_mute(false); +} void audiohw_set_master_vol(int vol_l, int vol_r) @@ -137,163 +178,137 @@ void audiohw_set_master_vol(int vol_l, int vol_r) /* 0101111 == mute (0x2f) */ /* OUT1 */ - wmcodec_write(LOUT1VOL, VOLUME_ZC_WAIT | vol_l); - wmcodec_write(ROUT1VOL, VOLUME_ZC_WAIT | 0x100 | vol_r); + wmcodec_write(LOUT1VOL, LOUT1VOL_LO1ZC | vol_l); + wmcodec_write(ROUT1VOL, ROUT1VOL_RO1VU | ROUT1VOL_RO1ZC | vol_r); } void audiohw_set_lineout_vol(int vol_l, int vol_r) { /* OUT2 */ - wmcodec_write(LOUT2VOL, VOLUME_ZC_WAIT | vol_l); - wmcodec_write(ROUT2VOL, VOLUME_ZC_WAIT | 0x100 | vol_r); + wmcodec_write(LOUT2VOL, LOUT2VOL_LO2ZC | vol_l); + wmcodec_write(ROUT2VOL, ROUT2VOL_RO2VU | ROUT2VOL_RO2ZC | vol_r); } void audiohw_set_bass(int value) { const int regvalues[] = { - 11, 10, 10, 9, 8, 8, 0xf, 6, 6, 5, 4, 4, 3, 2, 1, 0 + 11, 10, 10, 9, 8, 8, 0xf, 6, 6, 5, 4, 4, 3, 2, 2, 1 }; if ((value >= -6) && (value <= 9)) { /* We use linear bass control with 200 Hz cutoff */ - wmcodec_write(BASSCTRL, regvalues[value + 6] | 0x40); + wmcodec_write(BASSCTRL, regvalues[value + 6] | BASSCTRL_BC); } } void audiohw_set_treble(int value) { const int regvalues[] = { - 11, 10, 10, 9, 8, 8, 0xf, 6, 6, 5, 4, 4, 3, 2, 1, 0 + 11, 10, 10, 9, 8, 8, 0xf, 6, 6, 5, 4, 4, 3, 2, 2, 1 }; if ((value >= -6) && (value <= 9)) { /* We use linear treble control with 4 kHz cutoff */ - wmcodec_write(TREBCTRL, regvalues[value + 6] | 0x40); - } -} - -void audiohw_mute(bool mute) -{ - if (mute) - { - /* Set DACMU = 1 to soft-mute the audio DACs. */ - wmcodec_write(DACCTRL, 0x8); - } else { - /* Set DACMU = 0 to soft-un-mute the audio DACs. */ - wmcodec_write(DACCTRL, 0x0); + wmcodec_write(TREBCTRL, regvalues[value + 6] | TREBCTRL_TC); } } /* Nice shutdown of WM8975 codec */ void audiohw_close(void) { - /* 1. Set DACMU = 1 to soft-mute the audio DACs. */ - wmcodec_write(DACCTRL, 0x8); + audiohw_mute(true); /* 2. Disable all output buffers. */ - wmcodec_write(PWRMGMT2, 0x0); /*Pwr Mgmt(2)*/ + wmcodec_write(PWRMGMT2, 0x0); /* 3. Switch off the power supplies. */ - wmcodec_write(PWRMGMT1, 0x0); /*Pwr Mgmt(1)*/ + wmcodec_write(PWRMGMT1, 0x0); } -/* Change the order of the noise shaper, 5th order is recommended above 32kHz */ void audiohw_set_nsorder(int order) { (void)order; } /* Note: Disable output before calling this function */ -void audiohw_set_sample_rate(int sampling_control) { - - wmcodec_write(0x08, sampling_control); - +void audiohw_set_sample_rate(int sampling_control) +{ + wmcodec_write(SAMPCTRL, sampling_control); } +#ifdef HAVE_RECORDING void audiohw_enable_recording(bool source_mic) { - (void)source_mic; - - /* reset the I2S controller into known state */ - i2s_reset(); - - /* - * 1. Switch on power supplies. - * By default the WM8750L is in Standby Mode, the DAC is - * digitally muted and the Audio Interface, Line outputs - * and Headphone outputs are all OFF (DACMU = 1 Power - * Management registers 1 and 2 are all zeros). - */ - wmcodec_write(0x0f, 0x1ff); - wmcodec_write(0x0f, 0x000); - - /* 2. Enable Vmid and VREF. */ - wmcodec_write(0x19, 0xc0); /*Pwr Mgmt(1)*/ - - /* 3. Enable ADCs as required. */ - wmcodec_write(0x19, 0xcc); /*Pwr Mgmt(1)*/ - wmcodec_write(0x1a, 0x180); /*Pwr Mgmt(2)*/ - - /* 4. Enable line and / or headphone output buffers as required. */ - wmcodec_write(0x19, 0xfc); /*Pwr Mgmt(1)*/ + wm8975_regs[PWRMGMT1] |= PWRMGMT1_AINL | PWRMGMT1_AINR + | PWRMGMT1_ADCL | PWRMGMT1_ADCR; + wm8975_write(PWRMGMT1, wm8975_regs[PWRMGMT1]); - /* BCLKINV=0(Dont invert BCLK) MS=1(Enable Master) LRSWAP=0 LRP=0 */ - /* IWL=00(16 bit) FORMAT=10(I2S format) */ - wmcodec_write(0x07, 0x42); + /* NOTE: When switching to digital monitoring we will not want + * the DACs disabled. Also the outputs shouldn't be disabled + * when recording from line in (dock connector) - needs testing. */ + wm8975_regs[PWRMGMT2] &= ~(PWRMGMT2_LOUT1 | PWRMGMT2_ROUT1 + | PWRMGMT2_LOUT2 | PWRMGMT2_ROUT2); + wm8975_write(PWRMGMT2, wm8975_regs[PWRMGMT2]); - /* The iPod can handle multiple frequencies, but fix at 44.1KHz for now */ - audiohw_set_sample_rate(WM8975_44100HZ); - - /* unmute inputs */ - wmcodec_write(0x00, 0x17); /* LINVOL (def 0dB) */ - wmcodec_write(0x01, 0x117); /* RINVOL (def 0dB) */ + wm8975_write_or(LINVOL, LINVOL_LINMUTE); + wm8975_write_or(RINVOL, RINVOL_RINMUTE); - wmcodec_write(0x15, 0x1d7); /* LADCVOL max vol x was ff */ - wmcodec_write(0x16, 0x1d7); /* RADCVOL max vol x was ff */ + wmcodec_write(ADDCTRL3, ADDCTRL3_VROI); if (source_mic) { - /* VSEL=10(def) DATSEL=10 (use right ADC only) */ - wmcodec_write(0x17, 0xc9); /* Additional control(1) */ - - /* VROI=1 (sets output resistance to 40kohms) */ - wmcodec_write(0x1b, 0x40); /* Additional control(3) */ - - /* LINSEL=1 (LINPUT2) LMICBOOST=10 (20dB boost) */ - wmcodec_write(0x20, 0x60); /* ADCL signal path */ - wmcodec_write(0x21, 0x60); /* ADCR signal path */ + wmcodec_write(ADDCTRL1, ADDCTRL1_VSEL_LOWBIAS | ADDCTRL1_DATSEL_RADC + | ADDCTRL1_TOEN); + wmcodec_write(ADCLPATH, 0); + wmcodec_write(ADCRPATH, ADCRPATH_RINSEL_RIN2 | ADCRPATH_RMICBOOST_20dB); } else { - /* VSEL=10(def) DATSEL=00 (left->left, right->right) */ - wmcodec_write(0x17, 0xc1); /* Additional control(1) */ - - /* VROI=1 (sets output resistance to 40kohms) */ - wmcodec_write(0x1b, 0x40); /* Additional control(3) */ - - /* LINSEL=0 (LINPUT1) LMICBOOST=00 (bypass boost) */ - wmcodec_write(0x20, 0x00); /* ADCL signal path */ - /* RINSEL=0 (RINPUT1) RMICBOOST=00 (bypass boost) */ - wmcodec_write(0x21, 0x00); /* ADCR signal path */ + wmcodec_write(ADDCTRL1, ADDCTRL1_VSEL_LOWBIAS | ADDCTRL1_DATSEL_NORMAL + | ADDCTRL1_TOEN); + wmcodec_write(ADCLPATH, ADCLPATH_LINSEL_LIN1 | ADCLPATH_LMICBOOST_OFF); + wmcodec_write(ADCRPATH, ADCRPATH_RINSEL_RIN1 | ADCRPATH_RMICBOOST_OFF); } + wm8975_write_and(LINVOL, ~LINVOL_LINMUTE); + wm8975_write_and(RINVOL, ~RINVOL_RINMUTE); } - -void audiohw_disable_recording(void) { - /* 1. Set DACMU = 1 to soft-mute the audio DACs. */ - wmcodec_write(0x05, 0x8); - /* 2. Disable all output buffers. */ - wmcodec_write(0x1a, 0x0); /*Pwr Mgmt(2)*/ +void audiohw_disable_recording(void) +{ + /* mute inputs */ + wm8975_write_or(LINVOL, LINVOL_LINMUTE); + wm8975_write_or(RINVOL, RINVOL_RINMUTE); - /* 3. Switch off the power supplies. */ - wmcodec_write(0x19, 0x0); /*Pwr Mgmt(1)*/ -} + wmcodec_write(ADDCTRL3, 0); -void audiohw_set_recvol(int left, int right, int type) { + wm8975_regs[PWRMGMT2] |= PWRMGMT2_DACL | PWRMGMT2_DACR + | PWRMGMT2_LOUT1 | PWRMGMT2_ROUT1 + | PWRMGMT2_LOUT2 | PWRMGMT2_ROUT2; + wm8975_write(PWRMGMT2, wm8975_regs[PWRMGMT2]); - (void)left; - (void)right; - (void)type; + wm8975_regs[PWRMGMT1] &= ~(PWRMGMT1_AINL | PWRMGMT1_AINR + | PWRMGMT1_ADCL | PWRMGMT1_ADCR); + wm8975_write(PWRMGMT1, wm8975_regs[PWRMGMT1]); } -void audiohw_set_monitor(bool enable) { +void audiohw_set_recvol(int left, int right, int type) +{ + switch (type) + { + case AUDIO_GAIN_MIC: /* Mic uses right ADC */ + wm8975_regs[RINVOL] &= ~RINVOL_MASK; + wm8975_write_or(RINVOL, left & RINVOL_MASK); + break; + case AUDIO_GAIN_LINEIN: + wm8975_regs[LINVOL] &= ~LINVOL_MASK; + wm8975_write_or(LINVOL, left & LINVOL_MASK); + wm8975_regs[RINVOL] &= ~RINVOL_MASK; + wm8975_write_or(RINVOL, right & RINVOL_MASK); + break; + default: + return; + } +} +void audiohw_set_monitor(bool enable) +{ (void)enable; } +#endif /* HAVE_RECORDING */ diff --git a/firmware/export/wm8975.h b/firmware/export/wm8975.h index 722c4b1965..881e7110bd 100644 --- a/firmware/export/wm8975.h +++ b/firmware/export/wm8975.h @@ -35,26 +35,264 @@ extern void audiohw_set_lineout_vol(int vol_l, int vol_r); extern void audiohw_set_nsorder(int order); extern void audiohw_set_sample_rate(int sampling_control); -/* Register addresses */ -#define LOUT1VOL 0x02 -#define ROUT1VOL 0x03 -#define DACCTRL 0x05 -#define AINTFCE 0x07 -#define BASSCTRL 0x0c -#define TREBCTRL 0x0d -#define RESET 0x0f -#define PWRMGMT1 0x19 -#define PWRMGMT2 0x1a -#define LOUTMIX1 0x22 -#define LOUTMIX2 0x23 -#define ROUTMIX1 0x24 -#define ROUTMIX2 0x25 -#define MOUTMIX1 0x26 -#define MOUTMIX2 0x27 -#define LOUT2VOL 0x28 -#define ROUT2VOL 0x29 - -/* Register settings for the supported samplerates: */ +/* Register addresses and bits */ + +#define LINVOL 0x00 +#define LINVOL_MASK 0x3f +#define LINVOL_LZCEN (1 << 6) +#define LINVOL_LINMUTE (1 << 7) +#define LINVOL_LIVU (1 << 8) + +#define RINVOL 0x01 +#define RINVOL_MASK 0x3f +#define RINVOL_RZCEN (1 << 6) +#define RINVOL_RINMUTE (1 << 7) +#define RINVOL_RIVU (1 << 8) + +#define LOUT1VOL 0x02 +#define LOUT1VOL_MASK 0x7f +#define LOUT1VOL_LO1ZC (1 << 7) +#define LOUT1VOL_LO1VU (1 << 8) + +#define ROUT1VOL 0x03 +#define ROUT1VOL_MASK 0x7f +#define ROUT1VOL_RO1ZC (1 << 7) +#define ROUT1VOL_RO1VU (1 << 8) + +#define DAPCTRL 0x05 /* Digital audio path control */ +#define DAPCTRL_ADCHPD (1 << 0) +#define DAPCTRL_DEEMP_DISABLE (0 << 1) +#define DAPCTRL_DEEMP_32KHz (1 << 1) +#define DAPCTRL_DEEMP_44KHz (2 << 1) +#define DAPCTRL_DEEMP_48KHz (3 << 1) +#define DAPCTRL_DEEMP_MASK (3 << 1) +#define DAPCTRL_DACMU (1 << 3) +#define DAPCTRL_HPOR (1 << 4) +#define DAPCTRL_ADCPOL_NORMAL (0 << 5) +#define DAPCTRL_ADCPOL_LINVERT (1 << 5) +#define DAPCTRL_ADCPOL_RINVERT (2 << 5) +#define DAPCTRL_ADCPOL_LRINVERT (3 << 5) +#define DAPCTRL_ADCPOL_MASK (3 << 5) +#define DAPCTRL_DACDIV2 (1 << 7) +#define DAPCTRL_ADCDIV2 (1 << 8) + +#define AINTFCE 0x07 +#define AINTFCE_FORMAT_MSB_RJUST (0 << 0) +#define AINTFCE_FORMAT_MSB_LJUST (1 << 0) +#define AINTFCE_FORMAT_I2S (2 << 0) +#define AINTFCE_FORMAT_DSP (3 << 0) +#define AINTFCE_FORMAT_MASK (3 << 0) +#define AINTFCE_IWL_16BIT (0 << 2) +#define AINTFCE_IWL_20BIT (1 << 2) +#define AINTFCE_IWL_24BIT (2 << 2) +#define AINTFCE_IWL_32BIT (3 << 2) +#define AINTFCE_IWL_MASK (3 << 2) +#define AINTFCE_LRP_I2S_RLO (0 << 4) +#define AINTFCE_LRP_I2S_RHI (1 << 4) +#define AINTFCE_DSP_MODE_B (0 << 4) +#define AINTFCE_DSP_MODE_A (1 << 4) +#define AINTFCE_LRSWAP (1 << 5) +#define AINTFCE_MS (1 << 6) +#define AINTFCE_BCLKINV (1 << 7) + +#define SAMPCTRL 0x08 +#define SAMPCTRL_USB (1 << 0) +/* Bits 1-5: + * Sample rate setting are device-specific. See datasheet + * for proper settings for the device's clocking */ +#define SAMPCTRL_SR_MASK (0x1f << 1) +#define SAMPCTRL_CLKDIV2 (1 << 6) +#define SAMPCTRL_BCM_OFF (0 << 7) +#define SAMPCTRL_BCM_MCLK_4 (1 << 7) +#define SAMPCTRL_BCM_MCLK_8 (2 << 7) +#define SAMPCTRL_BCM_MCLK_16 (3 << 7) + +#define LDACVOL 0x0a +#define LDACVOL_MASK 0xff +#define LDACVOL_LDVU (1 << 8) + +#define RDACVOL 0x0b +#define RDACVOL_MASK 0xff +#define RDACVOL_RDVU (1 << 8) + +#define BASSCTRL 0x0c +#define BASSCTRL_MASK 0x0f +#define BASSCTRL_BC (1 << 6) +#define BASSCTRL_BB (1 << 7) + +#define TREBCTRL 0x0d +#define TREBCTRL_MASK 0x0f +#define TREBCTRL_TC (1 << 6) + +#define RESET 0x0f +#define RESET_RESET 0x0 + +/* not used atm */ +#define ALC1 0x11 +#define ALC2 0x12 +#define ALC3 0x13 +#define NOISEGATE 0x14 + +#define LADCVOL 0x15 +#define LADCVOL_MASK 0xff +#define LADCVOL_LAVU (1 << 8) + +#define RADCVOL 0x16 +#define RADCVOL_MASK 0xff +#define RADCVOL_RAVU (1 << 8) + +#define ADDCTRL1 0x17 +#define ADDCTRL1_TOEN (1 << 0) +#define ADDCTRL1DACINV (1 << 1) +#define ADDCTRL1_DATSEL_NORMAL (0 << 2) +#define ADDCTRL1_DATSEL_LADC (1 << 2) +#define ADDCTRL1_DATSEL_RADC (2 << 2) +#define ADDCTRL1_DATSEL_SWAPPED (3 << 2) +#define ADDCTRL1_DMONOMIX_STEREO (0 << 4) +#define ADDCTRL1_DMONOMIX_MONOLEFT (1 << 4) +#define ADDCTRL1_DMONOMIX_MONORIGHT (2 << 4) +#define ADDCTRL1_DMONOMIX_MONO (3 << 4) +#define ADDCTRL1_VSEL_HIGHBIAS (0 << 6) +#define ADDCTRL1_VSEL_MEDBIAS (1 << 6) +#define ADDCTRL1_VSEL_LOWBIAS (3 << 6) +#define ADDCTRL1_TSDEN (1 << 8) + +#define ADDCTRL2 0x18 +#define ADDCTRL2_DACOSR (1 << 0) +#define ADDCTRL2_ADCOSR (1 << 1) +#define ADDCTRL2_LRCM (1 << 2) +#define ADDCTRL2_TRI (1 << 3) +#define ADDCTRL2_ROUT2INV (1 << 4) +#define ADDCTRL2_HPSWPOL (1 << 5) +#define ADDCTRL2_HPSWEN (1 << 6) +#define ADDCTRL2_OUT3SW_VREF (0 << 7) +#define ADDCTRL2_OUT3SW_ROUT1 (1 << 7) +#define ADDCTRL2_OUT3SW_MONOOUT (2 << 7) +#define ADDCTRL2_OUT3SW_ROUTMIX (3 << 7) + +#define PWRMGMT1 0x19 +#define PWRMGMT1_DIGENB (1 << 0) +#define PWRMGMT1_MICB (1 << 1) +#define PWRMGMT1_ADCR (1 << 2) +#define PWRMGMT1_ADCL (1 << 3) +#define PWRMGMT1_AINR (1 << 4) +#define PWRMGMT1_AINL (1 << 5) +#define PWRMGMT1_VREF (1 << 6) +#define PWRMGMT1_VMIDSEL_OFF (0 << 7) +#define PWRMGMT1_VMIDSEL_50K (1 << 7) +#define PWRMGMT1_VMIDSEL_500K (2 << 7) +#define PWRMGMT1_VMIDSEL_5K (3 << 7) +#define PWRMGMT1_VMIDSEL_MASK (3 << 7) + +#define PWRMGMT2 0x1a +#define PWRMGMT2_OUT3 (1 << 1) +#define PWRMGMT2_MONO (1 << 2) +#define PWRMGMT2_ROUT2 (1 << 3) +#define PWRMGMT2_LOUT2 (1 << 4) +#define PWRMGMT2_ROUT1 (1 << 5) +#define PWRMGMT2_LOUT1 (1 << 6) +#define PWRMGMT2_DACR (1 << 7) +#define PWRMGMT2_DACL (1 << 8) + +#define ADDCTRL3 0x1b +#define ADDCTRL3_HPFLREN (1 << 5) +#define ADDCTRL3_VROI (1 << 6) +#define ADDCTRL3_ADCLRM_IN (0 << 7) +#define ADDCTRL3_ADCLRM_MCLK (1 << 7) +#define ADDCTRL3_ADCLRM_MCLK_55 (2 << 7) +#define ADDCTRL3_ADCLRM_MCLK_6 (3 << 7) + +#define ADCINMODE 0x1f +#define ADCINMODE_LDCM (1 << 4) +#define ADCINMODE_RDCM (1 << 5) +#define ADCINMODE_MONOMIX_STEREO (0 << 6) +#define ADCINMODE_MONOMIX_LADC (1 << 6) +#define ADCINMODE_MONOMIX_RADC (2 << 6) +#define ADCINMODE_MONOMIX_DIGITAL (3 << 6) +#define ADCINMODE_DS (1 << 8) + +#define ADCLPATH 0x20 +#define ADCLPATH_LMICBOOST_OFF (0 << 4) +#define ADCLPATH_LMICBOOST_13dB (1 << 4) +#define ADCLPATH_LMICBOOST_20dB (2 << 4) +#define ADCLPATH_LMICBOOST_29dB (3 << 4) +#define ADCLPATH_LINSEL_LIN1 (0 << 6) +#define ADCLPATH_LINSEL_LIN2 (1 << 6) +#define ADCLPATH_LINSEL_LIN3 (2 << 6) +#define ADCLPATH_LINSEL_DIFF (3 << 6) + +#define ADCRPATH 0x21 +#define ADCRPATH_RMICBOOST_OFF (0 << 4) +#define ADCRPATH_RMICBOOST_13dB (1 << 4) +#define ADCRPATH_RMICBOOST_20dB (2 << 4) +#define ADCRPATH_RMICBOOST_29dB (3 << 4) +#define ADCRPATH_RINSEL_RIN1 (0 << 6) +#define ADCRPATH_RINSEL_RIN2 (1 << 6) +#define ADCRPATH_RINSEL_RIN3 (2 << 6) +#define ADCRPATH_RINSEL_DIFF (3 << 6) + +#define LOUTMIX1 0x22 +#define LOUTMIX1_LMIXSEL_LIN1 (0 << 0) +#define LOUTMIX1_LMIXSEL_LIN2 (1 << 0) +#define LOUTMIX1_LMIXSEL_LIN3 (2 << 0) +#define LOUTMIX1_LMIXSEL_LADCIN (3 << 0) +#define LOUTMIX1_LMIXSEL_DIFF (4 << 0) +#define LOUTMIX1_LI2LOVOL(x) ((x & 7) << 4) +#define LOUTMIX1_LI2LOVOL_MASK (7 << 4) +#define LOUTMIX1_LI2LO (1 << 7) +#define LOUTMIX1_LD2LO (1 << 8) + +#define LOUTMIX2 0x23 +#define LOUTMIX2_RI2LOVOL(x) ((x & 7) << 4) +#define LOUTMIX2_RI2LOVOL_MASK (7 << 4) +#define LOUTMIX2_RI2LO (1 << 7) +#define LOUTMIX2_RD2LO (1 << 8) + +#define ROUTMIX1 0x24 +#define ROUTMIX1_RMIXSEL_RIN1 (0 << 0) +#define ROUTMIX1_RMIXSEL_RIN2 (1 << 0) +#define ROUTMIX1_RMIXSEL_RIN3 (2 << 0) +#define ROUTMIX1_RMIXSEL_RADCIN (3 << 0) +#define ROUTMIX1_RMIXSEL_DIFF (4 << 0) +#define ROUTMIX1_LI2ROVOL(x) ((x & 7) << 4) +#define ROUTMIX1_LI2ROVOL_MASK (7 << 4) +#define ROUTMIX1_LI2RO (1 << 7) +#define ROUTMIX1_LD2RO (1 << 8) + +#define ROUTMIX2 0x25 +#define ROUTMIX2_RI2ROVOL(x) ((x & 7) << 4) +#define ROUTMIX2_RI2ROVOL_MASK (7 << 4) +#define ROUTMIX2_RI2RO (1 << 7) +#define ROUTMIX2_RD2RO (1 << 8) + +#define MOUTMIX1 0x26 +#define MOUTMIX1_LI2MOVOL(x) ((x & 7) << 4) +#define MOUTMIX1_LI2MOVOL_MASK (7 << 4) +#define MOUTMIX1_LI2MO (1 << 7) +#define MOUTMIX1_LD2MO (1 << 8) + +#define MOUTMIX2 0x27 +#define MOUTMIX2_RI2MOVOL(x) ((x & 7) << 4) +#define MOUTMIX2_RI2MOVOL_MASK (7 << 4) +#define MOUTMIX2_RI2MO (1 << 7) +#define MOUTMIX2_RD2MO (1 << 8) + +#define LOUT2VOL 0x28 +#define LOUT2VOL_MASK 0x7f +#define LOUT2VOL_LO2ZC (1 << 7) +#define LOUT2VOL_LO2VU (1 << 8) + +#define ROUT2VOL 0x29 +#define ROUT2VOL_MASK 0x7f +#define ROUT2VOL_RO2ZC (1 << 7) +#define ROUT2VOL_RO2VU (1 << 8) + +#define MOUTVOL 0x2a +#define MOUTVOL_MASK 0x7f +#define MOUTVOL_MOZC (1 << 7) + + +/* SAMPCTRL values for the supported samplerates: */ #define WM8975_8000HZ 0x4d #define WM8975_12000HZ 0x61 #define WM8975_16000HZ 0x55 diff --git a/firmware/sound.c b/firmware/sound.c index 95c67a1a3c..ab09c7e7bc 100644 --- a/firmware/sound.c +++ b/firmware/sound.c @@ -625,8 +625,8 @@ void sound_set(int setting, int value) sound_set_val(value); } -#if (!defined(HAVE_AS3514) && !defined (HAVE_WM8731) && !defined(HAVE_TSC2100)) \ - || defined(SIMULATOR) +#if (!defined(HAVE_AS3514) && !defined (HAVE_WM8731) && !defined (HAVE_WM8975) \ + && !defined(HAVE_TSC2100)) || defined(SIMULATOR) int sound_val2phys(int setting, int value) { #if CONFIG_CODEC == MAS3587F diff --git a/firmware/target/arm/pcm-pp.c b/firmware/target/arm/pcm-pp.c index 10ac2a1d0c..e98054ab9e 100644 --- a/firmware/target/arm/pcm-pp.c +++ b/firmware/target/arm/pcm-pp.c @@ -365,7 +365,7 @@ void pcm_play_dma_init(void) /* Initialize default register values. */ audiohw_init(); -#if !defined(HAVE_WM8731) && !defined(HAVE_WM8751) +#if !defined(HAVE_WM8731) && !defined(HAVE_WM8751) && !defined(HAVE_WM8975) /* Power on */ audiohw_enable_output(true); /* Unmute the master channel (DAC should be at zero point now). */ @@ -590,6 +590,13 @@ void pcm_rec_dma_start(void *addr, size_t size) void pcm_rec_dma_close(void) { pcm_rec_dma_stop(); + +#if defined(IPOD_COLOR) || defined (IPOD_4G) + /* The usual magic from IPL - I'm guessing this configures the headphone + socket to be input or output - in this case, output. */ + GPIO_SET_BITWISE(GPIOI_OUTPUT_VAL, 0x40); + GPIO_SET_BITWISE(GPIOA_OUTPUT_VAL, 0x04); +#endif } /* pcm_close_recording */ void pcm_rec_dma_init(void) @@ -597,8 +604,8 @@ void pcm_rec_dma_init(void) #if defined(IPOD_COLOR) || defined (IPOD_4G) /* The usual magic from IPL - I'm guessing this configures the headphone socket to be input or output - in this case, input. */ - GPIOI_OUTPUT_VAL &= ~0x40; - GPIOA_OUTPUT_VAL &= ~0x4; + GPIO_CLEAR_BITWISE(GPIOI_OUTPUT_VAL, 0x40); + GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_VAL, 0x04); #endif pcm_rec_dma_stop(); diff --git a/firmware/target/arm/wmcodec-pp.c b/firmware/target/arm/wmcodec-pp.c index efa80f02b2..04cf238ac3 100644 --- a/firmware/target/arm/wmcodec-pp.c +++ b/firmware/target/arm/wmcodec-pp.c @@ -96,13 +96,13 @@ void audiohw_init(void) { #endif /* IPOD_1G2G/3G */ #endif -#if defined(HAVE_WM8731) || defined(HAVE_WM8751) +#if defined(HAVE_WM8731) || defined(HAVE_WM8751) || defined(HAVE_WM8975) audiohw_preinit(); #endif } -#if !defined(HAVE_WM8731) && !defined(HAVE_WM8751) +#if !defined(HAVE_WM8731) && !defined(HAVE_WM8751) && !defined(HAVE_WM8975) void audiohw_postinit(void) { } -- cgit v1.2.3