diff options
Diffstat (limited to 'utils')
-rw-r--r-- | utils/reggen-ng/x1000.reggen | 297 |
1 files changed, 297 insertions, 0 deletions
diff --git a/utils/reggen-ng/x1000.reggen b/utils/reggen-ng/x1000.reggen index 0d971c59f8..4620378c19 100644 --- a/utils/reggen-ng/x1000.reggen +++ b/utils/reggen-ng/x1000.reggen | |||
@@ -190,6 +190,115 @@ node AIC { | |||
190 | 190 | ||
191 | reg I2SDIV 0x30 | 191 | reg I2SDIV 0x30 |
192 | reg DR 0x34 | 192 | reg DR 0x34 |
193 | reg SPENA 0x80 | ||
194 | |||
195 | reg SPCTRL 0x84 { | ||
196 | bit 15 DMA_EN | ||
197 | bit 14 D_TYPE | ||
198 | bit 13 SIGN_N | ||
199 | bit 12 INVALID | ||
200 | bit 11 SFT_RST | ||
201 | bit 10 SPDIF_I2S | ||
202 | bit 1 M_TRIG | ||
203 | bit 0 M_FFUR | ||
204 | } | ||
205 | |||
206 | reg SPSTATE 0x88 { | ||
207 | fld 14 8 FIFO_LEVEL | ||
208 | bit 7 BUSY | ||
209 | bit 1 F_TRIG | ||
210 | bit 0 F_FFUR | ||
211 | } | ||
212 | |||
213 | reg SPCFG1 0x8c { | ||
214 | bit 17 INIT_LEVEL | ||
215 | bit 16 ZERO_VALID | ||
216 | fld 13 12 TRIG | ||
217 | fld 11 8 SRC_NUM | ||
218 | fld 7 4 CH1_NUM | ||
219 | fld 3 0 CH2_NUM | ||
220 | } | ||
221 | |||
222 | reg SPCFG2 0x90 { | ||
223 | fld 29 26 FS | ||
224 | fld 25 22 ORG_FRQ | ||
225 | fld 21 19 SAMPL_WL | ||
226 | bit 18 MAX_WL | ||
227 | fld 17 16 CLK_ACU | ||
228 | fld 15 8 CAT_CODE | ||
229 | fld 7 6 CH_MD | ||
230 | bit 3 PRE | ||
231 | bit 2 COPY_N | ||
232 | bit 1 AUDIO_N | ||
233 | bit 0 CON_PRO | ||
234 | } | ||
235 | |||
236 | reg SPFIFO 0x94 | ||
237 | |||
238 | reg RGADW 0xa4 { | ||
239 | bit 31 ICRST | ||
240 | bit 16 RGWR | ||
241 | fld 14 8 ADDR | ||
242 | fld 7 0 DATA | ||
243 | } | ||
244 | |||
245 | reg RGDATA 0xa8 { | ||
246 | bit 8 IRQ | ||
247 | fld 7 0 DATA | ||
248 | } | ||
249 | } | ||
250 | |||
251 | node PCM { | ||
252 | title "PCM interface controller" | ||
253 | addr 0xb0071000 | ||
254 | |||
255 | reg CTL 0x00 { | ||
256 | bit 9 ERDMA | ||
257 | bit 8 ETDMA | ||
258 | bit 7 LSMP | ||
259 | bit 6 ERPL | ||
260 | bit 5 EREC | ||
261 | bit 4 FLUSH | ||
262 | bit 3 RST | ||
263 | bit 1 CLKEN | ||
264 | bit 0 PCMEN | ||
265 | } | ||
266 | |||
267 | reg CFG 0x04 { | ||
268 | fld 14 13 SLOT | ||
269 | bit 12 ISS | ||
270 | bit 11 OSS | ||
271 | bit 10 IMSBPOS | ||
272 | bit 9 OMSBPOS | ||
273 | fld 8 5 RFTH | ||
274 | fld 4 1 TFTH | ||
275 | bit 0 PCMMOD | ||
276 | } | ||
277 | |||
278 | reg DP 0x08 | ||
279 | |||
280 | reg INTC 0x0c { | ||
281 | bit 3 ETFS | ||
282 | bit 2 ETUR | ||
283 | bit 1 ERFS | ||
284 | bit 0 EROR | ||
285 | } | ||
286 | |||
287 | reg INTS 0x10 { | ||
288 | bit 14 RSTS | ||
289 | fld 13 9 TFL | ||
290 | bit 8 TFS | ||
291 | bit 7 TUR | ||
292 | bit 6 2 RFL | ||
293 | bit 1 RFS | ||
294 | bit 0 ROR | ||
295 | } | ||
296 | |||
297 | reg DIV 0x14 { | ||
298 | fld 16 11 SYNL | ||
299 | fld 10 6 SYNDIV | ||
300 | fld 5 0 CLKDIV | ||
301 | } | ||
193 | } | 302 | } |
194 | 303 | ||
195 | node DDRC { | 304 | node DDRC { |
@@ -851,6 +960,44 @@ node RTC { | |||
851 | reg WKUPPINCR 0x48 | 960 | reg WKUPPINCR 0x48 |
852 | } | 961 | } |
853 | 962 | ||
963 | node EFUSE { | ||
964 | title "EFUSE interface" | ||
965 | instance 0xb3540000 | ||
966 | |||
967 | reg CTRL 0x00 { | ||
968 | fld 27 21 ADDR | ||
969 | fld 20 16 LENGTH | ||
970 | bit 15 PG_EN | ||
971 | bit 1 WR_EN | ||
972 | bit 0 RD_EN | ||
973 | } | ||
974 | |||
975 | reg CFG 0x04 { | ||
976 | bit 31 INT_EN | ||
977 | fld 21 20 RD_AJD | ||
978 | fld 18 16 RD_STROBE | ||
979 | fld 13 12 WR_ADJ | ||
980 | fld 8 0 WR_STROBE | ||
981 | } | ||
982 | |||
983 | reg STATE 0x08 { | ||
984 | bit 23 UK_PRT | ||
985 | bit 22 NKU_PRT | ||
986 | bit 21 EXKEY_EN | ||
987 | bit 15 CUSTID_PRT | ||
988 | bit 14 CHIPID_PRT | ||
989 | bit 12 SECBOOT_PRT | ||
990 | bit 11 DIS_JTAG | ||
991 | bit 8 SECBOOT_EN | ||
992 | bit 1 WR_DONE | ||
993 | bit 0 RD_DONE | ||
994 | } | ||
995 | |||
996 | reg DATA { | ||
997 | instance 0x0c 0x04 8 | ||
998 | } | ||
999 | } | ||
1000 | |||
854 | node GPIO { | 1001 | node GPIO { |
855 | title "General purpose I/O" | 1002 | title "General purpose I/O" |
856 | addr 0xb0010000 | 1003 | addr 0xb0010000 |
@@ -1003,6 +1150,156 @@ node I2C { | |||
1003 | reg CGC 0x68 | 1150 | reg CGC 0x68 |
1004 | } | 1151 | } |
1005 | 1152 | ||
1153 | node SSI { | ||
1154 | title "Synchronous serial interface" | ||
1155 | instance 0xb0043000 | ||
1156 | |||
1157 | reg DR 0x00 | ||
1158 | |||
1159 | reg CR0 0x04 { | ||
1160 | fld 19 18 TENDIAN | ||
1161 | fld 17 16 RENDIAN | ||
1162 | bit 15 SSIE | ||
1163 | bit 14 TIE | ||
1164 | bit 13 RIE | ||
1165 | bit 12 TEIE | ||
1166 | bit 11 REIE | ||
1167 | bit 10 LOOP | ||
1168 | bit 9 RFINE | ||
1169 | bit 8 RFINC | ||
1170 | bit 7 EACLRUN | ||
1171 | bit 6 FSEL | ||
1172 | bit 4 VRCNT | ||
1173 | bit 3 TFMODE | ||
1174 | bit 2 TFLUSH | ||
1175 | bit 1 RFLUSH | ||
1176 | bit 0 DISREV | ||
1177 | } | ||
1178 | |||
1179 | reg CR1 0x08 { | ||
1180 | fld 31 30 FRMHL | ||
1181 | fld 29 28 TFVCK | ||
1182 | fld 27 26 TCKFI | ||
1183 | bit 24 ITFRM | ||
1184 | bit 23 UNFIN | ||
1185 | fld 21 20 FMAT | ||
1186 | fld 19 16 TTRG | ||
1187 | fld 15 12 MCOM | ||
1188 | fld 11 8 RTRG | ||
1189 | fld 7 3 FLEN | ||
1190 | bit 1 PHA | ||
1191 | bit 0 POL | ||
1192 | } | ||
1193 | |||
1194 | reg SR 0x0c { | ||
1195 | fld 24 16 TFIFO_NUM | ||
1196 | fld 15 8 RFIFO_NUM | ||
1197 | bit 7 END | ||
1198 | bit 6 BUSY | ||
1199 | bit 5 TFF | ||
1200 | bit 4 RFE | ||
1201 | bit 3 TFHE | ||
1202 | bit 2 RFHF | ||
1203 | bit 1 UNDR | ||
1204 | bit 0 OVER | ||
1205 | } | ||
1206 | |||
1207 | reg ITR 0x10 { | ||
1208 | bit 15 CNTCLK | ||
1209 | fld 14 0 IVLTM | ||
1210 | } | ||
1211 | |||
1212 | reg ICR 0x14 | ||
1213 | reg GR 0x18 | ||
1214 | reg RCNT 0x1c | ||
1215 | } | ||
1216 | |||
1217 | node UART { | ||
1218 | title "UART controller" | ||
1219 | instance 0xb0030000 0x1000 3 | ||
1220 | |||
1221 | # Note there is some hardware multiplexing controlled by the | ||
1222 | # ULCR register going on here which is why some registers share | ||
1223 | # the same address. | ||
1224 | |||
1225 | reg URBR 0x00 | ||
1226 | reg UTHR 0x00 | ||
1227 | reg UDLLR 0x00 | ||
1228 | reg UDLHR 0x04 | ||
1229 | |||
1230 | reg UIER 0x04 { | ||
1231 | bit 4 RTOIE | ||
1232 | bit 3 MSIE | ||
1233 | bit 2 RLSIE | ||
1234 | bit 1 TDRIE | ||
1235 | bit 0 RDRIE | ||
1236 | } | ||
1237 | |||
1238 | reg UIIR 0x08 { | ||
1239 | fld 7 6 FFMSEL { enum NON_FIFO_MODE 0; enum FIFO_MODE 1; } | ||
1240 | fld 3 1 INID { enum MODEM_STATUS 0; enum TRANSMIT_DATA_REQ 1; enum RECEIVE_DATA_READY 2 | ||
1241 | enum RECEIVE_LINE_STATUS 3; enum RECEIVE_TIME_OUT 6 } | ||
1242 | bit 0 INPEND | ||
1243 | } | ||
1244 | |||
1245 | reg UFCR 0x08 { | ||
1246 | fld 7 6 RDTR { enum 1BYTE 0; enum 16BYTE 1; enum 32BYTE 2; enum 60BYTE 3; } | ||
1247 | bit 4 UME | ||
1248 | bit 3 DME | ||
1249 | bit 2 TFRT | ||
1250 | bit 1 RFRT | ||
1251 | bit 0 FME | ||
1252 | } | ||
1253 | |||
1254 | reg ULCR 0x0c { | ||
1255 | bit 7 DLAB | ||
1256 | bit 6 SBK | ||
1257 | bit 5 STPAR | ||
1258 | bit 4 PARM { enum ODD 0; enum EVEN 1; } | ||
1259 | bit 3 PARE | ||
1260 | bit 2 SBLS { enum 1_STOP_BIT 0; enum 2_STOP_BITS 1; } | ||
1261 | fld 1 0 WLS { enum 5BITS 0; enum 6BITS 1; enum 7BITS 2; enum 8BITS 3; } | ||
1262 | } | ||
1263 | |||
1264 | reg UMCR 0x10 { | ||
1265 | bit 7 MDCE | ||
1266 | bit 6 FCM | ||
1267 | bit 4 LOOP | ||
1268 | bit 1 RTS | ||
1269 | } | ||
1270 | |||
1271 | reg ULSR 0x14 { | ||
1272 | bit 7 FIFOE | ||
1273 | bit 6 TEMP | ||
1274 | bit 5 TDRQ | ||
1275 | bit 4 BI | ||
1276 | bit 3 FMER | ||
1277 | bit 2 PARER | ||
1278 | bit 1 OVER | ||
1279 | bit 0 DRY | ||
1280 | } | ||
1281 | |||
1282 | reg UMSR 0x18 { | ||
1283 | bit 4 CTS | ||
1284 | bit 0 CCTS | ||
1285 | } | ||
1286 | |||
1287 | reg USPR 0x1c | ||
1288 | |||
1289 | reg ISR 0x20 { | ||
1290 | bit 4 RDPL | ||
1291 | bit 3 TDPL | ||
1292 | bit 2 XMODE | ||
1293 | bit 1 RCVEIR | ||
1294 | bit 0 XMITIR | ||
1295 | } | ||
1296 | |||
1297 | reg UMR 0x24 | ||
1298 | reg UACR 0x28 | ||
1299 | reg URCR 0x40 | ||
1300 | reg UTCR 0x44 | ||
1301 | } | ||
1302 | |||
1006 | node MSC { | 1303 | node MSC { |
1007 | title "MMC/SD/CE-ATA controller" | 1304 | title "MMC/SD/CE-ATA controller" |
1008 | instance 0xb3450000 0x10000 2 | 1305 | instance 0xb3450000 0x10000 2 |