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-rw-r--r--utils/regtools/qeditor/std_analysers.cpp429
1 files changed, 227 insertions, 202 deletions
diff --git a/utils/regtools/qeditor/std_analysers.cpp b/utils/regtools/qeditor/std_analysers.cpp
index 0fb2050cf0..05a90f9d5b 100644
--- a/utils/regtools/qeditor/std_analysers.cpp
+++ b/utils/regtools/qeditor/std_analysers.cpp
@@ -19,13 +19,44 @@
19 * 19 *
20 ****************************************************************************/ 20 ****************************************************************************/
21#include "std_analysers.h" 21#include "std_analysers.h"
22#include <QDebug>
23
24/**
25 * AnalyserEx
26 */
27
28AnalyserEx::AnalyserEx(const soc_desc::soc_ref_t& soc, IoBackend *backend)
29 :Analyser(soc, backend), m_helper(backend, soc)
30{
31}
32
33bool AnalyserEx::ReadRegister(const QString& path, soc_word_t& val)
34{
35 return m_helper.ReadRegister(m_helper.ParsePath(path), val);
36}
37
38bool AnalyserEx::ReadRegisterOld(const QString& dev, const QString& reg, soc_word_t& val)
39{
40 return ReadRegister(dev + "." + reg, val);
41}
42
43bool AnalyserEx::ReadField(const QString& path, const QString& field, soc_word_t& val)
44{
45 return m_helper.ReadRegisterField(m_helper.ParsePath(path), field, val);
46}
47
48bool AnalyserEx::ReadFieldOld(const QString& dev, const QString& reg,
49 const QString& field, soc_word_t& val)
50{
51 return ReadField(dev + "." + reg, field, val);
52}
22 53
23/** 54/**
24 * Clock analyser 55 * Clock analyser
25 */ 56 */
26 57
27ClockAnalyser::ClockAnalyser(const SocRef& soc, IoBackend *backend) 58ClockAnalyser::ClockAnalyser(const soc_desc::soc_ref_t& soc, IoBackend *backend)
28 :Analyser(soc, backend) 59 :AnalyserEx(soc, backend)
29{ 60{
30 m_group = new QGroupBox("Clock Analyser"); 61 m_group = new QGroupBox("Clock Analyser");
31 QVBoxLayout *layout = new QVBoxLayout; 62 QVBoxLayout *layout = new QVBoxLayout;
@@ -75,7 +106,8 @@ QString ClockAnalyser::GetFreq(unsigned freq)
75 return QString().sprintf("%d Hz", freq); 106 return QString().sprintf("%d Hz", freq);
76} 107}
77 108
78QTreeWidgetItem *ClockAnalyser::AddClock(QTreeWidgetItem *parent, const QString& name, int freq, int mul, int div) 109QTreeWidgetItem *ClockAnalyser::AddClock(QTreeWidgetItem *parent, const QString& name,
110 int freq, int mul, int div)
79{ 111{
80 if(freq == FROM_PARENT) 112 if(freq == FROM_PARENT)
81 { 113 {
@@ -102,9 +134,9 @@ int ClockAnalyser::GetClockFreq(QTreeWidgetItem *item)
102void ClockAnalyser::FillTree() 134void ClockAnalyser::FillTree()
103{ 135{
104 m_tree_widget->clear(); 136 m_tree_widget->clear();
105 if(m_soc.GetSoc().name == "imx233") FillTreeIMX233(); 137 if(m_soc.get()->name == "imx233") FillTreeIMX233();
106 else if(m_soc.GetSoc().name == "rk27xx") FillTreeRK27XX(); 138 else if(m_soc.get()->name == "rk27xx") FillTreeRK27XX();
107 else if(m_soc.GetSoc().name == "atj213x") FillTreeATJ213X(); 139 else if(m_soc.get()->name == "atj213x") FillTreeATJ213X();
108 m_tree_widget->expandAll(); 140 m_tree_widget->expandAll();
109 m_tree_widget->resizeColumnToContents(0); 141 m_tree_widget->resizeColumnToContents(0);
110} 142}
@@ -113,17 +145,15 @@ void ClockAnalyser::FillTreeATJ213X()
113{ 145{
114 soc_word_t pllbypass, pllclk, en, coreclks, tmp0, tmp1, tmp2, tmp3; 146 soc_word_t pllbypass, pllclk, en, coreclks, tmp0, tmp1, tmp2, tmp3;
115 147
116 BackendHelper helper(m_io_backend, m_soc);
117
118 // system oscillators 32.768k and 24M 148 // system oscillators 32.768k and 24M
119 QTreeWidgetItem *losc_clk = AddClock(0, "losc clk", 32768); 149 QTreeWidgetItem *losc_clk = AddClock(0, "losc clk", 32768);
120 QTreeWidgetItem *hosc_clk = AddClock(0, "hosc clk", 24000000); 150 QTreeWidgetItem *hosc_clk = AddClock(0, "hosc clk", 24000000);
121 151
122 // core pll 152 // core pll
123 QTreeWidgetItem *corepll = 0; 153 QTreeWidgetItem *corepll = 0;
124 if (helper.ReadRegisterField("CMU", "COREPLL", "CPEN", en) && 154 if(ReadFieldOld("CMU", "COREPLL", "CPEN", en) &&
125 helper.ReadRegisterField("CMU", "COREPLL", "CPBY", pllbypass) && 155 ReadFieldOld("CMU", "COREPLL", "CPBY", pllbypass) &&
126 helper.ReadRegisterField("CMU", "COREPLL", "CPCK", pllclk)) 156 ReadFieldOld("CMU", "COREPLL", "CPCK", pllclk))
127 { 157 {
128 corepll = AddClock(hosc_clk, "core pll", en ? FROM_PARENT : DISABLED, 158 corepll = AddClock(hosc_clk, "core pll", en ? FROM_PARENT : DISABLED,
129 pllbypass ? 1 : pllclk, pllbypass ? 1 : 4); 159 pllbypass ? 1 : pllclk, pllbypass ? 1 : 4);
@@ -135,8 +165,8 @@ void ClockAnalyser::FillTreeATJ213X()
135 165
136 // dsp pll 166 // dsp pll
137 QTreeWidgetItem *dsppll = 0; 167 QTreeWidgetItem *dsppll = 0;
138 if (helper.ReadRegisterField("CMU", "DSPPLL", "DPEN", en) && 168 if(ReadFieldOld("CMU", "DSPPLL", "DPEN", en) &&
139 helper.ReadRegisterField("CMU", "DSPPLL", "DPCK", pllclk)) 169 ReadFieldOld("CMU", "DSPPLL", "DPCK", pllclk))
140 { 170 {
141 dsppll = AddClock(hosc_clk, "dsp pll", en ? FROM_PARENT : DISABLED, 171 dsppll = AddClock(hosc_clk, "dsp pll", en ? FROM_PARENT : DISABLED,
142 pllbypass ? 1 : pllclk, pllbypass ? 1 : 4); 172 pllbypass ? 1 : pllclk, pllbypass ? 1 : 4);
@@ -149,11 +179,11 @@ void ClockAnalyser::FillTreeATJ213X()
149 // audio pll 179 // audio pll
150 QTreeWidgetItem *adcpll = 0; 180 QTreeWidgetItem *adcpll = 0;
151 QTreeWidgetItem *dacpll = 0; 181 QTreeWidgetItem *dacpll = 0;
152 if (helper.ReadRegisterField("CMU", "AUDIOPLL", "APEN", en) && 182 if(ReadFieldOld("CMU", "AUDIOPLL", "APEN", en) &&
153 helper.ReadRegisterField("CMU", "AUDIOPLL", "ADCCLK", tmp0) && 183 ReadFieldOld("CMU", "AUDIOPLL", "ADCCLK", tmp0) &&
154 helper.ReadRegisterField("CMU", "AUDIOPLL", "DACCLK", tmp1)) 184 ReadFieldOld("CMU", "AUDIOPLL", "DACCLK", tmp1))
155 { 185 {
156 if (en) 186 if(en)
157 { 187 {
158 adcpll = AddClock(hosc_clk, "audio adc pll", tmp0 ? 22579200 : 24576000); 188 adcpll = AddClock(hosc_clk, "audio adc pll", tmp0 ? 22579200 : 24576000);
159 dacpll = AddClock(hosc_clk, "audio dac pll", tmp1 ? 22579200 : 24576000); 189 dacpll = AddClock(hosc_clk, "audio dac pll", tmp1 ? 22579200 : 24576000);
@@ -173,8 +203,8 @@ void ClockAnalyser::FillTreeATJ213X()
173 // audio clocks 203 // audio clocks
174 QTreeWidgetItem *adcclk = 0; 204 QTreeWidgetItem *adcclk = 0;
175 QTreeWidgetItem *dacclk = 0; 205 QTreeWidgetItem *dacclk = 0;
176 if (helper.ReadRegisterField("CMU", "AUDIOPLL", "ADCCLK", tmp0) && 206 if(ReadFieldOld("CMU", "AUDIOPLL", "ADCCLK", tmp0) &&
177 helper.ReadRegisterField("CMU", "AUDIOPLL", "DACCLK", tmp1)) 207 ReadFieldOld("CMU", "AUDIOPLL", "DACCLK", tmp1))
178 { 208 {
179 adcclk = AddClock(adcpll, "audio adc clk", FROM_PARENT, 1, tmp0+1); 209 adcclk = AddClock(adcpll, "audio adc clk", FROM_PARENT, 1, tmp0+1);
180 dacclk = AddClock(dacpll, "audio dac clk", FROM_PARENT, 1, tmp1+1); 210 dacclk = AddClock(dacpll, "audio dac clk", FROM_PARENT, 1, tmp1+1);
@@ -187,14 +217,14 @@ void ClockAnalyser::FillTreeATJ213X()
187 217
188 // cpu clock 218 // cpu clock
189 QTreeWidgetItem *cpuclk = 0; 219 QTreeWidgetItem *cpuclk = 0;
190 if (helper.ReadRegisterField("CMU", "BUSCLK", "CORECLKS", coreclks) && 220 if(ReadFieldOld("CMU", "BUSCLK", "CORECLKS", coreclks) &&
191 helper.ReadRegisterField("CMU", "BUSCLK", "CCLKDIV", tmp0)) 221 ReadFieldOld("CMU", "BUSCLK", "CCLKDIV", tmp0))
192 { 222 {
193 if (coreclks == 0) 223 if(coreclks == 0)
194 cpuclk = AddClock(losc_clk, "cpu clk", FROM_PARENT, 1, tmp0+1); 224 cpuclk = AddClock(losc_clk, "cpu clk", FROM_PARENT, 1, tmp0+1);
195 else if (coreclks == 1) 225 else if(coreclks == 1)
196 cpuclk = AddClock(hosc_clk, "cpu clk", FROM_PARENT, 1, tmp0+1); 226 cpuclk = AddClock(hosc_clk, "cpu clk", FROM_PARENT, 1, tmp0+1);
197 else if (coreclks == 2) 227 else if(coreclks == 2)
198 cpuclk = AddClock(corepll, "cpu clk", FROM_PARENT, 1, tmp0+1); 228 cpuclk = AddClock(corepll, "cpu clk", FROM_PARENT, 1, tmp0+1);
199 else 229 else
200 cpuclk = AddClock(corepll, "cpu clk", INVALID); 230 cpuclk = AddClock(corepll, "cpu clk", INVALID);
@@ -206,24 +236,24 @@ void ClockAnalyser::FillTreeATJ213X()
206 236
207 // system clock 237 // system clock
208 QTreeWidgetItem *sysclk = 0; 238 QTreeWidgetItem *sysclk = 0;
209 if (helper.ReadRegisterField("CMU", "BUSCLK", "SCLKDIV", tmp0)) 239 if(ReadFieldOld("CMU", "BUSCLK", "SCLKDIV", tmp0))
210 sysclk = AddClock(cpuclk, "system clk", FROM_PARENT, 1, tmp0+1); 240 sysclk = AddClock(cpuclk, "system clk", FROM_PARENT, 1, tmp0+1);
211 else 241 else
212 sysclk = AddClock(cpuclk, "system clk", INVALID); 242 sysclk = AddClock(cpuclk, "system clk", INVALID);
213 243
214 // peripherial clk 244 // peripherial clk
215 QTreeWidgetItem *pclk = 0; 245 QTreeWidgetItem *pclk = 0;
216 if (helper.ReadRegisterField("CMU", "BUSCLK", "PCLKDIV", tmp0)) 246 if(ReadFieldOld("CMU", "BUSCLK", "PCLKDIV", tmp0))
217 pclk = AddClock(sysclk, "peripherial clk", FROM_PARENT, 1, tmp0 ? tmp0+1 : 2); 247 pclk = AddClock(sysclk, "peripherial clk", FROM_PARENT, 1, tmp0 ? tmp0+1 : 2);
218 else 248 else
219 pclk = AddClock(sysclk, "peripherial clk", INVALID); 249 pclk = AddClock(sysclk, "peripherial clk", INVALID);
220 250
221 // sdram clk 251 // sdram clk
222 QTreeWidgetItem *sdrclk = 0; 252 QTreeWidgetItem *sdrclk = 0;
223 if (helper.ReadRegisterField("CMU", "DEVCLKEN", "SDRC", en) && 253 if(ReadFieldOld("CMU", "DEVCLKEN", "SDRC", en) &&
224 helper.ReadRegisterField("CMU", "DEVCLKEN", "SDRM", tmp0) && 254 ReadFieldOld("CMU", "DEVCLKEN", "SDRM", tmp0) &&
225 helper.ReadRegisterField("SDR", "EN", "EN", tmp1) && 255 ReadFieldOld("SDR", "EN", "EN", tmp1) &&
226 helper.ReadRegisterField("CMU", "SDRCLK", "SDRDIV", tmp2)) 256 ReadFieldOld("CMU", "SDRCLK", "SDRDIV", tmp2))
227 { 257 {
228 en &= tmp0 & tmp1; 258 en &= tmp0 & tmp1;
229 sdrclk = AddClock(sysclk, "sdram clk", en ? FROM_PARENT: DISABLED, 1, tmp2+1); 259 sdrclk = AddClock(sysclk, "sdram clk", en ? FROM_PARENT: DISABLED, 1, tmp2+1);
@@ -233,18 +263,18 @@ void ClockAnalyser::FillTreeATJ213X()
233 263
234 // nand clk 264 // nand clk
235 QTreeWidgetItem *nandclk = 0; 265 QTreeWidgetItem *nandclk = 0;
236 if (helper.ReadRegisterField("CMU", "DEVCLKEN", "NAND", en) && 266 if(ReadFieldOld("CMU", "DEVCLKEN", "NAND", en) &&
237 helper.ReadRegisterField("CMU", "NANDCLK", "NANDDIV", tmp0)) 267 ReadFieldOld("CMU", "NANDCLK", "NANDDIV", tmp0))
238 nandclk = AddClock(corepll, "nand clk", en ? FROM_PARENT : DISABLED, 1, tmp0+1); 268 nandclk = AddClock(corepll, "nand clk", en ? FROM_PARENT : DISABLED, 1, tmp0+1);
239 else 269 else
240 nandclk = AddClock(corepll, "nand clk", INVALID); 270 nandclk = AddClock(corepll, "nand clk", INVALID);
241 271
242 // sd clk 272 // sd clk
243 QTreeWidgetItem *sdclk = 0; 273 QTreeWidgetItem *sdclk = 0;
244 if (helper.ReadRegisterField("CMU", "DEVCLKEN", "SD", tmp0) && 274 if(ReadFieldOld("CMU", "DEVCLKEN", "SD", tmp0) &&
245 helper.ReadRegisterField("CMU", "SDCLK", "CKEN" , tmp1) && 275 ReadFieldOld("CMU", "SDCLK", "CKEN" , tmp1) &&
246 helper.ReadRegisterField("CMU", "SDCLK", "D128" , tmp2) && 276 ReadFieldOld("CMU", "SDCLK", "D128" , tmp2) &&
247 helper.ReadRegisterField("CMU", "SDCLK", "SDDIV" , tmp3)) 277 ReadFieldOld("CMU", "SDCLK", "SDDIV" , tmp3))
248 { 278 {
249 en = tmp0 & tmp1; 279 en = tmp0 & tmp1;
250 sdclk = AddClock(corepll, "sd clk", en ? FROM_PARENT : DISABLED, 280 sdclk = AddClock(corepll, "sd clk", en ? FROM_PARENT : DISABLED,
@@ -255,8 +285,8 @@ void ClockAnalyser::FillTreeATJ213X()
255 285
256 // mha clk 286 // mha clk
257 QTreeWidgetItem *mhaclk = 0; 287 QTreeWidgetItem *mhaclk = 0;
258 if (helper.ReadRegisterField("CMU", "DEVCLKEN", "MHA", en) && 288 if(ReadFieldOld("CMU", "DEVCLKEN", "MHA", en) &&
259 helper.ReadRegisterField("CMU", "MHACLK", "MHADIV", tmp1)) 289 ReadFieldOld("CMU", "MHACLK", "MHADIV", tmp1))
260 mhaclk = AddClock(corepll, "mha clk", en ? FROM_PARENT : DISABLED, 290 mhaclk = AddClock(corepll, "mha clk", en ? FROM_PARENT : DISABLED,
261 1, tmp1+1); 291 1, tmp1+1);
262 else 292 else
@@ -264,8 +294,8 @@ void ClockAnalyser::FillTreeATJ213X()
264 294
265 // mca clk 295 // mca clk
266 QTreeWidgetItem *mcaclk = 0; 296 QTreeWidgetItem *mcaclk = 0;
267 if (helper.ReadRegisterField("CMU", "DEVCLKEN", "MCA", en) && 297 if(ReadFieldOld("CMU", "DEVCLKEN", "MCA", en) &&
268 helper.ReadRegisterField("CMU", "MCACLK", "MCADIV", tmp1)) 298 ReadFieldOld("CMU", "MCACLK", "MCADIV", tmp1))
269 mcaclk = AddClock(corepll, "mca clk", en ? FROM_PARENT : DISABLED, 299 mcaclk = AddClock(corepll, "mca clk", en ? FROM_PARENT : DISABLED,
270 1, tmp1+1); 300 1, tmp1+1);
271 else 301 else
@@ -273,11 +303,11 @@ void ClockAnalyser::FillTreeATJ213X()
273 303
274 // backlight pwm 304 // backlight pwm
275 QTreeWidgetItem *pwmclk = 0; 305 QTreeWidgetItem *pwmclk = 0;
276 if (helper.ReadRegisterField("CMU", "FMCLK", "BCKE", en) && 306 if(ReadFieldOld("CMU", "FMCLK", "BCKE", en) &&
277 helper.ReadRegisterField("CMU", "FMCLK", "BCKS", tmp1) && 307 ReadFieldOld("CMU", "FMCLK", "BCKS", tmp1) &&
278 helper.ReadRegisterField("CMU", "FMCLK", "BCKCON", tmp2)) 308 ReadFieldOld("CMU", "FMCLK", "BCKCON", tmp2))
279 { 309 {
280 if (tmp1) 310 if(tmp1)
281 { 311 {
282 // HOSC/8 input clk 312 // HOSC/8 input clk
283 pwmclk = AddClock(hosc_clk, "pwm clk", en ? FROM_PARENT : DISABLED, 313 pwmclk = AddClock(hosc_clk, "pwm clk", en ? FROM_PARENT : DISABLED,
@@ -296,9 +326,9 @@ void ClockAnalyser::FillTreeATJ213X()
296 // i2c clk 326 // i2c clk
297 QTreeWidgetItem *i2c1clk = 0; 327 QTreeWidgetItem *i2c1clk = 0;
298 QTreeWidgetItem *i2c2clk = 0; 328 QTreeWidgetItem *i2c2clk = 0;
299 if (helper.ReadRegisterField("CMU", "DEVCLKEN", "I2C", en) && 329 if(ReadFieldOld("CMU", "DEVCLKEN", "I2C", en) &&
300 helper.ReadRegisterField("I2C1", "CTL", "EN", tmp0) && 330 ReadFieldOld("I2C1", "CTL", "EN", tmp0) &&
301 helper.ReadRegisterField("I2C1", "CLKDIV", "CLKDIV", tmp1)) 331 ReadFieldOld("I2C1", "CLKDIV", "CLKDIV", tmp1))
302 { 332 {
303 en &= tmp0; 333 en &= tmp0;
304 i2c1clk = AddClock(pclk, "i2c1 clk", en ? FROM_PARENT : DISABLED, 334 i2c1clk = AddClock(pclk, "i2c1 clk", en ? FROM_PARENT : DISABLED,
@@ -309,16 +339,16 @@ void ClockAnalyser::FillTreeATJ213X()
309 i2c1clk = AddClock(pclk, "i2c1 clk", INVALID); 339 i2c1clk = AddClock(pclk, "i2c1 clk", INVALID);
310 } 340 }
311 341
312 if (helper.ReadRegisterField("CMU", "DEVCLKEN", "I2C", en) && 342 if(ReadFieldOld("CMU", "DEVCLKEN", "I2C", en) &&
313 helper.ReadRegisterField("I2C2", "CTL", "EN", tmp0) && 343 ReadFieldOld("I2C2", "CTL", "EN", tmp0) &&
314 helper.ReadRegisterField("I2C2", "CLKDIV", "CLKDIV", tmp1)) 344 ReadFieldOld("I2C2", "CLKDIV", "CLKDIV", tmp1))
315 { 345 {
316 en &= tmp0; 346 en &= tmp0;
317 i2c2clk = AddClock(pclk, "i2c2 clk", en ? FROM_PARENT : DISABLED, 347 i2c2clk = AddClock(pclk, "i2c2 clk", en ? FROM_PARENT : DISABLED,
318 1, 16*(tmp1+1)); 348 1, 16*(tmp1+1));
319 } 349 }
320 else 350 else
321 { 351 {
322 i2c2clk = AddClock(pclk, "i2c2 clk", INVALID); 352 i2c2clk = AddClock(pclk, "i2c2 clk", INVALID);
323 } 353 }
324 354
@@ -340,17 +370,15 @@ void ClockAnalyser::FillTreeRK27XX()
340 soc_word_t value, value2, value3, value4; 370 soc_word_t value, value2, value3, value4;
341 soc_word_t bypass, clkr, clkf, clkod, pll_off; 371 soc_word_t bypass, clkr, clkf, clkod, pll_off;
342 372
343 BackendHelper helper(m_io_backend, m_soc);
344
345 QTreeWidgetItem *xtal_clk = AddClock(0, "xtal clk", 24000000); 373 QTreeWidgetItem *xtal_clk = AddClock(0, "xtal clk", 24000000);
346 374
347 // F = (Fref*F)/R/OD = (Fref*F)/R/OD 375 // F = (Fref*F)/R/OD = (Fref*F)/R/OD
348 QTreeWidgetItem *arm_pll = 0; 376 QTreeWidgetItem *arm_pll = 0;
349 if (helper.ReadRegisterField("SCU", "PLLCON1", "ARM_PLL_BYPASS", bypass) && 377 if(ReadFieldOld("SCU", "PLLCON1", "ARM_PLL_BYPASS", bypass) &&
350 helper.ReadRegisterField("SCU", "PLLCON1", "ARM_PLL_CLKR", clkr) && 378 ReadFieldOld("SCU", "PLLCON1", "ARM_PLL_CLKR", clkr) &&
351 helper.ReadRegisterField("SCU", "PLLCON1", "ARM_PLL_CLKF", clkf) && 379 ReadFieldOld("SCU", "PLLCON1", "ARM_PLL_CLKF", clkf) &&
352 helper.ReadRegisterField("SCU", "PLLCON1", "ARM_PLL_CLKOD", clkod) && 380 ReadFieldOld("SCU", "PLLCON1", "ARM_PLL_CLKOD", clkod) &&
353 helper.ReadRegisterField("SCU", "PLLCON1", "ARM_PLL_POWERDOWN", pll_off)) 381 ReadFieldOld("SCU", "PLLCON1", "ARM_PLL_POWERDOWN", pll_off))
354 { 382 {
355 arm_pll = AddClock(xtal_clk, "arm pll", pll_off ? DISABLED : FROM_PARENT, 383 arm_pll = AddClock(xtal_clk, "arm pll", pll_off ? DISABLED : FROM_PARENT,
356 bypass ? 1 : clkf+1, bypass ? 1 : (clkr+1)*(clkod+1)); 384 bypass ? 1 : clkf+1, bypass ? 1 : (clkr+1)*(clkod+1));
@@ -363,9 +391,9 @@ void ClockAnalyser::FillTreeRK27XX()
363 QTreeWidgetItem *arm_clk = 0; 391 QTreeWidgetItem *arm_clk = 0;
364 QTreeWidgetItem *hclk = 0; 392 QTreeWidgetItem *hclk = 0;
365 QTreeWidgetItem *pclk = 0; 393 QTreeWidgetItem *pclk = 0;
366 if(helper.ReadRegisterField("SCU", "DIVCON1", "ARM_SLOW_MODE", value) && 394 if(ReadFieldOld("SCU", "DIVCON1", "ARM_SLOW_MODE", value) &&
367 helper.ReadRegisterField("SCU", "DIVCON1", "ARM_CLK_DIV", value2) && 395 ReadFieldOld("SCU", "DIVCON1", "ARM_CLK_DIV", value2) &&
368 helper.ReadRegisterField("SCU", "DIVCON1", "PCLK_CLK_DIV", value3)) 396 ReadFieldOld("SCU", "DIVCON1", "PCLK_CLK_DIV", value3))
369 { 397 {
370 arm_clk = AddClock(value ? xtal_clk : arm_pll, "arm clk", FROM_PARENT, 1, value2 ? 2 : 1); 398 arm_clk = AddClock(value ? xtal_clk : arm_pll, "arm clk", FROM_PARENT, 1, value2 ? 2 : 1);
371 hclk = AddClock(arm_clk, "hclk", FROM_PARENT, 1, value2 ? 1 : 2); 399 hclk = AddClock(arm_clk, "hclk", FROM_PARENT, 1, value2 ? 1 : 2);
@@ -379,11 +407,11 @@ void ClockAnalyser::FillTreeRK27XX()
379 } 407 }
380 408
381 QTreeWidgetItem *dsp_pll = 0; 409 QTreeWidgetItem *dsp_pll = 0;
382 if (helper.ReadRegisterField("SCU", "PLLCON2", "DSP_PLL_BYPASS", bypass) && 410 if(ReadFieldOld("SCU", "PLLCON2", "DSP_PLL_BYPASS", bypass) &&
383 helper.ReadRegisterField("SCU", "PLLCON2", "DSP_PLL_CLKR", clkr) && 411 ReadFieldOld("SCU", "PLLCON2", "DSP_PLL_CLKR", clkr) &&
384 helper.ReadRegisterField("SCU", "PLLCON2", "DSP_PLL_CLKF", clkf) && 412 ReadFieldOld("SCU", "PLLCON2", "DSP_PLL_CLKF", clkf) &&
385 helper.ReadRegisterField("SCU", "PLLCON2", "DSP_PLL_CLKOD", clkod) && 413 ReadFieldOld("SCU", "PLLCON2", "DSP_PLL_CLKOD", clkod) &&
386 helper.ReadRegisterField("SCU", "PLLCON2", "DSP_PLL_POWERDOWN", pll_off)) 414 ReadFieldOld("SCU", "PLLCON2", "DSP_PLL_POWERDOWN", pll_off))
387 { 415 {
388 dsp_pll = AddClock(xtal_clk, "dsp pll", pll_off ? DISABLED : FROM_PARENT, 416 dsp_pll = AddClock(xtal_clk, "dsp pll", pll_off ? DISABLED : FROM_PARENT,
389 bypass ? 1 : clkf+1, bypass ? 1 : (clkr+1)*(clkod+1)); 417 bypass ? 1 : clkf+1, bypass ? 1 : (clkr+1)*(clkod+1));
@@ -396,11 +424,11 @@ void ClockAnalyser::FillTreeRK27XX()
396 QTreeWidgetItem *dsp_clk = AddClock(dsp_pll, "dsp clk", FROM_PARENT); 424 QTreeWidgetItem *dsp_clk = AddClock(dsp_pll, "dsp clk", FROM_PARENT);
397 425
398 QTreeWidgetItem *codec_pll = 0; 426 QTreeWidgetItem *codec_pll = 0;
399 if (helper.ReadRegisterField("SCU", "PLLCON3", "CODEC_PLL_BYPASS", bypass) && 427 if(ReadFieldOld("SCU", "PLLCON3", "CODEC_PLL_BYPASS", bypass) &&
400 helper.ReadRegisterField("SCU", "PLLCON3", "CODEC_PLL_CLKR", clkr) && 428 ReadFieldOld("SCU", "PLLCON3", "CODEC_PLL_CLKR", clkr) &&
401 helper.ReadRegisterField("SCU", "PLLCON3", "CODEC_PLL_CLKF", clkf) && 429 ReadFieldOld("SCU", "PLLCON3", "CODEC_PLL_CLKF", clkf) &&
402 helper.ReadRegisterField("SCU", "PLLCON3", "CODEC_PLL_CLKOD", clkod) && 430 ReadFieldOld("SCU", "PLLCON3", "CODEC_PLL_CLKOD", clkod) &&
403 helper.ReadRegisterField("SCU", "PLLCON3", "CODEC_PLL_POWERDOWN", pll_off)) 431 ReadFieldOld("SCU", "PLLCON3", "CODEC_PLL_POWERDOWN", pll_off))
404 { 432 {
405 codec_pll = AddClock(xtal_clk, "codec pll", pll_off ? DISABLED : FROM_PARENT, 433 codec_pll = AddClock(xtal_clk, "codec pll", pll_off ? DISABLED : FROM_PARENT,
406 bypass ? 1 : clkf+1, bypass ? 1 : (clkr+1)*(clkod+1)); 434 bypass ? 1 : clkf+1, bypass ? 1 : (clkr+1)*(clkod+1));
@@ -411,8 +439,8 @@ void ClockAnalyser::FillTreeRK27XX()
411 } 439 }
412 440
413 QTreeWidgetItem *codec_clk = 0; 441 QTreeWidgetItem *codec_clk = 0;
414 if (helper.ReadRegisterField("SCU", "DIVCON1", "CODEC_CLK_SRC", value) && 442 if(ReadFieldOld("SCU", "DIVCON1", "CODEC_CLK_SRC", value) &&
415 helper.ReadRegisterField("SCU", "DIVCON1", "CODEC_CLK_DIV", value2)) 443 ReadFieldOld("SCU", "DIVCON1", "CODEC_CLK_DIV", value2))
416 { 444 {
417 codec_clk = AddClock(value ? xtal_clk : codec_pll, "codec clk", FROM_PARENT, 1, value ? 1 : (value2 + 1)); 445 codec_clk = AddClock(value ? xtal_clk : codec_pll, "codec clk", FROM_PARENT, 1, value ? 1 : (value2 + 1));
418 } 446 }
@@ -422,7 +450,7 @@ void ClockAnalyser::FillTreeRK27XX()
422 } 450 }
423 451
424 QTreeWidgetItem *lsadc_clk = 0; 452 QTreeWidgetItem *lsadc_clk = 0;
425 if (helper.ReadRegisterField("SCU", "DIVCON1", "LSADC_CLK_DIV", value)) 453 if(ReadFieldOld("SCU", "DIVCON1", "LSADC_CLK_DIV", value))
426 { 454 {
427 lsadc_clk = AddClock(pclk, "lsadc clk", FROM_PARENT, 1, (value+1)); 455 lsadc_clk = AddClock(pclk, "lsadc clk", FROM_PARENT, 1, (value+1));
428 } 456 }
@@ -432,11 +460,11 @@ void ClockAnalyser::FillTreeRK27XX()
432 } 460 }
433 461
434 QTreeWidgetItem *lcdc_clk = 0; 462 QTreeWidgetItem *lcdc_clk = 0;
435 if (helper.ReadRegisterField("SCU", "DIVCON1", "LCDC_CLK", value) && 463 if(ReadFieldOld("SCU", "DIVCON1", "LCDC_CLK", value) &&
436 helper.ReadRegisterField("SCU", "DIVCON1", "LCDC_CLK_DIV", value2) && 464 ReadFieldOld("SCU", "DIVCON1", "LCDC_CLK_DIV", value2) &&
437 helper.ReadRegisterField("SCU", "DIVCON1", "LCDC_CLK_DIV_SRC", value3)) 465 ReadFieldOld("SCU", "DIVCON1", "LCDC_CLK_DIV_SRC", value3))
438 { 466 {
439 if (value) 467 if(value)
440 { 468 {
441 lcdc_clk = AddClock(xtal_clk, "lcdc clk", FROM_PARENT); 469 lcdc_clk = AddClock(xtal_clk, "lcdc clk", FROM_PARENT);
442 } 470 }
@@ -456,9 +484,9 @@ void ClockAnalyser::FillTreeRK27XX()
456 } 484 }
457 485
458 QTreeWidgetItem *pwm0_clk = 0; 486 QTreeWidgetItem *pwm0_clk = 0;
459 if(helper.ReadRegisterField("PWM0", "LRC", "TR", value) && 487 if(ReadFieldOld("PWM0", "LRC", "TR", value) &&
460 helper.ReadRegisterField("PWM0", "CTRL", "PRESCALE", value3) && 488 ReadFieldOld("PWM0", "CTRL", "PRESCALE", value3) &&
461 helper.ReadRegisterField("PWM0", "CTRL", "PWM_EN", value4)) 489 ReadFieldOld("PWM0", "CTRL", "PWM_EN", value4))
462 { 490 {
463 pwm0_clk = AddClock(pclk, "pwm0 clk", value4 ? FROM_PARENT : DISABLED, 1, 2*value*(1<<value3)); 491 pwm0_clk = AddClock(pclk, "pwm0 clk", value4 ? FROM_PARENT : DISABLED, 1, 2*value*(1<<value3));
464 } 492 }
@@ -468,9 +496,9 @@ void ClockAnalyser::FillTreeRK27XX()
468 } 496 }
469 497
470 QTreeWidgetItem *pwm1_clk = 0; 498 QTreeWidgetItem *pwm1_clk = 0;
471 if(helper.ReadRegisterField("PWM1", "LRC", "TR", value) && 499 if(ReadFieldOld("PWM1", "LRC", "TR", value) &&
472 helper.ReadRegisterField("PWM1", "CTRL", "PRESCALE", value3) && 500 ReadFieldOld("PWM1", "CTRL", "PRESCALE", value3) &&
473 helper.ReadRegisterField("PWM1", "CTRL", "PWM_EN", value4)) 501 ReadFieldOld("PWM1", "CTRL", "PWM_EN", value4))
474 { 502 {
475 pwm1_clk = AddClock(pclk, "pwm1 clk", value4 ? FROM_PARENT : DISABLED, 1, 2*value*(1<<value3)); 503 pwm1_clk = AddClock(pclk, "pwm1 clk", value4 ? FROM_PARENT : DISABLED, 1, 2*value*(1<<value3));
476 } 504 }
@@ -480,9 +508,9 @@ void ClockAnalyser::FillTreeRK27XX()
480 } 508 }
481 509
482 QTreeWidgetItem *pwm2_clk = 0; 510 QTreeWidgetItem *pwm2_clk = 0;
483 if(helper.ReadRegisterField("PWM2", "LRC", "TR", value) && 511 if(ReadFieldOld("PWM2", "LRC", "TR", value) &&
484 helper.ReadRegisterField("PWM2", "CTRL", "PRESCALE", value3) && 512 ReadFieldOld("PWM2", "CTRL", "PRESCALE", value3) &&
485 helper.ReadRegisterField("PWM2", "CTRL", "PWM_EN", value4)) 513 ReadFieldOld("PWM2", "CTRL", "PWM_EN", value4))
486 { 514 {
487 pwm2_clk = AddClock(pclk, "pwm2 clk", value4 ? FROM_PARENT : DISABLED, 1, 2*value*(1<<value3)); 515 pwm2_clk = AddClock(pclk, "pwm2 clk", value4 ? FROM_PARENT : DISABLED, 1, 2*value*(1<<value3));
488 } 516 }
@@ -492,9 +520,9 @@ void ClockAnalyser::FillTreeRK27XX()
492 } 520 }
493 521
494 QTreeWidgetItem *pwm3_clk = 0; 522 QTreeWidgetItem *pwm3_clk = 0;
495 if(helper.ReadRegisterField("PWM3", "LRC", "TR", value) && 523 if(ReadFieldOld("PWM3", "LRC", "TR", value) &&
496 helper.ReadRegisterField("PWM3", "CTRL", "PRESCALE", value3) && 524 ReadFieldOld("PWM3", "CTRL", "PRESCALE", value3) &&
497 helper.ReadRegisterField("PWM3", "CTRL", "PWM_EN", value4)) 525 ReadFieldOld("PWM3", "CTRL", "PWM_EN", value4))
498 { 526 {
499 pwm3_clk = AddClock(pclk, "pwm3", value4 ? FROM_PARENT : DISABLED, 1, 2*value*(1<<value3)); 527 pwm3_clk = AddClock(pclk, "pwm3", value4 ? FROM_PARENT : DISABLED, 1, 2*value*(1<<value3));
500 } 528 }
@@ -504,7 +532,7 @@ void ClockAnalyser::FillTreeRK27XX()
504 } 532 }
505 533
506 QTreeWidgetItem *sdmmc_clk = 0; 534 QTreeWidgetItem *sdmmc_clk = 0;
507 if(helper.ReadRegisterField("SD", "CTRL", "DIVIDER", value)) 535 if(ReadFieldOld("SD", "CTRL", "DIVIDER", value))
508 { 536 {
509 sdmmc_clk = AddClock(pclk, "sd clk", FROM_PARENT, 1, value+1); 537 sdmmc_clk = AddClock(pclk, "sd clk", FROM_PARENT, 1, value+1);
510 } 538 }
@@ -526,73 +554,72 @@ void ClockAnalyser::FillTreeRK27XX()
526 554
527void ClockAnalyser::FillTreeIMX233() 555void ClockAnalyser::FillTreeIMX233()
528{ 556{
529 BackendHelper helper(m_io_backend, m_soc);
530 soc_word_t value, value2, value3; 557 soc_word_t value, value2, value3;
531 558
532 QTreeWidgetItem *ring_osc = 0; 559 QTreeWidgetItem *ring_osc = 0;
533 if(helper.ReadRegisterField("POWER", "MINPWR", "ENABLE_OSC", value)) 560 if(ReadFieldOld("POWER", "MINPWR", "ENABLE_OSC", value))
534 ring_osc = AddClock(0, "ring_clk24m", value ? 24000000 : DISABLED); 561 ring_osc = AddClock(0, "ring_clk24m", value ? 24000000 : DISABLED);
535 else 562 else
536 ring_osc = AddClock(0, "ring_clk24m", INVALID); 563 ring_osc = AddClock(0, "ring_clk24m", INVALID);
537 QTreeWidgetItem *xtal_osc = 0; 564 QTreeWidgetItem *xtal_osc = 0;
538 if(helper.ReadRegisterField("POWER", "MINPWR", "PWD_XTAL24", value)) 565 if(ReadFieldOld("POWER", "MINPWR", "PWD_XTAL24", value))
539 xtal_osc = AddClock(0, "xtal_clk24m", value ? DISABLED : 24000000); 566 xtal_osc = AddClock(0, "xtal_clk24m", value ? DISABLED : 24000000);
540 else 567 else
541 xtal_osc = AddClock(0, "xtal_clk24m", INVALID); 568 xtal_osc = AddClock(0, "xtal_clk24m", INVALID);
542 QTreeWidgetItem *ref_xtal = 0; 569 QTreeWidgetItem *ref_xtal = 0;
543 if(helper.ReadRegisterField("POWER", "MINPWR", "SELECT_OSC", value)) 570 if(ReadFieldOld("POWER", "MINPWR", "SELECT_OSC", value))
544 ref_xtal = AddClock(value ? ring_osc : xtal_osc, "ref_xtal", FROM_PARENT); 571 ref_xtal = AddClock(value ? ring_osc : xtal_osc, "ref_xtal", FROM_PARENT);
545 else 572 else
546 ref_xtal = AddClock(0, "ref_xtal", INVALID); 573 ref_xtal = AddClock(0, "ref_xtal", INVALID);
547 574
548 QTreeWidgetItem *ref_pll = 0; 575 QTreeWidgetItem *ref_pll = 0;
549 if(helper.ReadRegisterField("CLKCTRL", "PLLCTRL0", "POWER", value)) 576 if(ReadFieldOld("CLKCTRL", "PLLCTRL0", "POWER", value))
550 ref_pll = AddClock(ref_xtal, "ref_pll", FROM_PARENT, 20); 577 ref_pll = AddClock(ref_xtal, "ref_pll", FROM_PARENT, 20);
551 else 578 else
552 ref_pll = AddClock(0, "ref_pll", INVALID); 579 ref_pll = AddClock(0, "ref_pll", INVALID);
553 580
554 QTreeWidgetItem *ref_io = 0; 581 QTreeWidgetItem *ref_io = 0;
555 if(helper.ReadRegisterField("CLKCTRL", "FRAC", "CLKGATEIO", value) && 582 if(ReadFieldOld("CLKCTRL", "FRAC", "CLKGATEIO", value) &&
556 helper.ReadRegisterField("CLKCTRL", "FRAC", "IOFRAC", value2)) 583 ReadFieldOld("CLKCTRL", "FRAC", "IOFRAC", value2))
557 ref_io = AddClock(ref_pll, "ref_io", value ? DISABLED : FROM_PARENT, 18, value2); 584 ref_io = AddClock(ref_pll, "ref_io", value ? DISABLED : FROM_PARENT, 18, value2);
558 else 585 else
559 ref_io = AddClock(ref_pll, "ref_io", INVALID); 586 ref_io = AddClock(ref_pll, "ref_io", INVALID);
560 587
561 QTreeWidgetItem *ref_pix = 0; 588 QTreeWidgetItem *ref_pix = 0;
562 if(helper.ReadRegisterField("CLKCTRL", "FRAC", "CLKGATEPIX", value) && 589 if(ReadFieldOld("CLKCTRL", "FRAC", "CLKGATEPIX", value) &&
563 helper.ReadRegisterField("CLKCTRL", "FRAC", "PIXFRAC", value2)) 590 ReadFieldOld("CLKCTRL", "FRAC", "PIXFRAC", value2))
564 ref_pix = AddClock(ref_pll, "ref_pix", value ? DISABLED : FROM_PARENT, 18, value2); 591 ref_pix = AddClock(ref_pll, "ref_pix", value ? DISABLED : FROM_PARENT, 18, value2);
565 else 592 else
566 ref_pix = AddClock(ref_pll, "ref_pix", INVALID); 593 ref_pix = AddClock(ref_pll, "ref_pix", INVALID);
567 594
568 QTreeWidgetItem *ref_emi = 0; 595 QTreeWidgetItem *ref_emi = 0;
569 if(helper.ReadRegisterField("CLKCTRL", "FRAC", "CLKGATEEMI", value) && 596 if(ReadFieldOld("CLKCTRL", "FRAC", "CLKGATEEMI", value) &&
570 helper.ReadRegisterField("CLKCTRL", "FRAC", "EMIFRAC", value2)) 597 ReadFieldOld("CLKCTRL", "FRAC", "EMIFRAC", value2))
571 ref_emi = AddClock(ref_pll, "ref_emi", value ? DISABLED : FROM_PARENT, 18, value2); 598 ref_emi = AddClock(ref_pll, "ref_emi", value ? DISABLED : FROM_PARENT, 18, value2);
572 else 599 else
573 ref_emi = AddClock(ref_pll, "ref_emi", INVALID); 600 ref_emi = AddClock(ref_pll, "ref_emi", INVALID);
574 601
575 QTreeWidgetItem *ref_cpu = 0; 602 QTreeWidgetItem *ref_cpu = 0;
576 if(helper.ReadRegisterField("CLKCTRL", "FRAC", "CLKGATECPU", value) && 603 if(ReadFieldOld("CLKCTRL", "FRAC", "CLKGATECPU", value) &&
577 helper.ReadRegisterField("CLKCTRL", "FRAC", "CPUFRAC", value2)) 604 ReadFieldOld("CLKCTRL", "FRAC", "CPUFRAC", value2))
578 ref_cpu = AddClock(ref_pll, "ref_cpu", value ? DISABLED : FROM_PARENT, 18, value2); 605 ref_cpu = AddClock(ref_pll, "ref_cpu", value ? DISABLED : FROM_PARENT, 18, value2);
579 else 606 else
580 ref_cpu = AddClock(ref_pll, "ref_cpu", INVALID); 607 ref_cpu = AddClock(ref_pll, "ref_cpu", INVALID);
581 608
582 QTreeWidgetItem *clk_p = 0; 609 QTreeWidgetItem *clk_p = 0;
583 if(helper.ReadRegisterField("CLKCTRL", "CLKSEQ", "BYPASS_CPU", value)) 610 if(ReadFieldOld("CLKCTRL", "CLKSEQ", "BYPASS_CPU", value))
584 { 611 {
585 if(!value) 612 if(!value)
586 { 613 {
587 if(helper.ReadRegisterField("CLKCTRL", "CPU", "DIV_CPU", value2)) 614 if(ReadFieldOld("CLKCTRL", "CPU", "DIV_CPU", value2))
588 clk_p = AddClock(ref_cpu, "clk_p", FROM_PARENT, 1, value2); 615 clk_p = AddClock(ref_cpu, "clk_p", FROM_PARENT, 1, value2);
589 else 616 else
590 clk_p = AddClock(ref_cpu, "clk_p", INVALID); 617 clk_p = AddClock(ref_cpu, "clk_p", INVALID);
591 } 618 }
592 else 619 else
593 { 620 {
594 if(helper.ReadRegisterField("CLKCTRL", "CPU", "DIV_XTAL_FRAC_EN", value) && 621 if(ReadFieldOld("CLKCTRL", "CPU", "DIV_XTAL_FRAC_EN", value) &&
595 helper.ReadRegisterField("CLKCTRL", "CPU", "DIV_XTAL", value2)) 622 ReadFieldOld("CLKCTRL", "CPU", "DIV_XTAL", value2))
596 clk_p = AddClock(ref_xtal, "clk_p", FROM_PARENT, value ? 1024 : 1, value2); 623 clk_p = AddClock(ref_xtal, "clk_p", FROM_PARENT, value ? 1024 : 1, value2);
597 else 624 else
598 clk_p = AddClock(ref_xtal, "clk_p", INVALID); 625 clk_p = AddClock(ref_xtal, "clk_p", INVALID);
@@ -602,101 +629,101 @@ void ClockAnalyser::FillTreeIMX233()
602 clk_p = AddClock(ref_xtal, "clk_p", INVALID); 629 clk_p = AddClock(ref_xtal, "clk_p", INVALID);
603 630
604 QTreeWidgetItem *clk_h = 0; 631 QTreeWidgetItem *clk_h = 0;
605 if(helper.ReadRegisterField("CLKCTRL", "HBUS", "DIV_FRAC_EN", value) && 632 if(ReadFieldOld("CLKCTRL", "HBUS", "DIV_FRAC_EN", value) &&
606 helper.ReadRegisterField("CLKCTRL", "HBUS", "DIV", value2)) 633 ReadFieldOld("CLKCTRL", "HBUS", "DIV", value2))
607 clk_h = AddClock(clk_p, "clk_h", FROM_PARENT, value ? 32 : 1, value2); 634 clk_h = AddClock(clk_p, "clk_h", FROM_PARENT, value ? 32 : 1, value2);
608 else 635 else
609 clk_h = AddClock(clk_p, "clk_h", INVALID); 636 clk_h = AddClock(clk_p, "clk_h", INVALID);
610 637
611 QTreeWidgetItem *clk_x = 0; 638 QTreeWidgetItem *clk_x = 0;
612 if(helper.ReadRegisterField("CLKCTRL", "XBUS", "DIV", value)) 639 if(ReadFieldOld("CLKCTRL", "XBUS", "DIV", value))
613 clk_x = AddClock(ref_xtal, "clk_x", FROM_PARENT, 1, value); 640 clk_x = AddClock(ref_xtal, "clk_x", FROM_PARENT, 1, value);
614 else 641 else
615 clk_x = AddClock(ref_xtal, "clk_x", INVALID); 642 clk_x = AddClock(ref_xtal, "clk_x", INVALID);
616 643
617 if(helper.ReadRegisterField("CLKCTRL", "XTAL", "UART_CLK_GATE", value)) 644 if(ReadFieldOld("CLKCTRL", "XTAL", "UART_CLK_GATE", value))
618 AddClock(ref_xtal, "clk_uart", value ? DISABLED : FROM_PARENT); 645 AddClock(ref_xtal, "clk_uart", value ? DISABLED : FROM_PARENT);
619 else 646 else
620 AddClock(ref_xtal, "clk_uart", INVALID); 647 AddClock(ref_xtal, "clk_uart", INVALID);
621 648
622 if(helper.ReadRegisterField("CLKCTRL", "XTAL", "FILT_CLK24M_GATE", value)) 649 if(ReadFieldOld("CLKCTRL", "XTAL", "FILT_CLK24M_GATE", value))
623 AddClock(ref_xtal, "clk_filt24m", value ? DISABLED : FROM_PARENT); 650 AddClock(ref_xtal, "clk_filt24m", value ? DISABLED : FROM_PARENT);
624 else 651 else
625 AddClock(ref_xtal, "clk_filt24m", INVALID); 652 AddClock(ref_xtal, "clk_filt24m", INVALID);
626 653
627 if(helper.ReadRegisterField("CLKCTRL", "XTAL", "PWM_CLK24M_GATE", value)) 654 if(ReadFieldOld("CLKCTRL", "XTAL", "PWM_CLK24M_GATE", value))
628 AddClock(ref_xtal, "clk_pwm24m", value ? DISABLED : FROM_PARENT); 655 AddClock(ref_xtal, "clk_pwm24m", value ? DISABLED : FROM_PARENT);
629 else 656 else
630 AddClock(ref_xtal, "clk_pwm24m", INVALID); 657 AddClock(ref_xtal, "clk_pwm24m", INVALID);
631 658
632 if(helper.ReadRegisterField("CLKCTRL", "XTAL", "DRI_CLK24M_GATE", value)) 659 if(ReadFieldOld("CLKCTRL", "XTAL", "DRI_CLK24M_GATE", value))
633 AddClock(ref_xtal, "clk_dri24m", value ? DISABLED : FROM_PARENT); 660 AddClock(ref_xtal, "clk_dri24m", value ? DISABLED : FROM_PARENT);
634 else 661 else
635 AddClock(ref_xtal, "clk_dri24m", INVALID); 662 AddClock(ref_xtal, "clk_dri24m", INVALID);
636 663
637 if(helper.ReadRegisterField("CLKCTRL", "XTAL", "DIGCTRL_CLK1M_GATE", value)) 664 if(ReadFieldOld("CLKCTRL", "XTAL", "DIGCTRL_CLK1M_GATE", value))
638 AddClock(ref_xtal, "clk_1m", value ? DISABLED : FROM_PARENT, 1, 24); 665 AddClock(ref_xtal, "clk_1m", value ? DISABLED : FROM_PARENT, 1, 24);
639 else 666 else
640 AddClock(ref_xtal, "clk_1m", INVALID); 667 AddClock(ref_xtal, "clk_1m", INVALID);
641 668
642 QTreeWidgetItem *clk_32k = 0; 669 QTreeWidgetItem *clk_32k = 0;
643 if(helper.ReadRegisterField("CLKCTRL", "XTAL", "TIMROT_CLK32K_GATE", value)) 670 if(ReadFieldOld("CLKCTRL", "XTAL", "TIMROT_CLK32K_GATE", value))
644 clk_32k = AddClock(ref_xtal, "clk_32k", value ? DISABLED : FROM_PARENT, 1, 750); 671 clk_32k = AddClock(ref_xtal, "clk_32k", value ? DISABLED : FROM_PARENT, 1, 750);
645 else 672 else
646 clk_32k = AddClock(ref_xtal, "clk_32k", INVALID); 673 clk_32k = AddClock(ref_xtal, "clk_32k", INVALID);
647 674
648 AddClock(clk_32k, "clk_adc", FROM_PARENT, 1, 16); 675 AddClock(clk_32k, "clk_adc", FROM_PARENT, 1, 16);
649 676
650 if(helper.ReadRegisterField("CLKCTRL", "CLKSEQ", "BYPASS_PIX", value) && 677 if(ReadFieldOld("CLKCTRL", "CLKSEQ", "BYPASS_PIX", value) &&
651 helper.ReadRegisterField("CLKCTRL", "PIX", "DIV", value2)) 678 ReadFieldOld("CLKCTRL", "PIX", "DIV", value2))
652 AddClock(value ? ref_xtal : ref_pix, "clk_pix", FROM_PARENT, 1, value2); 679 AddClock(value ? ref_xtal : ref_pix, "clk_pix", FROM_PARENT, 1, value2);
653 else 680 else
654 AddClock(ref_xtal, "clk_p", INVALID); 681 AddClock(ref_xtal, "clk_p", INVALID);
655 682
656 QTreeWidgetItem *clk_ssp = 0; 683 QTreeWidgetItem *clk_ssp = 0;
657 if(helper.ReadRegisterField("CLKCTRL", "CLKSEQ", "BYPASS_SSP", value) && 684 if(ReadFieldOld("CLKCTRL", "CLKSEQ", "BYPASS_SSP", value) &&
658 helper.ReadRegisterField("CLKCTRL", "SSP", "DIV", value2) && 685 ReadFieldOld("CLKCTRL", "SSP", "DIV", value2) &&
659 helper.ReadRegisterField("CLKCTRL", "SSP", "CLKGATE", value3)) 686 ReadFieldOld("CLKCTRL", "SSP", "CLKGATE", value3))
660 clk_ssp = AddClock(value ? ref_xtal : ref_io, "clk_ssp", value3 ? DISABLED : FROM_PARENT, 1, value2); 687 clk_ssp = AddClock(value ? ref_xtal : ref_io, "clk_ssp", value3 ? DISABLED : FROM_PARENT, 1, value2);
661 else 688 else
662 clk_ssp = AddClock(ref_xtal, "clk_p", INVALID); 689 clk_ssp = AddClock(ref_xtal, "clk_p", INVALID);
663 690
664 if(helper.ReadRegisterField("SSP1", "TIMING", "CLOCK_DIVIDE", value) && 691 if(ReadFieldOld("SSP1", "TIMING", "CLOCK_DIVIDE", value) &&
665 helper.ReadRegisterField("SSP1", "TIMING", "CLOCK_RATE", value2) && 692 ReadFieldOld("SSP1", "TIMING", "CLOCK_RATE", value2) &&
666 helper.ReadRegisterField("SSP1", "CTRL0", "CLKGATE", value3)) 693 ReadFieldOld("SSP1", "CTRL0", "CLKGATE", value3))
667 AddClock(clk_ssp, "clk_ssp1", value3 ? DISABLED : FROM_PARENT, 1, value * (1 + value2)); 694 AddClock(clk_ssp, "clk_ssp1", value3 ? DISABLED : FROM_PARENT, 1, value * (1 + value2));
668 else 695 else
669 AddClock(clk_ssp, "clk_ssp1", INVALID); 696 AddClock(clk_ssp, "clk_ssp1", INVALID);
670 697
671 if(helper.ReadRegisterField("SSP2", "TIMING", "CLOCK_DIVIDE", value) && 698 if(ReadFieldOld("SSP2", "TIMING", "CLOCK_DIVIDE", value) &&
672 helper.ReadRegisterField("SSP2", "TIMING", "CLOCK_RATE", value2) && 699 ReadFieldOld("SSP2", "TIMING", "CLOCK_RATE", value2) &&
673 helper.ReadRegisterField("SSP2", "CTRL0", "CLKGATE", value3)) 700 ReadFieldOld("SSP2", "CTRL0", "CLKGATE", value3))
674 AddClock(clk_ssp, "clk_ssp2", value3 ? DISABLED : FROM_PARENT, 1, value * (1 + value2)); 701 AddClock(clk_ssp, "clk_ssp2", value3 ? DISABLED : FROM_PARENT, 1, value * (1 + value2));
675 else 702 else
676 AddClock(clk_ssp, "clk_ssp2", INVALID); 703 AddClock(clk_ssp, "clk_ssp2", INVALID);
677 704
678 QTreeWidgetItem *clk_gpmi = 0; 705 QTreeWidgetItem *clk_gpmi = 0;
679 if(helper.ReadRegisterField("CLKCTRL", "CLKSEQ", "BYPASS_GPMI", value) && 706 if(ReadFieldOld("CLKCTRL", "CLKSEQ", "BYPASS_GPMI", value) &&
680 helper.ReadRegisterField("CLKCTRL", "GPMI", "DIV", value2) && 707 ReadFieldOld("CLKCTRL", "GPMI", "DIV", value2) &&
681 helper.ReadRegisterField("CLKCTRL", "GPMI", "CLKGATE", value3)) 708 ReadFieldOld("CLKCTRL", "GPMI", "CLKGATE", value3))
682 clk_gpmi = AddClock(value ? ref_xtal : ref_io, "clk_gpmi", value3 ? DISABLED : FROM_PARENT, 1, value2); 709 clk_gpmi = AddClock(value ? ref_xtal : ref_io, "clk_gpmi", value3 ? DISABLED : FROM_PARENT, 1, value2);
683 else 710 else
684 clk_gpmi = AddClock(ref_xtal, "clk_p", INVALID); 711 clk_gpmi = AddClock(ref_xtal, "clk_p", INVALID);
685 712
686 if(helper.ReadRegisterField("CLKCTRL", "CLKSEQ", "BYPASS_EMI", value)) 713 if(ReadFieldOld("CLKCTRL", "CLKSEQ", "BYPASS_EMI", value))
687 { 714 {
688 if(!value) 715 if(!value)
689 { 716 {
690 if(helper.ReadRegisterField("CLKCTRL", "EMI", "DIV_EMI", value2) && 717 if(ReadFieldOld("CLKCTRL", "EMI", "DIV_EMI", value2) &&
691 helper.ReadRegisterField("CLKCTRL", "EMI", "CLKGATE", value3)) 718 ReadFieldOld("CLKCTRL", "EMI", "CLKGATE", value3))
692 AddClock(ref_emi, "clk_emi", value3 ? DISABLED : FROM_PARENT, 1, value2); 719 AddClock(ref_emi, "clk_emi", value3 ? DISABLED : FROM_PARENT, 1, value2);
693 else 720 else
694 AddClock(ref_emi, "clk_emi", INVALID); 721 AddClock(ref_emi, "clk_emi", INVALID);
695 } 722 }
696 else 723 else
697 { 724 {
698 if(helper.ReadRegisterField("CLKCTRL", "EMI", "DIV_XTAL", value2) && 725 if(ReadFieldOld("CLKCTRL", "EMI", "DIV_XTAL", value2) &&
699 helper.ReadRegisterField("CLKCTRL", "EMI", "CLKGATE", value3)) 726 ReadFieldOld("CLKCTRL", "EMI", "CLKGATE", value3))
700 AddClock(ref_xtal, "clk_emi", value3 ? DISABLED : FROM_PARENT, 1, value2); 727 AddClock(ref_xtal, "clk_emi", value3 ? DISABLED : FROM_PARENT, 1, value2);
701 else 728 else
702 AddClock(ref_xtal, "clk_emi", INVALID); 729 AddClock(ref_xtal, "clk_emi", INVALID);
@@ -707,27 +734,27 @@ void ClockAnalyser::FillTreeIMX233()
707 734
708 QTreeWidgetItem *ref_vid = AddClock(ref_pll, "clk_vid", FROM_PARENT); 735 QTreeWidgetItem *ref_vid = AddClock(ref_pll, "clk_vid", FROM_PARENT);
709 736
710 if(helper.ReadRegisterField("CLKCTRL", "TV", "CLK_TV108M_GATE", value) && 737 if(ReadFieldOld("CLKCTRL", "TV", "CLK_TV108M_GATE", value) &&
711 helper.ReadRegisterField("CLKCTRL", "TV", "CLK_TV_GATE", value2)) 738 ReadFieldOld("CLKCTRL", "TV", "CLK_TV_GATE", value2))
712 { 739 {
713 QTreeWidgetItem *clk_tv108m = AddClock(ref_vid, "clk_tv108m", value ? DISABLED : FROM_PARENT, 1, 4); 740 QTreeWidgetItem *clk_tv108m = AddClock(ref_vid, "clk_tv108m", value ? DISABLED : FROM_PARENT, 1, 4);
714 AddClock(clk_tv108m, "clk_tv54m", value2 ? DISABLED : FROM_PARENT, 1, 2); 741 AddClock(clk_tv108m, "clk_tv54m", value2 ? DISABLED : FROM_PARENT, 1, 2);
715 AddClock(clk_tv108m, "clk_tv27m", value2 ? DISABLED : FROM_PARENT, 1, 4); 742 AddClock(clk_tv108m, "clk_tv27m", value2 ? DISABLED : FROM_PARENT, 1, 4);
716 } 743 }
717 744
718 if(helper.ReadRegisterField("CLKCTRL", "PLLCTRL0", "EN_USB_CLKS", value)) 745 if(ReadFieldOld("CLKCTRL", "PLLCTRL0", "EN_USB_CLKS", value))
719 AddClock(ref_pll, "utmi_clk480m", value ? FROM_PARENT : DISABLED); 746 AddClock(ref_pll, "utmi_clk480m", value ? FROM_PARENT : DISABLED);
720 else 747 else
721 AddClock(ref_pll, "utmi_clk480m", INVALID); 748 AddClock(ref_pll, "utmi_clk480m", INVALID);
722 749
723 QTreeWidgetItem *xtal_clk32k = 0; 750 QTreeWidgetItem *xtal_clk32k = 0;
724 if(helper.ReadRegisterField("RTC", "PERSISTENT0", "XTAL32_FREQ", value) && 751 if(ReadFieldOld("RTC", "PERSISTENT0", "XTAL32_FREQ", value) &&
725 helper.ReadRegisterField("RTC", "PERSISTENT0", "XTAL32KHZ_PWRUP", value2)) 752 ReadFieldOld("RTC", "PERSISTENT0", "XTAL32KHZ_PWRUP", value2))
726 xtal_clk32k = AddClock(0, "xtal_clk32k", value2 == 0 ? DISABLED : value ? 32000 : 32768); 753 xtal_clk32k = AddClock(0, "xtal_clk32k", value2 == 0 ? DISABLED : value ? 32000 : 32768);
727 else 754 else
728 xtal_clk32k = AddClock(0, "xtal_clk32k", INVALID); 755 xtal_clk32k = AddClock(0, "xtal_clk32k", INVALID);
729 756
730 if(helper.ReadRegisterField("RTC", "PERSISTENT0", "CLOCKSOURCE", value)) 757 if(ReadFieldOld("RTC", "PERSISTENT0", "CLOCKSOURCE", value))
731 AddClock(value ? xtal_clk32k : ref_xtal, "clk_rtc32k", FROM_PARENT, 1, value ? 1 : 768); 758 AddClock(value ? xtal_clk32k : ref_xtal, "clk_rtc32k", FROM_PARENT, 1, value ? 1 : 768);
732 else 759 else
733 AddClock(ref_xtal, "clk_rtc32k", INVALID); 760 AddClock(ref_xtal, "clk_rtc32k", INVALID);
@@ -742,8 +769,8 @@ static TmplAnalyserFactory< ClockAnalyser > g_clock_factory(true, "Clock Analyse
742/** 769/**
743 * EMI analyser 770 * EMI analyser
744 */ 771 */
745EmiAnalyser::EmiAnalyser(const SocRef& soc, IoBackend *backend) 772EmiAnalyser::EmiAnalyser(const soc_desc::soc_ref_t& soc, IoBackend *backend)
746 :Analyser(soc, backend) 773 :AnalyserEx(soc, backend)
747{ 774{
748 m_display_mode = DisplayCycles; 775 m_display_mode = DisplayCycles;
749 m_group = new QGroupBox("EMI Analyser"); 776 m_group = new QGroupBox("EMI Analyser");
@@ -870,26 +897,25 @@ void EmiAnalyser::FillTable()
870{ 897{
871 while(m_panel->count() > 0) 898 while(m_panel->count() > 0)
872 m_panel->removeItem(0); 899 m_panel->removeItem(0);
873 BackendHelper helper(m_io_backend, m_soc);
874 soc_word_t value; 900 soc_word_t value;
875 901
876 m_emi_freq = 0; 902 m_emi_freq = 0;
877 if(helper.ReadRegisterField("CLKCTRL", "CLKSEQ", "BYPASS_EMI", value)) 903 if(ReadFieldOld("CLKCTRL", "CLKSEQ", "BYPASS_EMI", value))
878 { 904 {
879 bool ret; 905 bool ret;
880 if(value) 906 if(value)
881 { 907 {
882 m_emi_freq = 24000000; 908 m_emi_freq = 24000000;
883 ret = helper.ReadRegisterField("CLKCTRL", "EMI", "DIV_XTAL", value); 909 ret = ReadFieldOld("CLKCTRL", "EMI", "DIV_XTAL", value);
884 } 910 }
885 else 911 else
886 { 912 {
887 m_emi_freq = 480000000; 913 m_emi_freq = 480000000;
888 if(helper.ReadRegisterField("CLKCTRL", "FRAC", "EMIFRAC", value)) 914 if(ReadFieldOld("CLKCTRL", "FRAC", "EMIFRAC", value))
889 m_emi_freq = 18 * (int64_t)m_emi_freq / value; 915 m_emi_freq = 18 * (int64_t)m_emi_freq / value;
890 else 916 else
891 m_emi_freq = 0; 917 m_emi_freq = 0;
892 ret = helper.ReadRegisterField("CLKCTRL", "EMI", "DIV_EMI", value); 918 ret = ReadFieldOld("CLKCTRL", "EMI", "DIV_EMI", value);
893 } 919 }
894 if(ret) 920 if(ret)
895 m_emi_freq /= value; 921 m_emi_freq /= value;
@@ -900,7 +926,7 @@ void EmiAnalyser::FillTable()
900 m_emi_freq_label->setText(QString().sprintf("%.3f", m_emi_freq / 1000000.0)); 926 m_emi_freq_label->setText(QString().sprintf("%.3f", m_emi_freq / 1000000.0));
901 927
902 NewGroup("Control Parameters"); 928 NewGroup("Control Parameters");
903 if(helper.ReadRegisterField("EMI", "CTRL", "PORT_PRIORITY_ORDER", value)) 929 if(ReadFieldOld("EMI", "CTRL", "PORT_PRIORITY_ORDER", value))
904 { 930 {
905 QStringList ports; 931 QStringList ports;
906 ports << "AXI0" << "AHB1" << "AHB2" << "AHB3"; 932 ports << "AXI0" << "AHB1" << "AHB2" << "AHB3";
@@ -913,38 +939,38 @@ void EmiAnalyser::FillTable()
913 AddLine("Port Priority Order", value, "", order); 939 AddLine("Port Priority Order", value, "", order);
914 } 940 }
915 941
916 if(helper.ReadRegisterField("EMI", "CTRL", "MEM_WIDTH", value)) 942 if(ReadFieldOld("EMI", "CTRL", "MEM_WIDTH", value))
917 AddLine("Memory Width", value ? 16 : 8, "-bit"); 943 AddLine("Memory Width", value ? 16 : 8, "-bit");
918 944
919 if(helper.ReadRegisterField("DRAM", "CTL03", "AP", value)) 945 if(ReadFieldOld("DRAM", "CTL03", "AP", value))
920 AddLine("Auto Pre-Charge", NONE, value ? "Yes" : "No"); 946 AddLine("Auto Pre-Charge", NONE, value ? "Yes" : "No");
921 947
922 bool bypass_mode = false; 948 bool bypass_mode = false;
923 if(helper.ReadRegisterField("DRAM", "CTL04", "DLL_BYPASS_MODE", value)) 949 if(ReadFieldOld("DRAM", "CTL04", "DLL_BYPASS_MODE", value))
924 { 950 {
925 bypass_mode = value == 1; 951 bypass_mode = value == 1;
926 AddLine("DLL Bypass Mode", NONE, value ? "Yes" : "No"); 952 AddLine("DLL Bypass Mode", NONE, value ? "Yes" : "No");
927 } 953 }
928 954
929 if(helper.ReadRegisterField("DRAM", "CTL05", "EN_LOWPOWER_MODE", value)) 955 if(ReadFieldOld("DRAM", "CTL05", "EN_LOWPOWER_MODE", value))
930 AddLine("Low Power Mode", NONE, value ? "Enabled" : "Disabled"); 956 AddLine("Low Power Mode", NONE, value ? "Enabled" : "Disabled");
931 957
932 if(helper.ReadRegisterField("DRAM", "CTL08", "SREFRESH", value)) 958 if(ReadFieldOld("DRAM", "CTL08", "SREFRESH", value))
933 AddLine("Self Refresh", NONE, value ? "Yes" : "No"); 959 AddLine("Self Refresh", NONE, value ? "Yes" : "No");
934 960
935 if(helper.ReadRegisterField("DRAM", "CTL08", "SDR_MODE", value)) 961 if(ReadFieldOld("DRAM", "CTL08", "SDR_MODE", value))
936 AddLine("Mode", NONE, value ? "SDR" : "DDR"); 962 AddLine("Mode", NONE, value ? "SDR" : "DDR");
937 963
938 if(helper.ReadRegisterField("DRAM", "CTL10", "ADDR_PINS", value)) 964 if(ReadFieldOld("DRAM", "CTL10", "ADDR_PINS", value))
939 AddLine("Address Pins", 13 - value, ""); 965 AddLine("Address Pins", 13 - value, "");
940 966
941 if(helper.ReadRegisterField("DRAM", "CTL11", "COLUMN_SIZE", value)) 967 if(ReadFieldOld("DRAM", "CTL11", "COLUMN_SIZE", value))
942 AddLine("Column Size", 12 - value, "-bit"); 968 AddLine("Column Size", 12 - value, "-bit");
943 969
944 if(helper.ReadRegisterField("DRAM", "CTL11", "CASLAT", value)) 970 if(ReadFieldOld("DRAM", "CTL11", "CASLAT", value))
945 AddLine("Encoded CAS", value, "", "Memory device dependent"); 971 AddLine("Encoded CAS", value, "", "Memory device dependent");
946 972
947 if(helper.ReadRegisterField("DRAM", "CTL14", "CS_MAP", value)) 973 if(ReadFieldOld("DRAM", "CTL14", "CS_MAP", value))
948 { 974 {
949 QString v; 975 QString v;
950 for(int i = 0; i < 4; i++) 976 for(int i = 0; i < 4; i++)
@@ -957,12 +983,12 @@ void EmiAnalyser::FillTable()
957 AddLine("Chip Select Pins", NONE, v, ""); 983 AddLine("Chip Select Pins", NONE, v, "");
958 } 984 }
959 985
960 if(helper.ReadRegisterField("DRAM", "CTL37", "TREF_ENABLE", value)) 986 if(ReadFieldOld("DRAM", "CTL37", "TREF_ENABLE", value))
961 AddLine("Refresh Commands", NONE, value ? "Enabled" : "Disabled", "Issue self-refresh every TREF cycles"); 987 AddLine("Refresh Commands", NONE, value ? "Enabled" : "Disabled", "Issue self-refresh every TREF cycles");
962 988
963 NewGroup("Frequency Parameters"); 989 NewGroup("Frequency Parameters");
964 990
965 if(helper.ReadRegisterField("DRAM", "CTL13", "CASLAT_LIN_GATE", value)) 991 if(ReadFieldOld("DRAM", "CTL13", "CASLAT_LIN_GATE", value))
966 { 992 {
967 if(value >= 3 && value <= 10 && value != 9) 993 if(value >= 3 && value <= 10 && value != 9)
968 { 994 {
@@ -972,7 +998,7 @@ void EmiAnalyser::FillTable()
972 else 998 else
973 AddLine("CAS Gate", NONE, "Reserved", "Reserved value"); 999 AddLine("CAS Gate", NONE, "Reserved", "Reserved value");
974 } 1000 }
975 if(helper.ReadRegisterField("DRAM", "CTL13", "CASLAT_LIN", value)) 1001 if(ReadFieldOld("DRAM", "CTL13", "CASLAT_LIN", value))
976 { 1002 {
977 if(value >= 3 && value <= 10 && value != 9) 1003 if(value >= 3 && value <= 10 && value != 9)
978 { 1004 {
@@ -983,97 +1009,97 @@ void EmiAnalyser::FillTable()
983 AddLine("CAS Latency", NONE, "Reserved", "Reserved value"); 1009 AddLine("CAS Latency", NONE, "Reserved", "Reserved value");
984 } 1010 }
985 1011
986 if(helper.ReadRegisterField("DRAM", "CTL12", "TCKE", value)) 1012 if(ReadFieldOld("DRAM", "CTL12", "TCKE", value))
987 AddCycleLine("tCKE", value, value, 0, "Minimum CKE pulse width"); 1013 AddCycleLine("tCKE", value, value, 0, "Minimum CKE pulse width");
988 1014
989 if(helper.ReadRegisterField("DRAM", "CTL15", "TDAL", value)) 1015 if(ReadFieldOld("DRAM", "CTL15", "TDAL", value))
990 AddCycleLine("tDAL", value, value, 0, "Auto pre-charge write recovery time"); 1016 AddCycleLine("tDAL", value, value, 0, "Auto pre-charge write recovery time");
991 1017
992 if(helper.ReadRegisterField("DRAM", "CTL31", "TDLL", value)) 1018 if(ReadFieldOld("DRAM", "CTL31", "TDLL", value))
993 AddCycleLine("tDLL", value, value, 0, "DLL lock time"); 1019 AddCycleLine("tDLL", value, value, 0, "DLL lock time");
994 1020
995 if(helper.ReadRegisterField("DRAM", "CTL10", "TEMRS", value)) 1021 if(ReadFieldOld("DRAM", "CTL10", "TEMRS", value))
996 AddCycleLine("tEMRS", value, value, 0, "Extended mode parameter set time"); 1022 AddCycleLine("tEMRS", value, value, 0, "Extended mode parameter set time");
997 1023
998 if(helper.ReadRegisterField("DRAM", "CTL34", "TINIT", value)) 1024 if(ReadFieldOld("DRAM", "CTL34", "TINIT", value))
999 AddCycleLine("tINIT", value, value, 0, "Initialisation time"); 1025 AddCycleLine("tINIT", value, value, 0, "Initialisation time");
1000 1026
1001 if(helper.ReadRegisterField("DRAM", "CTL16", "TMRD", value)) 1027 if(ReadFieldOld("DRAM", "CTL16", "TMRD", value))
1002 AddCycleLine("tMRD", value, value, 0, "Mode register set command time"); 1028 AddCycleLine("tMRD", value, value, 0, "Mode register set command time");
1003 1029
1004 if(helper.ReadRegisterField("DRAM", "CTL40", "TPDEX", value)) 1030 if(ReadFieldOld("DRAM", "CTL40", "TPDEX", value))
1005 AddCycleLine("tPDEX", value, value, 0, "Power down exit time"); 1031 AddCycleLine("tPDEX", value, value, 0, "Power down exit time");
1006 1032
1007 if(helper.ReadRegisterField("DRAM", "CTL32", "TRAS_MAX", value)) 1033 if(ReadFieldOld("DRAM", "CTL32", "TRAS_MAX", value))
1008 AddCycleLine("tRAS Max", value, value, 0, "Maximum row activate time"); 1034 AddCycleLine("tRAS Max", value, value, 0, "Maximum row activate time");
1009 1035
1010 if(helper.ReadRegisterField("DRAM", "CTL20", "TRAS_MIN", value)) 1036 if(ReadFieldOld("DRAM", "CTL20", "TRAS_MIN", value))
1011 AddCycleLine("tRAS Min", value, value, 0, "Minimum row activate time"); 1037 AddCycleLine("tRAS Min", value, value, 0, "Minimum row activate time");
1012 1038
1013 if(helper.ReadRegisterField("DRAM", "CTL17", "TRC", value)) 1039 if(ReadFieldOld("DRAM", "CTL17", "TRC", value))
1014 AddCycleLine("tRC", value, value, 0, "Activate to activate delay (same bank)"); 1040 AddCycleLine("tRC", value, value, 0, "Activate to activate delay (same bank)");
1015 1041
1016 if(helper.ReadRegisterField("DRAM", "CTL20", "TRCD_INT", value)) 1042 if(ReadFieldOld("DRAM", "CTL20", "TRCD_INT", value))
1017 AddCycleLine("tRCD", value, value, 0, "RAS to CAS"); 1043 AddCycleLine("tRCD", value, value, 0, "RAS to CAS");
1018 1044
1019 if(helper.ReadRegisterField("DRAM", "CTL26", "TREF", value)) 1045 if(ReadFieldOld("DRAM", "CTL26", "TREF", value))
1020 AddCycleLine("tREF", value, value, 0, "Refresh to refresh time"); 1046 AddCycleLine("tREF", value, value, 0, "Refresh to refresh time");
1021 1047
1022 if(helper.ReadRegisterField("DRAM", "CTL21", "TRFC", value)) 1048 if(ReadFieldOld("DRAM", "CTL21", "TRFC", value))
1023 AddCycleLine("tRFC", value, value, 0, "Refresh command time"); 1049 AddCycleLine("tRFC", value, value, 0, "Refresh command time");
1024 1050
1025 if(helper.ReadRegisterField("DRAM", "CTL15", "TRP", value)) 1051 if(ReadFieldOld("DRAM", "CTL15", "TRP", value))
1026 AddCycleLine("tRP", value, value, 0, "Pre-charge command time"); 1052 AddCycleLine("tRP", value, value, 0, "Pre-charge command time");
1027 1053
1028 if(helper.ReadRegisterField("DRAM", "CTL12", "TRRD", value)) 1054 if(ReadFieldOld("DRAM", "CTL12", "TRRD", value))
1029 AddCycleLine("tRRD", value, value, 0, "Activate to activate delay (different banks)"); 1055 AddCycleLine("tRRD", value, value, 0, "Activate to activate delay (different banks)");
1030 1056
1031 if(helper.ReadRegisterField("DRAM", "CTL12", "TWR_INT", value)) 1057 if(ReadFieldOld("DRAM", "CTL12", "TWR_INT", value))
1032 AddCycleLine("tWR", value, value, 0, "Write recovery time"); 1058 AddCycleLine("tWR", value, value, 0, "Write recovery time");
1033 1059
1034 if(helper.ReadRegisterField("DRAM", "CTL13", "TWTR", value)) 1060 if(ReadFieldOld("DRAM", "CTL13", "TWTR", value))
1035 AddCycleLine("tWTR", value, value, 0, "Write to read delay"); 1061 AddCycleLine("tWTR", value, value, 0, "Write to read delay");
1036 1062
1037 if(helper.ReadRegisterField("DRAM", "CTL32", "TXSNR", value)) 1063 if(ReadFieldOld("DRAM", "CTL32", "TXSNR", value))
1038 AddCycleLine("tXSNR", value, value, 0, ""); 1064 AddCycleLine("tXSNR", value, value, 0, "");
1039 1065
1040 if(helper.ReadRegisterField("DRAM", "CTL33", "TXSR", value)) 1066 if(ReadFieldOld("DRAM", "CTL33", "TXSR", value))
1041 AddCycleLine("tXSR", value, value, 0, "Self-refresh exit time"); 1067 AddCycleLine("tXSR", value, value, 0, "Self-refresh exit time");
1042 1068
1043 NewGroup("DLL Parameters"); 1069 NewGroup("DLL Parameters");
1044 1070
1045 if(bypass_mode) 1071 if(bypass_mode)
1046 { 1072 {
1047 if(helper.ReadRegisterField("DRAM", "CTL19", "DLL_DQS_DELAY_BYPASS_0", value)) 1073 if(ReadFieldOld("DRAM", "CTL19", "DLL_DQS_DELAY_BYPASS_0", value))
1048 AddLine("DLL DQS Delay 0", value, "", "In 1/128 fraction of a cycle (bypass mode)"); 1074 AddLine("DLL DQS Delay 0", value, "", "In 1/128 fraction of a cycle (bypass mode)");
1049 1075
1050 if(helper.ReadRegisterField("DRAM", "CTL19", "DLL_DQS_DELAY_BYPASS_0", value)) 1076 if(ReadFieldOld("DRAM", "CTL19", "DLL_DQS_DELAY_BYPASS_0", value))
1051 AddLine("DLL DQS Delay 1", value, "", "In 1/128 fraction of a cycle (bypass mode)"); 1077 AddLine("DLL DQS Delay 1", value, "", "In 1/128 fraction of a cycle (bypass mode)");
1052 1078
1053 if(helper.ReadRegisterField("DRAM", "CTL19", "DQS_OUT_SHIFT_BYPASS", value)) 1079 if(ReadFieldOld("DRAM", "CTL19", "DQS_OUT_SHIFT_BYPASS", value))
1054 AddLine("DQS Out Delay", value, "", "(bypass mode)"); 1080 AddLine("DQS Out Delay", value, "", "(bypass mode)");
1055 1081
1056 if(helper.ReadRegisterField("DRAM", "CTL20", "WR_DQS_SHIFT_BYPASS", value)) 1082 if(ReadFieldOld("DRAM", "CTL20", "WR_DQS_SHIFT_BYPASS", value))
1057 AddLine("DQS Write Delay", value, "", "(bypass mode)"); 1083 AddLine("DQS Write Delay", value, "", "(bypass mode)");
1058 } 1084 }
1059 else 1085 else
1060 { 1086 {
1061 if(helper.ReadRegisterField("DRAM", "CTL17", "DLL_START_POINT", value)) 1087 if(ReadFieldOld("DRAM", "CTL17", "DLL_START_POINT", value))
1062 AddLine("DLL Start Point", value, "", "Initial delay count"); 1088 AddLine("DLL Start Point", value, "", "Initial delay count");
1063 1089
1064 if(helper.ReadRegisterField("DRAM", "CTL17", "DLL_INCREMENT", value)) 1090 if(ReadFieldOld("DRAM", "CTL17", "DLL_INCREMENT", value))
1065 AddLine("DLL Increment", value, "", "Delay increment"); 1091 AddLine("DLL Increment", value, "", "Delay increment");
1066 1092
1067 if(helper.ReadRegisterField("DRAM", "CTL18", "DLL_DQS_DELAY_0", value)) 1093 if(ReadFieldOld("DRAM", "CTL18", "DLL_DQS_DELAY_0", value))
1068 AddLine("DLL DQS Delay 0", value, "", "In 1/128 fraction of a cycle"); 1094 AddLine("DLL DQS Delay 0", value, "", "In 1/128 fraction of a cycle");
1069 1095
1070 if(helper.ReadRegisterField("DRAM", "CTL18", "DLL_DQS_DELAY_1", value)) 1096 if(ReadFieldOld("DRAM", "CTL18", "DLL_DQS_DELAY_1", value))
1071 AddLine("DLL DQS Delay 1", value, "", "In 1/128 fraction of a cycle"); 1097 AddLine("DLL DQS Delay 1", value, "", "In 1/128 fraction of a cycle");
1072 1098
1073 if(helper.ReadRegisterField("DRAM", "CTL19", "DQS_OUT_SHIFT", value)) 1099 if(ReadFieldOld("DRAM", "CTL19", "DQS_OUT_SHIFT", value))
1074 AddLine("DQS Out Delay", value, "", ""); 1100 AddLine("DQS Out Delay", value, "", "");
1075 1101
1076 if(helper.ReadRegisterField("DRAM", "CTL20", "WR_DQS_SHIFT", value)) 1102 if(ReadFieldOld("DRAM", "CTL20", "WR_DQS_SHIFT", value))
1077 AddLine("DQS Write Delay", value, "", ""); 1103 AddLine("DQS Write Delay", value, "", "");
1078 } 1104 }
1079 1105
@@ -1090,8 +1116,8 @@ namespace pin_desc
1090#include "../../imxtools/misc/map.h" 1116#include "../../imxtools/misc/map.h"
1091} 1117}
1092 1118
1093PinAnalyser::PinAnalyser(const SocRef& soc, IoBackend *backend) 1119PinAnalyser::PinAnalyser(const soc_desc::soc_ref_t& soc, IoBackend *backend)
1094 :Analyser(soc, backend) 1120 :AnalyserEx(soc, backend)
1095{ 1121{
1096 m_group = new QGroupBox("Pin Analyser"); 1122 m_group = new QGroupBox("Pin Analyser");
1097 QVBoxLayout *layout = new QVBoxLayout; 1123 QVBoxLayout *layout = new QVBoxLayout;
@@ -1129,7 +1155,6 @@ bool PinAnalyser::SupportSoc(const QString& soc_name)
1129 1155
1130void PinAnalyser::FillList() 1156void PinAnalyser::FillList()
1131{ 1157{
1132 BackendHelper helper(m_io_backend, m_soc);
1133 soc_word_t value; 1158 soc_word_t value;
1134 1159
1135 while(m_panel->count() > 0) 1160 while(m_panel->count() > 0)
@@ -1140,7 +1165,7 @@ void PinAnalyser::FillList()
1140 "bga169", "bga100", "lqfp100", "lqfp128", 0, 0, 0, 0 1165 "bga169", "bga100", "lqfp100", "lqfp128", 0, 0, 0, 0
1141 }; 1166 };
1142 1167
1143 if(!helper.ReadRegisterField("DIGCTL", "STATUS", "PACKAGE_TYPE", value)) 1168 if(!ReadFieldOld("DIGCTL", "STATUS", "PACKAGE_TYPE", value))
1144 { 1169 {
1145 m_package_edit->setText("<read error>"); 1170 m_package_edit->setText("<read error>");
1146 return; 1171 return;
@@ -1199,21 +1224,21 @@ void PinAnalyser::FillList()
1199 uint32_t muxsel[2], drive[4], pull, in, out, oe; 1224 uint32_t muxsel[2], drive[4], pull, in, out, oe;
1200 bool error = false; 1225 bool error = false;
1201 for(int i = 0; i < 2; i++) 1226 for(int i = 0; i < 2; i++)
1202 if(!helper.ReadRegister("PINCTRL", QString("MUXSEL%1").arg(bank * 2 + i), muxsel[i])) 1227 if(!ReadRegisterOld("PINCTRL", QString("MUXSELn[%1]").arg(bank * 2 + i), muxsel[i]))
1203 error = true; 1228 error = true;
1204 /* don't make an error for those since some do not exist */ 1229 /* don't make an error for those since some do not exist */
1205 for(int i = 0; i < 4; i++) 1230 for(int i = 0; i < 4; i++)
1206 if(!helper.ReadRegister("PINCTRL", QString("DRIVE%1").arg(bank * 4 + i), drive[i])) 1231 if(!ReadRegisterOld("PINCTRL", QString("DRIVEn[%1]").arg(bank * 4 + i), drive[i]))
1207 drive[i] = 0; 1232 drive[i] = 0;
1208 if(error) 1233 if(error)
1209 continue; 1234 continue;
1210 if(!helper.ReadRegister("PINCTRL", QString("PULL%1").arg(bank), pull)) 1235 if(!ReadRegisterOld("PINCTRL", QString("PULLn[%1]").arg(bank), pull))
1211 pull = 0; 1236 pull = 0;
1212 if(!helper.ReadRegister("PINCTRL", QString("DIN%1").arg(bank), in)) 1237 if(!ReadRegisterOld("PINCTRL", QString("DINn[%1]").arg(bank), in))
1213 in = 0; 1238 in = 0;
1214 if(!helper.ReadRegister("PINCTRL", QString("DOUT%1").arg(bank), out)) 1239 if(!ReadRegisterOld("PINCTRL", QString("DOUTn[%1]").arg(bank), out))
1215 out = 0; 1240 out = 0;
1216 if(!helper.ReadRegister("PINCTRL", QString("DOE%1").arg(bank), oe)) 1241 if(!ReadRegisterOld("PINCTRL", QString("DOEn[%1]").arg(bank), oe))
1217 oe = 0; 1242 oe = 0;
1218 1243
1219 for(int pin = 0; pin < 32; pin++) 1244 for(int pin = 0; pin < 32; pin++)