diff options
Diffstat (limited to 'utils/hwstub/stub/atj213x/crt0.S')
-rw-r--r-- | utils/hwstub/stub/atj213x/crt0.S | 30 |
1 files changed, 29 insertions, 1 deletions
diff --git a/utils/hwstub/stub/atj213x/crt0.S b/utils/hwstub/stub/atj213x/crt0.S index 16dd2ced8b..d19640c32c 100644 --- a/utils/hwstub/stub/atj213x/crt0.S +++ b/utils/hwstub/stub/atj213x/crt0.S | |||
@@ -5,6 +5,7 @@ | |||
5 | 5 | ||
6 | .set mips32r2 | 6 | .set mips32r2 |
7 | .set noreorder | 7 | .set noreorder |
8 | .set noat | ||
8 | 9 | ||
9 | .section .init.text,"ax",%progbits | 10 | .section .init.text,"ax",%progbits |
10 | 11 | ||
@@ -18,6 +19,30 @@ load_addr: | |||
18 | # account for branch delay slot | 19 | # account for branch delay slot |
19 | # and very first 'di' instruction | 20 | # and very first 'di' instruction |
20 | 21 | ||
22 | core_clk_setup: | ||
23 | la t0, 0xb0010000 # CMU base | ||
24 | li t1, 0x440 # HOSC enable, bypass | ||
25 | sw t1, 0(t0) # CMU_COREPLL | ||
26 | |||
27 | li t1, 0x350 # CORECLKS 24M, CCLKDIV = 1, SCLKDIV = 2, | ||
28 | # PCLKDIV = 4 | ||
29 | sw t1, 0x0c(t0) # CMU_BUSCLK | ||
30 | li t1, 0xc6 # HOSC enable, PLL enable, 6*6M = 36M | ||
31 | sw t1, 0(t0) # CMU_COREPLL | ||
32 | nop | ||
33 | nop | ||
34 | nop | ||
35 | nop | ||
36 | nop | ||
37 | nop | ||
38 | nop | ||
39 | nop # arbitrary 300ns delay as there is no | ||
40 | # PLL lock feedback | ||
41 | li t1, 0x390 # CORECLKS COREPLL, CCLKDIV = 1, SCLKDIV = 2, | ||
42 | # PCLKDIV = 4 | ||
43 | sw t1, 0x0c(t0) # CMU_BUSCLK | ||
44 | |||
45 | cache_setup: | ||
21 | la t0, 0x80000000 # an idx op should use an unmappable address | 46 | la t0, 0x80000000 # an idx op should use an unmappable address |
22 | ori t1, t0, 0x4000 # 16kB cache | 47 | ori t1, t0, 0x4000 # 16kB cache |
23 | mtc0 zero, C0_TAGLO | 48 | mtc0 zero, C0_TAGLO |
@@ -53,11 +78,13 @@ reloc_loop: | |||
53 | # icache invalidate | 78 | # icache invalidate |
54 | 79 | ||
55 | addiu t0, t0, 16 # inc dst addr | 80 | addiu t0, t0, 16 # inc dst addr |
56 | blt t0, t1, reloc_loop | 81 | slt t2, t0, t1 |
82 | bnez t2, reloc_loop | ||
57 | addiu v0, v0, 16 # inc src addr | 83 | addiu v0, v0, 16 # inc src addr |
58 | 84 | ||
59 | entry_point_jump: | 85 | entry_point_jump: |
60 | la t0, entry_point | 86 | la t0, entry_point |
87 | sync | ||
61 | jr.hb t0 | 88 | jr.hb t0 |
62 | nop | 89 | nop |
63 | 90 | ||
@@ -200,6 +227,7 @@ restore: | |||
200 | addiu sp, sp, 84 | 227 | addiu sp, sp, 84 |
201 | move sp, k1 | 228 | move sp, k1 |
202 | eret | 229 | eret |
230 | nop | ||
203 | 231 | ||
204 | .set reorder | 232 | .set reorder |
205 | .set at | 233 | .set at |