diff options
Diffstat (limited to 'utils/hwstub/stub/asm/mips/system.S')
-rw-r--r-- | utils/hwstub/stub/asm/mips/system.S | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/utils/hwstub/stub/asm/mips/system.S b/utils/hwstub/stub/asm/mips/system.S index ab134aed48..97b0207ec9 100644 --- a/utils/hwstub/stub/asm/mips/system.S +++ b/utils/hwstub/stub/asm/mips/system.S | |||
@@ -18,6 +18,7 @@ | |||
18 | * | 18 | * |
19 | ****************************************************************************/ | 19 | ****************************************************************************/ |
20 | #include "mips.h" | 20 | #include "mips.h" |
21 | #include "target-config.h" | ||
21 | 22 | ||
22 | /* Handling of data abort: | 23 | /* Handling of data abort: |
23 | * the code can register a "longjmp" buffer to restore the context in case of | 24 | * the code can register a "longjmp" buffer to restore the context in case of |
@@ -49,3 +50,27 @@ set_data_abort_jmp: | |||
49 | jr ra | 50 | jr ra |
50 | move v0, zero | 51 | move v0, zero |
51 | .set reorder | 52 | .set reorder |
53 | |||
54 | #ifdef CONFIG_FLUSH_CACHES | ||
55 | .set noreorder | ||
56 | .text | ||
57 | .global target_flush_caches | ||
58 | target_flush_caches: | ||
59 | /* commit dcache and invalidate icache */ | ||
60 | la t0, 0x80000000 /* an idx op should use an unmappable address */ | ||
61 | ori t1, t0, DCACHE_SIZE /* cache size */ | ||
62 | reloc_dcache_loop: | ||
63 | cache DCIndexWBInv, 0(t0) /* invalidate and write-back dcache index */ | ||
64 | addiu t0, t0, DCACHE_LINE_SIZE /* bytes per cache line */ | ||
65 | bne t0, t1, reloc_dcache_loop | ||
66 | nop | ||
67 | la t0, 0x80000000 /* an idx op should use an unmappable address */ | ||
68 | ori t1, t0, ICACHE_SIZE /* cache size */ | ||
69 | reloc_icache_loop: | ||
70 | cache ICIndexInv, 0(t0) /* invalidate icache index */ | ||
71 | addiu t0, t0, ICACHE_LINE_SIZE /* bytes per cache line */ | ||
72 | bne t0, t1, reloc_icache_loop | ||
73 | nop | ||
74 | jr ra | ||
75 | nop | ||
76 | #endif | ||