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Diffstat (limited to 'lib/rbcodec/codecs/libopus/silk/arm/macros_armv4.h')
-rw-r--r--lib/rbcodec/codecs/libopus/silk/arm/macros_armv4.h13
1 files changed, 10 insertions, 3 deletions
diff --git a/lib/rbcodec/codecs/libopus/silk/arm/macros_armv4.h b/lib/rbcodec/codecs/libopus/silk/arm/macros_armv4.h
index 3f30e97288..877eb18dd5 100644
--- a/lib/rbcodec/codecs/libopus/silk/arm/macros_armv4.h
+++ b/lib/rbcodec/codecs/libopus/silk/arm/macros_armv4.h
@@ -28,6 +28,11 @@ POSSIBILITY OF SUCH DAMAGE.
28#ifndef SILK_MACROS_ARMv4_H 28#ifndef SILK_MACROS_ARMv4_H
29#define SILK_MACROS_ARMv4_H 29#define SILK_MACROS_ARMv4_H
30 30
31/* This macro only avoids the undefined behaviour from a left shift of
32 a negative value. It should only be used in macros that can't include
33 SigProc_FIX.h. In other cases, use silk_LSHIFT32(). */
34#define SAFE_SHL(a,b) ((opus_int32)((opus_uint32)(a) << (b)))
35
31/* (a32 * (opus_int32)((opus_int16)(b32))) >> 16 output have to be 32bit int */ 36/* (a32 * (opus_int32)((opus_int16)(b32))) >> 16 output have to be 32bit int */
32#undef silk_SMULWB 37#undef silk_SMULWB
33static OPUS_INLINE opus_int32 silk_SMULWB_armv4(opus_int32 a, opus_int16 b) 38static OPUS_INLINE opus_int32 silk_SMULWB_armv4(opus_int32 a, opus_int16 b)
@@ -38,7 +43,7 @@ static OPUS_INLINE opus_int32 silk_SMULWB_armv4(opus_int32 a, opus_int16 b)
38 "#silk_SMULWB\n\t" 43 "#silk_SMULWB\n\t"
39 "smull %0, %1, %2, %3\n\t" 44 "smull %0, %1, %2, %3\n\t"
40 : "=&r"(rd_lo), "=&r"(rd_hi) 45 : "=&r"(rd_lo), "=&r"(rd_hi)
41 : "%r"(a), "r"(b<<16) 46 : "%r"(a), "r"(SAFE_SHL(b,16))
42 ); 47 );
43 return rd_hi; 48 return rd_hi;
44} 49}
@@ -80,7 +85,7 @@ static OPUS_INLINE opus_int32 silk_SMULWW_armv4(opus_int32 a, opus_int32 b)
80 : "=&r"(rd_lo), "=&r"(rd_hi) 85 : "=&r"(rd_lo), "=&r"(rd_hi)
81 : "%r"(a), "r"(b) 86 : "%r"(a), "r"(b)
82 ); 87 );
83 return (rd_hi<<16)+(rd_lo>>16); 88 return SAFE_SHL(rd_hi,16)+(rd_lo>>16);
84} 89}
85#define silk_SMULWW(a, b) (silk_SMULWW_armv4(a, b)) 90#define silk_SMULWW(a, b) (silk_SMULWW_armv4(a, b))
86 91
@@ -96,8 +101,10 @@ static OPUS_INLINE opus_int32 silk_SMLAWW_armv4(opus_int32 a, opus_int32 b,
96 : "=&r"(rd_lo), "=&r"(rd_hi) 101 : "=&r"(rd_lo), "=&r"(rd_hi)
97 : "%r"(b), "r"(c) 102 : "%r"(b), "r"(c)
98 ); 103 );
99 return a+(rd_hi<<16)+(rd_lo>>16); 104 return a+SAFE_SHL(rd_hi,16)+(rd_lo>>16);
100} 105}
101#define silk_SMLAWW(a, b, c) (silk_SMLAWW_armv4(a, b, c)) 106#define silk_SMLAWW(a, b, c) (silk_SMLAWW_armv4(a, b, c))
102 107
108#undef SAFE_SHL
109
103#endif /* SILK_MACROS_ARMv4_H */ 110#endif /* SILK_MACROS_ARMv4_H */