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-rw-r--r--firmware/SOURCES1
-rw-r--r--firmware/export/config-ondavx747.h8
-rw-r--r--firmware/target/mips/ingenic_jz47xx/codec-jz4740.c66
-rw-r--r--firmware/target/mips/ingenic_jz47xx/fmradio-i2c-jz4740.c37
-rw-r--r--firmware/target/mips/ingenic_jz47xx/i2c-jz4740.c40
5 files changed, 133 insertions, 19 deletions
diff --git a/firmware/SOURCES b/firmware/SOURCES
index 8ebdcb79bd..3ee805eedd 100644
--- a/firmware/SOURCES
+++ b/firmware/SOURCES
@@ -1244,6 +1244,7 @@ drivers/qt1106.c
1244target/mips/ingenic_jz47xx/ata-nand-jz4740.c 1244target/mips/ingenic_jz47xx/ata-nand-jz4740.c
1245target/mips/ingenic_jz47xx/ata-sd-jz4740.c 1245target/mips/ingenic_jz47xx/ata-sd-jz4740.c
1246target/mips/ingenic_jz47xx/debug-jz4740.c 1246target/mips/ingenic_jz47xx/debug-jz4740.c
1247target/mips/ingenic_jz47xx/fmradio-i2c-jz4740.c
1247target/mips/ingenic_jz47xx/kernel-jz4740.c 1248target/mips/ingenic_jz47xx/kernel-jz4740.c
1248target/mips/ingenic_jz47xx/i2c-jz4740.c 1249target/mips/ingenic_jz47xx/i2c-jz4740.c
1249target/mips/ingenic_jz47xx/lcd-jz4740.c 1250target/mips/ingenic_jz47xx/lcd-jz4740.c
diff --git a/firmware/export/config-ondavx747.h b/firmware/export/config-ondavx747.h
index b603e02c2b..d735c045e2 100644
--- a/firmware/export/config-ondavx747.h
+++ b/firmware/export/config-ondavx747.h
@@ -94,6 +94,10 @@
94/* define this if you have a real-time clock */ 94/* define this if you have a real-time clock */
95#define CONFIG_RTC RTC_JZ47XX 95#define CONFIG_RTC RTC_JZ47XX
96 96
97/* Tuner config */
98#define CONFIG_TUNER TEA5767
99#define CONFIG_TUNER_XTAL 32768
100
97/* Define this for LCD backlight available */ 101/* Define this for LCD backlight available */
98#define HAVE_BACKLIGHT 102#define HAVE_BACKLIGHT
99#define HAVE_BACKLIGHT_BRIGHTNESS 103#define HAVE_BACKLIGHT_BRIGHTNESS
@@ -122,6 +126,10 @@
122/* Define this if you have the Jz4740 internal codec */ 126/* Define this if you have the Jz4740 internal codec */
123#define HAVE_JZ4740_CODEC 127#define HAVE_JZ4740_CODEC
124 128
129/* Define bitmask of input sources - recordable bitmask can be defined
130 explicitly if different */
131#define INPUT_SRC_CAPS (SRC_CAP_MIC | SRC_CAP_FMRADIO)
132
125/* has no tone controls, so we use the software ones */ 133/* has no tone controls, so we use the software ones */
126#define HAVE_SW_TONE_CONTROLS 134#define HAVE_SW_TONE_CONTROLS
127 135
diff --git a/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c b/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c
index 6a0b6ae340..325a3734d8 100644
--- a/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c
@@ -20,9 +20,10 @@
20 ****************************************************************************/ 20 ****************************************************************************/
21 21
22#include "config.h" 22#include "config.h"
23#include "audio.h"
24#include "audiohw.h"
23#include "jz4740.h" 25#include "jz4740.h"
24#include "system.h" 26#include "system.h"
25#include "audiohw.h"
26 27
27/* TODO */ 28/* TODO */
28const struct sound_settings_info audiohw_settings[] = { 29const struct sound_settings_info audiohw_settings[] = {
@@ -330,3 +331,66 @@ void audiohw_set_frequency(int freq)
330 331
331 REG_ICDC_CDCCR2 = (REG_ICDC_CDCCR2 & ~ICDC_CDCCR2_SMPR(0xF)) | speed; 332 REG_ICDC_CDCCR2 = (REG_ICDC_CDCCR2 & ~ICDC_CDCCR2_SMPR(0xF)) | speed;
332} 333}
334
335int audio_channels = 2;
336int audio_output_source = AUDIO_SRC_PLAYBACK;
337
338void audio_set_output_source(int source)
339{
340 if((unsigned)source >= AUDIO_NUM_SOURCES)
341 source = AUDIO_SRC_PLAYBACK;
342
343 audio_output_source = source;
344} /* audio_set_output_source */
345
346void audio_input_mux(int source, unsigned flags)
347{
348 static int last_source = AUDIO_SRC_PLAYBACK;
349 static bool last_recording = false;
350 bool recording = flags & SRCF_RECORDING;
351
352 switch (source)
353 {
354 default: /* playback - no recording */
355 source = AUDIO_SRC_PLAYBACK;
356 case AUDIO_SRC_PLAYBACK:
357 audio_channels = 2;
358 if(source != last_source)
359 {
360 REG_ICDC_CDCCR1 = (REG_ICDC_CDCCR1 & ~(ICDC_CDCCR1_ELININ | ICDC_CDCCR1_EMIC | ICDC_CDCCR1_EADC | ICDC_CDCCR1_SW1ON | ICDC_CDCCR1_HPMUTE))
361 | (ICDC_CDCCR1_EDAC | ICDC_CDCCR1_SW2ON);
362 }
363 break;
364
365 case AUDIO_SRC_MIC: /* recording only */
366 audio_channels = 1;
367 if(source != last_source)
368 {
369 REG_ICDC_CDCCR1 = (REG_ICDC_CDCCR1 & ~(ICDC_CDCCR1_ELININ | ICDC_CDCCR1_EDAC | ICDC_CDCCR1_SW2ON | ICDC_CDCCR1_HPMUTE))
370 | (ICDC_CDCCR1_EADC | ICDC_CDCCR1_SW1ON | ICDC_CDCCR1_EMIC);
371 }
372 break;
373
374 case AUDIO_SRC_FMRADIO: /* recording and playback */
375 audio_channels = 2;
376
377 if(source == last_source && recording == last_recording)
378 break;
379
380 last_recording = recording;
381
382 if(recording)
383 {
384 REG_ICDC_CDCCR1 = (REG_ICDC_CDCCR1 & ~(ICDC_CDCCR1_EMIC | ICDC_CDCCR1_EDAC | ICDC_CDCCR1_SW2ON | ICDC_CDCCR1_HPMUTE))
385 | (ICDC_CDCCR1_EADC | ICDC_CDCCR1_SW1ON | ICDC_CDCCR1_ELININ);
386 }
387 else
388 {
389 REG_ICDC_CDCCR1 = (REG_ICDC_CDCCR1 & ~(ICDC_CDCCR1_EMIC | ICDC_CDCCR1_EDAC | ICDC_CDCCR1_EADC |
390 ICDC_CDCCR1_SW2ON | ICDC_CDCCR1_HPMUTE)) | (ICDC_CDCCR1_SW1ON | ICDC_CDCCR1_ELININ);
391 }
392 break;
393 } /* end switch */
394
395 last_source = source;
396} /* audio_input_mux */
diff --git a/firmware/target/mips/ingenic_jz47xx/fmradio-i2c-jz4740.c b/firmware/target/mips/ingenic_jz47xx/fmradio-i2c-jz4740.c
new file mode 100644
index 0000000000..995e3ae875
--- /dev/null
+++ b/firmware/target/mips/ingenic_jz47xx/fmradio-i2c-jz4740.c
@@ -0,0 +1,37 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2009 by Maurus Cuelenaere
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "fmradio_i2c.h"
22#include "i2c.h"
23
24/* fmradio i2c wrappers */
25void fmradio_i2c_init(void)
26{
27}
28
29int fmradio_i2c_write(unsigned char address, const unsigned char* buf, int count)
30{
31 return i2c_write(address, buf, count);
32}
33
34int fmradio_i2c_read(unsigned char address, unsigned char* buf, int count)
35{
36 return i2c_read(address, buf, count);
37}
diff --git a/firmware/target/mips/ingenic_jz47xx/i2c-jz4740.c b/firmware/target/mips/ingenic_jz47xx/i2c-jz4740.c
index 5df0e90683..79968889b9 100644
--- a/firmware/target/mips/ingenic_jz47xx/i2c-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/i2c-jz4740.c
@@ -20,6 +20,10 @@
20 * KIND, either express or implied. 20 * KIND, either express or implied.
21 * 21 *
22 ****************************************************************************/ 22 ****************************************************************************/
23#include "config.h"
24#include "system.h"
25#include "jz4740.h"
26#include "logf.h"
23 27
24/* 28/*
25 * Jz4740 I2C routines. 29 * Jz4740 I2C routines.
@@ -42,15 +46,9 @@
42 * 46 *
43 */ 47 */
44 48
45#include "config.h"
46#include "system.h"
47#include "jz4740.h"
48#include "logf.h"
49
50
51/* I2C protocol */ 49/* I2C protocol */
52#define I2C_READ 1 50#define I2C_READ 1
53#define I2C_WRITE 0 51#define I2C_WRITE 0
54 52
55#define TIMEOUT 1000 53#define TIMEOUT 1000
56 54
@@ -84,7 +82,7 @@ static int i2c_put_data_nack(unsigned char data)
84 while (__i2c_check_drf() != 0); 82 while (__i2c_check_drf() != 0);
85 while (!__i2c_transmit_ended()); 83 while (!__i2c_transmit_ended());
86 while (timeout--); 84 while (timeout--);
87 85
88 return 0; 86 return 0;
89} 87}
90#endif 88#endif
@@ -121,13 +119,13 @@ void i2c_setclk(unsigned int i2cclk)
121/* 119/*
122 * I2C interface 120 * I2C interface
123 */ 121 */
124void i2c_open(void) 122static void i2c_open(void)
125{ 123{
126 i2c_setclk(10000); /* default 10 KHz */ 124 i2c_setclk(10000); /* default 10 KHz */
127 __i2c_enable(); 125 __i2c_enable();
128} 126}
129 127
130void i2c_close(void) 128static void i2c_close(void)
131{ 129{
132 udelay(300); /* wait for STOP goes over. */ 130 udelay(300); /* wait for STOP goes over. */
133 __i2c_disable(); 131 __i2c_disable();
@@ -137,21 +135,23 @@ int i2c_read(int device, unsigned char *buf, int count)
137{ 135{
138 int cnt = count; 136 int cnt = count;
139 int timeout = 5; 137 int timeout = 5;
140 138
141 device &= 0xFF; 139 device &= 0xFF;
142 140
141 i2c_open();
142
143L_try_again: 143L_try_again:
144 if (timeout < 0) 144 if (timeout < 0)
145 goto L_timeout; 145 goto L_timeout;
146 146
147 __i2c_send_nack(); /* Master does not send ACK, slave sends it */ 147 __i2c_send_nack(); /* Master does not send ACK, slave sends it */
148 148
149 __i2c_send_start(); 149 __i2c_send_start();
150 if (i2c_put_data( (device << 1) | I2C_READ ) < 0) 150 if (i2c_put_data( (device << 1) | I2C_READ ) < 0)
151 goto device_err; 151 goto device_err;
152 152
153 __i2c_send_ack(); /* Master sends ACK for continue reading */ 153 __i2c_send_ack(); /* Master sends ACK for continue reading */
154 154
155 while (cnt) 155 while (cnt)
156 { 156 {
157 if (cnt == 1) 157 if (cnt == 1)
@@ -170,7 +170,7 @@ L_try_again:
170 170
171 __i2c_send_stop(); 171 __i2c_send_stop();
172 return count - cnt; 172 return count - cnt;
173 173
174device_err: 174device_err:
175 timeout--; 175 timeout--;
176 __i2c_send_stop(); 176 __i2c_send_stop();
@@ -179,6 +179,7 @@ device_err:
179L_timeout: 179L_timeout:
180 __i2c_send_stop(); 180 __i2c_send_stop();
181 logf("Read I2C device 0x%2x failed.", device); 181 logf("Read I2C device 0x%2x failed.", device);
182 i2c_close();
182 return -1; 183 return -1;
183} 184}
184 185
@@ -186,9 +187,11 @@ int i2c_write(int device, unsigned char *buf, int count)
186{ 187{
187 int cnt = count; 188 int cnt = count;
188 int timeout = 5; 189 int timeout = 5;
189 190
190 device &= 0xFF; 191 device &= 0xFF;
191 192
193 i2c_open();
194
192 __i2c_send_nack(); /* Master does not send ACK, slave sends it */ 195 __i2c_send_nack(); /* Master does not send ACK, slave sends it */
193 196
194W_try_again: 197W_try_again:
@@ -200,7 +203,7 @@ W_try_again:
200 __i2c_send_start(); 203 __i2c_send_start();
201 if (i2c_put_data( (device << 1) | I2C_WRITE ) < 0) 204 if (i2c_put_data( (device << 1) | I2C_WRITE ) < 0)
202 goto device_err; 205 goto device_err;
203 206
204#if 0 //CONFIG_JZ_TPANEL_ATA2508 207#if 0 //CONFIG_JZ_TPANEL_ATA2508
205 if (address == 0xff) 208 if (address == 0xff)
206 { 209 {
@@ -226,7 +229,7 @@ W_try_again:
226 229
227 __i2c_send_stop(); 230 __i2c_send_stop();
228 return count - cnt; 231 return count - cnt;
229 232
230device_err: 233device_err:
231 timeout--; 234 timeout--;
232 __i2c_send_stop(); 235 __i2c_send_stop();
@@ -235,6 +238,7 @@ device_err:
235W_timeout: 238W_timeout:
236 logf("Write I2C device 0x%2x failed.", device); 239 logf("Write I2C device 0x%2x failed.", device);
237 __i2c_send_stop(); 240 __i2c_send_stop();
241 i2c_close();
238 return -1; 242 return -1;
239} 243}
240 244