diff options
Diffstat (limited to 'firmware')
-rw-r--r-- | firmware/export/rk27xx.h | 33 | ||||
-rw-r--r-- | firmware/target/arm/rk27xx/kernel-rk27xx.c | 4 | ||||
-rw-r--r-- | firmware/target/arm/rk27xx/pcm-rk27xx.c | 8 | ||||
-rw-r--r-- | firmware/target/arm/rk27xx/sd-rk27xx.c | 4 | ||||
-rw-r--r-- | firmware/target/arm/rk27xx/timer-rk27xx.c | 8 | ||||
-rw-r--r-- | firmware/target/arm/rk27xx/usb-drv-rk27xx.c | 4 |
6 files changed, 49 insertions, 12 deletions
diff --git a/firmware/export/rk27xx.h b/firmware/export/rk27xx.h index 6f5859f6f8..58b3fe8166 100644 --- a/firmware/export/rk27xx.h +++ b/firmware/export/rk27xx.h | |||
@@ -489,6 +489,39 @@ | |||
489 | #define INTC_ICCR (*(volatile unsigned long *)(AHB0_INTC + 0x118)) | 489 | #define INTC_ICCR (*(volatile unsigned long *)(AHB0_INTC + 0x118)) |
490 | #define INTC_ISCR (*(volatile unsigned long *)(AHB0_INTC + 0x11C)) | 490 | #define INTC_ISCR (*(volatile unsigned long *)(AHB0_INTC + 0x11C)) |
491 | 491 | ||
492 | #define IRQ_ARM_UART0 (1<<0) | ||
493 | #define IRQ_ARM_UART1 (1<<1) | ||
494 | #define IRQ_ARM_TIMER0 (1<<2) | ||
495 | #define IRQ_ARM_TIMER1 (1<<3) | ||
496 | #define IRQ_ARM_TIMER2 (1<<4) | ||
497 | #define IRQ_ARM_GPIO0 (1<<5) | ||
498 | #define IRQ_ARM_SW (1<<6) | ||
499 | #define IRQ_ARM_MAILBOX (1<<7) | ||
500 | #define IRQ_ARM_RTC (1<<8) | ||
501 | #define IRQ_ARM_SCU (1<<9) | ||
502 | #define IRQ_ARM_SD (1<<10) | ||
503 | #define IRQ_ARM_SPI (1<<11) | ||
504 | #define IRQ_ARM_HDMA (1<<12) | ||
505 | #define IRQ_ARM_A2A (1<<13) | ||
506 | #define IRQ_ARM_I2C (1<<14) | ||
507 | #define IRQ_ARM_I2S (1<<15) | ||
508 | #define IRQ_ARM_UDC (1<<16) | ||
509 | #define IRQ_ARM_UHC (1<<17) | ||
510 | #define IRQ_ARM_PWM0 (1<<18) | ||
511 | #define IRQ_ARM_PWM1 (1<<19) | ||
512 | #define IRQ_ARM_PWM2 (1<<20) | ||
513 | #define IRQ_ARM_PWM3 (1<<21) | ||
514 | #define IRQ_ARM_ADC (1<<22) | ||
515 | #define IRQ_ARM_GPIO1 (1<<23) | ||
516 | #define IRQ_ARM_VIP (1<<24) | ||
517 | #define IRQ_ARM_DWDMA (1<<25) | ||
518 | #define IRQ_ARM_NANDC (1<<26) | ||
519 | #define IRQ_ARM_LCDC (1<<27) | ||
520 | #define IRQ_ARM_DSP (1<<28) | ||
521 | #define IRQ_ARM_SW1 (1<<29) | ||
522 | #define IRQ_ARM_SW2 (1<<30) | ||
523 | #define IRQ_ARM_SW3 (1<<31) | ||
524 | |||
492 | #define INTC_TEST (*(volatile unsigned long *)(AHB0_INTC + 0x124)) | 525 | #define INTC_TEST (*(volatile unsigned long *)(AHB0_INTC + 0x124)) |
493 | 526 | ||
494 | /* Bus arbiter module */ | 527 | /* Bus arbiter module */ |
diff --git a/firmware/target/arm/rk27xx/kernel-rk27xx.c b/firmware/target/arm/rk27xx/kernel-rk27xx.c index 26911c0ad6..012cc9acc7 100644 --- a/firmware/target/arm/rk27xx/kernel-rk27xx.c +++ b/firmware/target/arm/rk27xx/kernel-rk27xx.c | |||
@@ -46,9 +46,9 @@ void tick_start(unsigned int interval_in_ms) | |||
46 | TMR0CON = (1<<8) | (1<<7) | (1<<1); /* periodic, 1/1, interrupt enable */ | 46 | TMR0CON = (1<<8) | (1<<7) | (1<<1); /* periodic, 1/1, interrupt enable */ |
47 | 47 | ||
48 | /* unmask timer0 interrupt */ | 48 | /* unmask timer0 interrupt */ |
49 | INTC_IMR |= 0x04; | 49 | INTC_IMR |= IRQ_ARM_TIMER0; |
50 | 50 | ||
51 | /* enable timer0 interrupt */ | 51 | /* enable timer0 interrupt */ |
52 | INTC_IECR |= 0x04; | 52 | INTC_IECR |= IRQ_ARM_TIMER0; |
53 | } | 53 | } |
54 | 54 | ||
diff --git a/firmware/target/arm/rk27xx/pcm-rk27xx.c b/firmware/target/arm/rk27xx/pcm-rk27xx.c index 56c191a0d6..a4ce568a83 100644 --- a/firmware/target/arm/rk27xx/pcm-rk27xx.c +++ b/firmware/target/arm/rk27xx/pcm-rk27xx.c | |||
@@ -35,7 +35,7 @@ void pcm_play_lock(void) | |||
35 | if (++locked == 1) | 35 | if (++locked == 1) |
36 | { | 36 | { |
37 | int old = disable_irq_save(); | 37 | int old = disable_irq_save(); |
38 | INTC_IMR &= ~(1<<12); /* mask HDMA interrupt */ | 38 | INTC_IMR &= ~IRQ_ARM_HDMA; /* mask HDMA interrupt */ |
39 | restore_irq(old); | 39 | restore_irq(old); |
40 | } | 40 | } |
41 | } | 41 | } |
@@ -46,7 +46,7 @@ void pcm_play_unlock(void) | |||
46 | if(--locked == 0) | 46 | if(--locked == 0) |
47 | { | 47 | { |
48 | int old = disable_irq_save(); | 48 | int old = disable_irq_save(); |
49 | INTC_IMR |= (1<<12); /* unmask HDMA interrupt */ | 49 | INTC_IMR |= IRQ_ARM_HDMA; /* unmask HDMA interrupt */ |
50 | restore_irq(old); | 50 | restore_irq(old); |
51 | } | 51 | } |
52 | } | 52 | } |
@@ -241,8 +241,8 @@ static void set_codec_freq(unsigned int freq) | |||
241 | void pcm_play_dma_init(void) | 241 | void pcm_play_dma_init(void) |
242 | { | 242 | { |
243 | /* unmask HDMA interrupt in INTC */ | 243 | /* unmask HDMA interrupt in INTC */ |
244 | INTC_IMR |= (1<<12); | 244 | INTC_IMR |= IRQ_ARM_HDMA; |
245 | INTC_IECR |= (1<<12); | 245 | INTC_IECR |= IRQ_ARM_HDMA; |
246 | 246 | ||
247 | audiohw_preinit(); | 247 | audiohw_preinit(); |
248 | 248 | ||
diff --git a/firmware/target/arm/rk27xx/sd-rk27xx.c b/firmware/target/arm/rk27xx/sd-rk27xx.c index cb5c02e0b6..d6a3b11a50 100644 --- a/firmware/target/arm/rk27xx/sd-rk27xx.c +++ b/firmware/target/arm/rk27xx/sd-rk27xx.c | |||
@@ -402,8 +402,8 @@ static void init_controller(void) | |||
402 | 402 | ||
403 | /* enable and unmask SD interrupts in interrupt controller */ | 403 | /* enable and unmask SD interrupts in interrupt controller */ |
404 | SCU_CLKCFG &= ~CLKCFG_SD; | 404 | SCU_CLKCFG &= ~CLKCFG_SD; |
405 | INTC_IMR |= (1<<10); | 405 | INTC_IMR |= IRQ_ARM_SD; |
406 | INTC_IECR |= (1<<10); | 406 | INTC_IECR |= IRQ_ARM_SD; |
407 | 407 | ||
408 | SD_CTRL = SD_PWR_CPU | SD_DETECT_MECH | SD_CLOCK_EN | 0x7D; | 408 | SD_CTRL = SD_PWR_CPU | SD_DETECT_MECH | SD_CLOCK_EN | 0x7D; |
409 | SD_INT = CMD_RES_INT_EN | DATA_XFER_INT_EN; | 409 | SD_INT = CMD_RES_INT_EN | DATA_XFER_INT_EN; |
diff --git a/firmware/target/arm/rk27xx/timer-rk27xx.c b/firmware/target/arm/rk27xx/timer-rk27xx.c index 4493ccdfa9..116f169e2d 100644 --- a/firmware/target/arm/rk27xx/timer-rk27xx.c +++ b/firmware/target/arm/rk27xx/timer-rk27xx.c | |||
@@ -52,10 +52,10 @@ bool timer_set(long cycles, bool start) | |||
52 | TMR1CON = (1<<7) | (1<<1); /* periodic, 1/1 */ | 52 | TMR1CON = (1<<7) | (1<<1); /* periodic, 1/1 */ |
53 | 53 | ||
54 | /* unmask timer1 interrupt */ | 54 | /* unmask timer1 interrupt */ |
55 | INTC_IMR |= (1<<3); | 55 | INTC_IMR |= IRQ_ARM_TIMER1; |
56 | 56 | ||
57 | /* enable timer1 interrupt */ | 57 | /* enable timer1 interrupt */ |
58 | INTC_IECR |= (1<<3); | 58 | INTC_IECR |= IRQ_ARM_TIMER1; |
59 | 59 | ||
60 | return true; | 60 | return true; |
61 | } | 61 | } |
@@ -70,5 +70,9 @@ bool timer_start(void) | |||
70 | void timer_stop(void) | 70 | void timer_stop(void) |
71 | { | 71 | { |
72 | TMR1CON &= ~(1 << 8); /* timer1 disable */ | 72 | TMR1CON &= ~(1 << 8); /* timer1 disable */ |
73 | |||
74 | /* disable timer1 interrupt */ | ||
75 | INTC_IMR &= ~IRQ_ARM_TIMER1; | ||
76 | INTC_IECR &= ~IRQ_ARM_TIMER1; | ||
73 | } | 77 | } |
74 | 78 | ||
diff --git a/firmware/target/arm/rk27xx/usb-drv-rk27xx.c b/firmware/target/arm/rk27xx/usb-drv-rk27xx.c index 9fdfe64f62..e60bef584f 100644 --- a/firmware/target/arm/rk27xx/usb-drv-rk27xx.c +++ b/firmware/target/arm/rk27xx/usb-drv-rk27xx.c | |||
@@ -715,8 +715,8 @@ void usb_drv_exit(void) | |||
715 | DEV_CTL = DEV_SELF_PWR; | 715 | DEV_CTL = DEV_SELF_PWR; |
716 | 716 | ||
717 | /* disable USB interrupts in interrupt controller */ | 717 | /* disable USB interrupts in interrupt controller */ |
718 | INTC_IMR &= ~(1<<16); | 718 | INTC_IMR &= ~IRQ_ARM_UDC; |
719 | INTC_IECR &= ~(1<<16); | 719 | INTC_IECR &= ~IRQ_ARM_UDC; |
720 | 720 | ||
721 | /* we cannot disable UDC clock since this causes data abort | 721 | /* we cannot disable UDC clock since this causes data abort |
722 | * when reading DEV_INFO in order to check usb connect event | 722 | * when reading DEV_INFO in order to check usb connect event |