diff options
Diffstat (limited to 'firmware')
-rw-r--r-- | firmware/mpeg.c | 29 |
1 files changed, 25 insertions, 4 deletions
diff --git a/firmware/mpeg.c b/firmware/mpeg.c index b5d82897f0..0eb041f63d 100644 --- a/firmware/mpeg.c +++ b/firmware/mpeg.c | |||
@@ -1931,8 +1931,8 @@ static void init_recording(void) | |||
1931 | val = 0; | 1931 | val = 0; |
1932 | mas_writemem(MAS_BANK_D0, 0x7f9, &val, 1); | 1932 | mas_writemem(MAS_BANK_D0, 0x7f9, &val, 1); |
1933 | 1933 | ||
1934 | /* Set Demand mode and validate all settings */ | 1934 | /* Set Demand mode, no monitoring and validate all settings */ |
1935 | val = 0x25; | 1935 | val = 0x125; |
1936 | mas_writemem(MAS_BANK_D0, 0x7f1, &val, 1); | 1936 | mas_writemem(MAS_BANK_D0, 0x7f1, &val, 1); |
1937 | 1937 | ||
1938 | /* Start the encoder application */ | 1938 | /* Start the encoder application */ |
@@ -1943,6 +1943,13 @@ static void init_recording(void) | |||
1943 | mas_readmem(MAS_BANK_D0, 0x7f7, &val, 1); | 1943 | mas_readmem(MAS_BANK_D0, 0x7f7, &val, 1); |
1944 | } while(!(val & 0x40)); | 1944 | } while(!(val & 0x40)); |
1945 | 1945 | ||
1946 | /* We have started the recording application with monitoring OFF. | ||
1947 | This is because we want to record at least one frame to fill the DMA | ||
1948 | buffer, because the silly MAS will not negate EOD until at least one | ||
1949 | DMA transfer has taken place. | ||
1950 | Now let's wait for some data to be encoded. */ | ||
1951 | sleep(20); | ||
1952 | |||
1946 | /* Disable IRQ6 */ | 1953 | /* Disable IRQ6 */ |
1947 | IPRB &= 0xff0f; | 1954 | IPRB &= 0xff0f; |
1948 | 1955 | ||
@@ -2026,6 +2033,14 @@ static void start_recording(void) | |||
2026 | val |= 1; | 2033 | val |= 1; |
2027 | mas_writemem(MAS_BANK_D0, 0x7f1, &val, 1); | 2034 | mas_writemem(MAS_BANK_D0, 0x7f1, &val, 1); |
2028 | 2035 | ||
2036 | /* Wait until the DSP has accepted the settings */ | ||
2037 | do | ||
2038 | { | ||
2039 | mas_readmem(MAS_BANK_D0, 0x7f1, &val,1); | ||
2040 | } while(val & 1); | ||
2041 | |||
2042 | sleep(20); | ||
2043 | |||
2029 | /* Read the current frame */ | 2044 | /* Read the current frame */ |
2030 | mas_readmem(MAS_BANK_D0, 0xfd0, &record_start_frame, 1); | 2045 | mas_readmem(MAS_BANK_D0, 0xfd0, &record_start_frame, 1); |
2031 | 2046 | ||
@@ -2044,6 +2059,12 @@ static void stop_recording(void) | |||
2044 | val |= (1 << 10) | 1; | 2059 | val |= (1 << 10) | 1; |
2045 | mas_writemem(MAS_BANK_D0, 0x7f1, &val, 1); | 2060 | mas_writemem(MAS_BANK_D0, 0x7f1, &val, 1); |
2046 | 2061 | ||
2062 | /* Wait until the DSP has accepted the settings */ | ||
2063 | do | ||
2064 | { | ||
2065 | mas_readmem(MAS_BANK_D0, 0x7f1, &val,1); | ||
2066 | } while(val & 1); | ||
2067 | |||
2047 | drain_dma_buffer(); | 2068 | drain_dma_buffer(); |
2048 | } | 2069 | } |
2049 | 2070 | ||
@@ -2617,7 +2638,7 @@ void mpeg_set_recording_options(int frequency, int quality, | |||
2617 | 2638 | ||
2618 | DEBUGF("mas_writemem(MAS_BANK_D0, 0x7f0, %x)\n", val); | 2639 | DEBUGF("mas_writemem(MAS_BANK_D0, 0x7f0, %x)\n", val); |
2619 | 2640 | ||
2620 | val = ((1 << 10) | /* Monitoring on */ | 2641 | val = ((!is_recording << 10) | /* Monitoring */ |
2621 | ((source < 2)?1:2) << 8) | /* Input select */ | 2642 | ((source < 2)?1:2) << 8) | /* Input select */ |
2622 | (1 << 5) | /* SDO strobe invert */ | 2643 | (1 << 5) | /* SDO strobe invert */ |
2623 | ((is_mpeg1?0:1) << 3) | | 2644 | ((is_mpeg1?0:1) << 3) | |
@@ -2626,7 +2647,7 @@ void mpeg_set_recording_options(int frequency, int quality, | |||
2626 | mas_writemem(MAS_BANK_D0, 0x7f1, &val,1); | 2647 | mas_writemem(MAS_BANK_D0, 0x7f1, &val,1); |
2627 | 2648 | ||
2628 | DEBUGF("mas_writemem(MAS_BANK_D0, 0x7f1, %x)\n", val); | 2649 | DEBUGF("mas_writemem(MAS_BANK_D0, 0x7f1, %x)\n", val); |
2629 | 2650 | ||
2630 | drain_dma_buffer(); | 2651 | drain_dma_buffer(); |
2631 | 2652 | ||
2632 | if(source == 0) /* Mic */ | 2653 | if(source == 0) /* Mic */ |