2 files changed, 9 insertions, 0 deletions

diff --git a/firmware/target/mips/ingenic_x1000/nand-x1000.c b/firmware/target/mips/ingenic_x1000/nand-x1000.c
index 286dc3c64b..e22c639b8f 100644
--- a/firmware/target/mips/ingenic_x1000/nand-x1000.c
+++ b/firmware/target/mips/ingenic_x1000/nand-x1000.c
@@ -216,6 +216,12 @@ void nand_close(struct nand_drv* drv)
     sfc_close();
 }
 
+void nand_enable_otp(struct nand_drv* drv, bool enable)
+{
+    nand_upd_reg(drv, FREG_CFG, FREG_CFG_OTP_ENABLE,
+                 enable ? FREG_CFG_OTP_ENABLE : 0);
+}
+
 static uint8_t nand_wait_busy(struct nand_drv* drv)
 {
     uint8_t reg;
diff --git a/firmware/target/mips/ingenic_x1000/nand-x1000.h b/firmware/target/mips/ingenic_x1000/nand-x1000.h
index 61e0bbebc9..bc80ecce07 100644
--- a/firmware/target/mips/ingenic_x1000/nand-x1000.h
+++ b/firmware/target/mips/ingenic_x1000/nand-x1000.h
@@ -211,6 +211,9 @@ static inline void nand_unlock(struct nand_drv* drv)
 extern int nand_open(struct nand_drv* drv);
 extern void nand_close(struct nand_drv* drv);
 
+/* Enable/disable OTP access. OTP data pages are usually vendor-specific. */
+void nand_enable_otp(struct nand_drv* drv, bool enable);
+
 /* Read / program / erase operations. Buffer needs to be cache-aligned for DMA.
  * Read and program operate on full page data, ie. including OOB data areas.
  *