diff options
Diffstat (limited to 'firmware')
37 files changed, 83 insertions, 178 deletions
diff --git a/firmware/export/load_code.h b/firmware/export/load_code.h index 55ce601ee5..6f8505aba7 100644 --- a/firmware/export/load_code.h +++ b/firmware/export/load_code.h | |||
@@ -35,7 +35,7 @@ static inline void *lc_open_from_mem(void* addr, size_t blob_size) | |||
35 | { | 35 | { |
36 | (void)blob_size; | 36 | (void)blob_size; |
37 | /* commit dcache and discard icache */ | 37 | /* commit dcache and discard icache */ |
38 | cpucache_invalidate(); | 38 | commit_discard_idcache(); |
39 | return addr; | 39 | return addr; |
40 | } | 40 | } |
41 | static inline void *lc_get_header(void *handle) { return handle; } | 41 | static inline void *lc_get_header(void *handle) { return handle; } |
diff --git a/firmware/export/system.h b/firmware/export/system.h index aa079940d1..1055c65b60 100644 --- a/firmware/export/system.h +++ b/firmware/export/system.h | |||
@@ -302,35 +302,6 @@ static inline uint32_t swaw32_hw(uint32_t value) | |||
302 | #define DISABLE_INTERRUPTS HIGHEST_IRQ_LEVEL | 302 | #define DISABLE_INTERRUPTS HIGHEST_IRQ_LEVEL |
303 | #endif | 303 | #endif |
304 | 304 | ||
305 | /* Just define these as empty if not declared */ | ||
306 | #ifdef HAVE_CPUCACHE_INVALIDATE | ||
307 | void cpucache_commit_discard(void); | ||
308 | /* deprecated alias */ | ||
309 | void cpucache_invalidate(void); | ||
310 | #else | ||
311 | static inline void cpucache_commit_discard(void) | ||
312 | { | ||
313 | } | ||
314 | /* deprecated alias */ | ||
315 | static inline void cpucache_invalidate(void) | ||
316 | { | ||
317 | } | ||
318 | #endif | ||
319 | |||
320 | #ifdef HAVE_CPUCACHE_FLUSH | ||
321 | void cpucache_commit(void); | ||
322 | /* deprecated alias */ | ||
323 | void cpucache_flush(void); | ||
324 | #else | ||
325 | static inline void cpucache_commit(void) | ||
326 | { | ||
327 | } | ||
328 | /* deprecated alias */ | ||
329 | static inline void cpucache_flush(void) | ||
330 | { | ||
331 | } | ||
332 | #endif | ||
333 | |||
334 | /* Define this, if the CPU may take advantage of cache aligment. Is enabled | 305 | /* Define this, if the CPU may take advantage of cache aligment. Is enabled |
335 | * for all ARM CPUs. */ | 306 | * for all ARM CPUs. */ |
336 | #ifdef CPU_ARM | 307 | #ifdef CPU_ARM |
diff --git a/firmware/load_code.c b/firmware/load_code.c index 59eb7ac0f7..a76aca380d 100644 --- a/firmware/load_code.c +++ b/firmware/load_code.c | |||
@@ -46,7 +46,6 @@ void * lc_open(const char *filename, unsigned char *buf, size_t buf_size) | |||
46 | /* Make sure COP cache is flushed and invalidated before loading */ | 46 | /* Make sure COP cache is flushed and invalidated before loading */ |
47 | { | 47 | { |
48 | int my_core = switch_core(CURRENT_CORE ^ 1); | 48 | int my_core = switch_core(CURRENT_CORE ^ 1); |
49 | cpucache_commit_discard(); | ||
50 | switch_core(my_core); | 49 | switch_core(my_core); |
51 | } | 50 | } |
52 | #endif | 51 | #endif |
@@ -89,7 +88,7 @@ void * lc_open(const char *filename, unsigned char *buf, size_t buf_size) | |||
89 | } | 88 | } |
90 | 89 | ||
91 | /* commit dcache and discard icache */ | 90 | /* commit dcache and discard icache */ |
92 | cpucache_commit_discard(); | 91 | commit_discard_idcache(); |
93 | /* return a pointer the header, reused by lc_get_header() */ | 92 | /* return a pointer the header, reused by lc_get_header() */ |
94 | return hdr.load_addr; | 93 | return hdr.load_addr; |
95 | 94 | ||
diff --git a/firmware/rolo.c b/firmware/rolo.c index 283779d7ee..3569746258 100644 --- a/firmware/rolo.c +++ b/firmware/rolo.c | |||
@@ -75,7 +75,7 @@ void rolo_restart_cop(void) | |||
75 | COP_INT_DIS = -1; | 75 | COP_INT_DIS = -1; |
76 | 76 | ||
77 | /* Invalidate cache */ | 77 | /* Invalidate cache */ |
78 | cpucache_invalidate(); | 78 | commit_discard_idcache(); |
79 | 79 | ||
80 | /* Disable cache */ | 80 | /* Disable cache */ |
81 | CACHE_CTL = CACHE_CTL_DISABLE; | 81 | CACHE_CTL = CACHE_CTL_DISABLE; |
@@ -148,7 +148,7 @@ void rolo_restart(const unsigned char* source, unsigned char* dest, | |||
148 | CPU_INT_DIS = -1; | 148 | CPU_INT_DIS = -1; |
149 | 149 | ||
150 | /* Flush cache */ | 150 | /* Flush cache */ |
151 | cpucache_flush(); | 151 | commit_discard_idcache(); |
152 | 152 | ||
153 | /* Disable cache */ | 153 | /* Disable cache */ |
154 | CACHE_CTL = CACHE_CTL_DISABLE; | 154 | CACHE_CTL = CACHE_CTL_DISABLE; |
@@ -174,10 +174,8 @@ void rolo_restart(const unsigned char* source, unsigned char* dest, | |||
174 | ); | 174 | ); |
175 | 175 | ||
176 | #elif defined(CPU_ARM) | 176 | #elif defined(CPU_ARM) |
177 | #ifdef HAVE_CPUCACHE_INVALIDATE | ||
178 | /* Flush and invalidate caches */ | 177 | /* Flush and invalidate caches */ |
179 | cpucache_invalidate(); | 178 | commit_discard_idcache(); |
180 | #endif | ||
181 | asm volatile( | 179 | asm volatile( |
182 | "bx %0 \n" | 180 | "bx %0 \n" |
183 | : : "r"(dest) | 181 | : : "r"(dest) |
diff --git a/firmware/target/arm/as3525/pcm-as3525.c b/firmware/target/arm/as3525/pcm-as3525.c index b33ea2af84..0ecc63d018 100644 --- a/firmware/target/arm/as3525/pcm-as3525.c +++ b/firmware/target/arm/as3525/pcm-as3525.c | |||
@@ -109,7 +109,7 @@ static void dma_callback(void) | |||
109 | dma_rem_size = dma_start_size; | 109 | dma_rem_size = dma_start_size; |
110 | 110 | ||
111 | /* force writeback */ | 111 | /* force writeback */ |
112 | clean_dcache_range(dma_start_addr, dma_start_size); | 112 | commit_dcache_range(dma_start_addr, dma_start_size); |
113 | play_start_pcm(); | 113 | play_start_pcm(); |
114 | pcm_play_dma_started_callback(); | 114 | pcm_play_dma_started_callback(); |
115 | } | 115 | } |
@@ -131,7 +131,7 @@ void pcm_play_dma_start(const void *addr, size_t size) | |||
131 | dma_retain(); | 131 | dma_retain(); |
132 | 132 | ||
133 | /* force writeback */ | 133 | /* force writeback */ |
134 | clean_dcache_range(dma_start_addr, dma_start_size); | 134 | commit_dcache_range(dma_start_addr, dma_start_size); |
135 | 135 | ||
136 | bitset32(&CGU_AUDIO, (1<<11)); | 136 | bitset32(&CGU_AUDIO, (1<<11)); |
137 | 137 | ||
diff --git a/firmware/target/arm/as3525/usb-drv-as3525.c b/firmware/target/arm/as3525/usb-drv-as3525.c index 1f52d40ce6..d619a014f1 100644 --- a/firmware/target/arm/as3525/usb-drv-as3525.c +++ b/firmware/target/arm/as3525/usb-drv-as3525.c | |||
@@ -432,7 +432,7 @@ int usb_drv_recv(int ep, void *ptr, int len) | |||
432 | endpoints[ep][1].rc = -1; | 432 | endpoints[ep][1].rc = -1; |
433 | 433 | ||
434 | /* remove data buffer from cache */ | 434 | /* remove data buffer from cache */ |
435 | invalidate_dcache_range(ptr, len); | 435 | discard_dcache_range(ptr, len); |
436 | 436 | ||
437 | /* DMA setup */ | 437 | /* DMA setup */ |
438 | uc_desc->status = USB_DMA_DESC_BS_HST_RDY | | 438 | uc_desc->status = USB_DMA_DESC_BS_HST_RDY | |
@@ -509,7 +509,7 @@ static void ep_send(int ep, void *ptr, int len) | |||
509 | USB_IEP_CTRL(ep) |= USB_EP_CTRL_FLUSH; | 509 | USB_IEP_CTRL(ep) |= USB_EP_CTRL_FLUSH; |
510 | 510 | ||
511 | /* Make sure data is committed to memory */ | 511 | /* Make sure data is committed to memory */ |
512 | clean_dcache_range(ptr, len); | 512 | commit_dcache_range(ptr, len); |
513 | 513 | ||
514 | logf("xx%s\n", make_hex(ptr, len)); | 514 | logf("xx%s\n", make_hex(ptr, len)); |
515 | 515 | ||
@@ -625,7 +625,7 @@ static void handle_out_ep(int ep) | |||
625 | /* | 625 | /* |
626 | * If parts of the just dmaed range are in cache, dump them now. | 626 | * If parts of the just dmaed range are in cache, dump them now. |
627 | */ | 627 | */ |
628 | dump_dcache_range(uc_desc->data_ptr, dma_len); | 628 | discard_dcache_range(uc_desc->data_ptr, dma_len); |
629 | } else{ | 629 | } else{ |
630 | logf("EP%d OUT token, st:%08x frm:%x (no data)\n", ep, | 630 | logf("EP%d OUT token, st:%08x frm:%x (no data)\n", ep, |
631 | dma_sts & 0xf8000000, (dma_sts >> 16) & 0x7ff); | 631 | dma_sts & 0xf8000000, (dma_sts >> 16) & 0x7ff); |
diff --git a/firmware/target/arm/as3525/usb-drv-as3525v2.c b/firmware/target/arm/as3525/usb-drv-as3525v2.c index 7b5ce886c5..c0542d5c45 100644 --- a/firmware/target/arm/as3525/usb-drv-as3525v2.c +++ b/firmware/target/arm/as3525/usb-drv-as3525v2.c | |||
@@ -449,9 +449,9 @@ static void usb_drv_transfer(int ep, void *ptr, int len, bool out) | |||
449 | : (void*)0x10000000; | 449 | : (void*)0x10000000; |
450 | DEPTSIZ(ep, out) = (nb_packets << DEPTSIZ_pkcnt_bitp) | len; | 450 | DEPTSIZ(ep, out) = (nb_packets << DEPTSIZ_pkcnt_bitp) | len; |
451 | if(out) | 451 | if(out) |
452 | dump_dcache_range(ptr, len); | 452 | discard_dcache_range(ptr, len); |
453 | else | 453 | else |
454 | clean_dcache_range(ptr, len); | 454 | commit_dcache_range(ptr, len); |
455 | 455 | ||
456 | logf("pkt=%d dma=%lx", nb_packets, DEPDMA(ep, out)); | 456 | logf("pkt=%d dma=%lx", nb_packets, DEPDMA(ep, out)); |
457 | 457 | ||
diff --git a/firmware/target/arm/ata-pp5020.c b/firmware/target/arm/ata-pp5020.c index 50e6e27c98..50a38cb23d 100644 --- a/firmware/target/arm/ata-pp5020.c +++ b/firmware/target/arm/ata-pp5020.c | |||
@@ -181,11 +181,11 @@ bool ata_dma_setup(void *addr, unsigned long bytes, bool write) { | |||
181 | 181 | ||
182 | if (write) { | 182 | if (write) { |
183 | /* If unflushed, old data may be written to disk */ | 183 | /* If unflushed, old data may be written to disk */ |
184 | cpucache_flush(); | 184 | commit_dcache(); |
185 | } | 185 | } |
186 | else { | 186 | else { |
187 | /* Invalidate cache because new data may be present in RAM */ | 187 | /* Invalidate cache because new data may be present in RAM */ |
188 | cpucache_invalidate(); | 188 | commit_discard_dcache(); |
189 | } | 189 | } |
190 | 190 | ||
191 | /* Clear pending interrupts so ata_dma_finish() can wait for an | 191 | /* Clear pending interrupts so ata_dma_finish() can wait for an |
diff --git a/firmware/target/arm/imx31/ata-imx31.c b/firmware/target/arm/imx31/ata-imx31.c index 80539b9c9d..3b08a38c1b 100644 --- a/firmware/target/arm/imx31/ata-imx31.c +++ b/firmware/target/arm/imx31/ata-imx31.c | |||
@@ -475,7 +475,7 @@ bool ata_dma_setup(void *addr, unsigned long bytes, bool write) | |||
475 | if (LIKELY(buf != addr)) | 475 | if (LIKELY(buf != addr)) |
476 | { | 476 | { |
477 | /* addr is virtual */ | 477 | /* addr is virtual */ |
478 | clean_dcache_range(addr, bytes); | 478 | commit_dcache_range(addr, bytes); |
479 | } | 479 | } |
480 | 480 | ||
481 | /* Setup ATA controller for DMA transmit */ | 481 | /* Setup ATA controller for DMA transmit */ |
@@ -495,7 +495,7 @@ bool ata_dma_setup(void *addr, unsigned long bytes, bool write) | |||
495 | if (LIKELY(buf != addr)) | 495 | if (LIKELY(buf != addr)) |
496 | { | 496 | { |
497 | /* addr is virtual */ | 497 | /* addr is virtual */ |
498 | dump_dcache_range(addr, bytes); | 498 | discard_dcache_range(addr, bytes); |
499 | 499 | ||
500 | if ((unsigned long)addr & 31) | 500 | if ((unsigned long)addr & 31) |
501 | { | 501 | { |
diff --git a/firmware/target/arm/imx31/crt0.S b/firmware/target/arm/imx31/crt0.S index b6a49266ef..1c1ae55736 100644 --- a/firmware/target/arm/imx31/crt0.S +++ b/firmware/target/arm/imx31/crt0.S | |||
@@ -301,7 +301,7 @@ remap_end: | |||
301 | #endif | 301 | #endif |
302 | 302 | ||
303 | /* Make memory coherent for devices */ | 303 | /* Make memory coherent for devices */ |
304 | bl cpucache_commit_discard | 304 | bl commit_discard_idcache |
305 | 305 | ||
306 | bl main | 306 | bl main |
307 | 307 | ||
diff --git a/firmware/target/arm/imx31/gigabeat-s/pcm-gigabeat-s.c b/firmware/target/arm/imx31/gigabeat-s/pcm-gigabeat-s.c index 180a0feee4..e106cf78e3 100644 --- a/firmware/target/arm/imx31/gigabeat-s/pcm-gigabeat-s.c +++ b/firmware/target/arm/imx31/gigabeat-s/pcm-gigabeat-s.c | |||
@@ -99,7 +99,7 @@ static void play_dma_callback(void) | |||
99 | return; | 99 | return; |
100 | 100 | ||
101 | /* Flush any pending cache writes */ | 101 | /* Flush any pending cache writes */ |
102 | clean_dcache_range(start, size); | 102 | commit_dcache_range(start, size); |
103 | dma_play_bd.buf_addr = (void *)addr_virt_to_phys((unsigned long)start); | 103 | dma_play_bd.buf_addr = (void *)addr_virt_to_phys((unsigned long)start); |
104 | dma_play_bd.mode.count = size; | 104 | dma_play_bd.mode.count = size; |
105 | dma_play_bd.mode.command = TRANSFER_16BIT; | 105 | dma_play_bd.mode.command = TRANSFER_16BIT; |
@@ -202,7 +202,7 @@ static void play_stop_pcm(void) | |||
202 | unsigned long dsa = 0; | 202 | unsigned long dsa = 0; |
203 | dma_play_bd.buf_addr = NULL; | 203 | dma_play_bd.buf_addr = NULL; |
204 | dma_play_bd.mode.count = 0; | 204 | dma_play_bd.mode.count = 0; |
205 | clean_dcache_range(&dsa, sizeof(dsa)); | 205 | discard_dcache_range(&dsa, sizeof(dsa)); |
206 | sdma_write_words(&dsa, CHANNEL_CONTEXT_ADDR(DMA_PLAY_CH_NUM)+0x0b, 1); | 206 | sdma_write_words(&dsa, CHANNEL_CONTEXT_ADDR(DMA_PLAY_CH_NUM)+0x0b, 1); |
207 | } | 207 | } |
208 | 208 | ||
@@ -221,7 +221,7 @@ void pcm_play_dma_start(const void *addr, size_t size) | |||
221 | if (!sdma_channel_reset(DMA_PLAY_CH_NUM)) | 221 | if (!sdma_channel_reset(DMA_PLAY_CH_NUM)) |
222 | return; | 222 | return; |
223 | 223 | ||
224 | clean_dcache_range(addr, size); | 224 | commit_dcache_range(addr, size); |
225 | dma_play_bd.buf_addr = | 225 | dma_play_bd.buf_addr = |
226 | (void *)addr_virt_to_phys((unsigned long)(void *)addr); | 226 | (void *)addr_virt_to_phys((unsigned long)(void *)addr); |
227 | dma_play_bd.mode.count = size; | 227 | dma_play_bd.mode.count = size; |
@@ -353,7 +353,7 @@ static void rec_dma_callback(void) | |||
353 | return; | 353 | return; |
354 | 354 | ||
355 | /* Invalidate - buffer must be coherent */ | 355 | /* Invalidate - buffer must be coherent */ |
356 | dump_dcache_range(start, size); | 356 | discard_dcache_range(start, size); |
357 | 357 | ||
358 | start = (void *)addr_virt_to_phys((unsigned long)start); | 358 | start = (void *)addr_virt_to_phys((unsigned long)start); |
359 | 359 | ||
@@ -412,7 +412,7 @@ void pcm_rec_dma_stop(void) | |||
412 | unsigned long pda = 0; | 412 | unsigned long pda = 0; |
413 | dma_rec_bd.buf_addr = NULL; | 413 | dma_rec_bd.buf_addr = NULL; |
414 | dma_rec_bd.mode.count = 0; | 414 | dma_rec_bd.mode.count = 0; |
415 | clean_dcache_range(&pda, sizeof(pda)); | 415 | discard_dcache_range(&pda, sizeof(pda)); |
416 | sdma_write_words(&pda, CHANNEL_CONTEXT_ADDR(DMA_REC_CH_NUM)+0x0a, 1); | 416 | sdma_write_words(&pda, CHANNEL_CONTEXT_ADDR(DMA_REC_CH_NUM)+0x0a, 1); |
417 | } | 417 | } |
418 | 418 | ||
@@ -428,7 +428,7 @@ void pcm_rec_dma_start(void *addr, size_t size) | |||
428 | return; | 428 | return; |
429 | 429 | ||
430 | /* Invalidate - buffer must be coherent */ | 430 | /* Invalidate - buffer must be coherent */ |
431 | dump_dcache_range(addr, size); | 431 | discard_dcache_range(addr, size); |
432 | 432 | ||
433 | addr = (void *)addr_virt_to_phys((unsigned long)addr); | 433 | addr = (void *)addr_virt_to_phys((unsigned long)addr); |
434 | dma_rec_bd.buf_addr = addr; | 434 | dma_rec_bd.buf_addr = addr; |
diff --git a/firmware/target/arm/imx31/sdma-imx31.c b/firmware/target/arm/imx31/sdma-imx31.c index 68aa0aa35f..d3e6233a4b 100644 --- a/firmware/target/arm/imx31/sdma-imx31.c +++ b/firmware/target/arm/imx31/sdma-imx31.c | |||
@@ -382,7 +382,7 @@ static bool setup_channel(struct channel_control_block *ccb_p) | |||
382 | } | 382 | } |
383 | 383 | ||
384 | /* Send channel context to SDMA core */ | 384 | /* Send channel context to SDMA core */ |
385 | clean_dcache_range(&context_buffer, sizeof (context_buffer)); | 385 | commit_dcache_range(&context_buffer, sizeof (context_buffer)); |
386 | sdma_write_words((unsigned long *)&context_buffer, | 386 | sdma_write_words((unsigned long *)&context_buffer, |
387 | CHANNEL_CONTEXT_ADDR(channel), | 387 | CHANNEL_CONTEXT_ADDR(channel), |
388 | sizeof (context_buffer)/4); | 388 | sizeof (context_buffer)/4); |
diff --git a/firmware/target/arm/mmu-arm.S b/firmware/target/arm/mmu-arm.S index 88f9095d2f..522aa9f16f 100644 --- a/firmware/target/arm/mmu-arm.S +++ b/firmware/target/arm/mmu-arm.S | |||
@@ -184,11 +184,9 @@ enable_mmu: | |||
184 | .align 2 | 184 | .align 2 |
185 | .global commit_discard_dcache_range | 185 | .global commit_discard_dcache_range |
186 | .type commit_discard_dcache_range, %function | 186 | .type commit_discard_dcache_range, %function |
187 | .global invalidate_dcache_range @ Alias, deprecated | ||
188 | 187 | ||
189 | @ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ | 188 | @ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ |
190 | commit_discard_dcache_range: | 189 | commit_discard_dcache_range: |
191 | invalidate_dcache_range: | ||
192 | add r1, r0, r1 @ size -> end | 190 | add r1, r0, r1 @ size -> end |
193 | cmp r1, r0 @ end <= start? | 191 | cmp r1, r0 @ end <= start? |
194 | bxls lr @ | 192 | bxls lr @ |
@@ -232,11 +230,9 @@ invalidate_dcache_range: | |||
232 | .align 2 | 230 | .align 2 |
233 | .global commit_dcache_range | 231 | .global commit_dcache_range |
234 | .type commit_dcache_range, %function | 232 | .type commit_dcache_range, %function |
235 | .global clean_dcache_range @ Alias, deprecated | ||
236 | 233 | ||
237 | @ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ | 234 | @ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ |
238 | commit_dcache_range: | 235 | commit_dcache_range: |
239 | clean_dcache_range: | ||
240 | add r1, r0, r1 @ size -> end | 236 | add r1, r0, r1 @ size -> end |
241 | cmp r1, r0 @ end <= start? | 237 | cmp r1, r0 @ end <= start? |
242 | bxls lr @ | 238 | bxls lr @ |
@@ -281,11 +277,9 @@ clean_dcache_range: | |||
281 | .align 2 | 277 | .align 2 |
282 | .global discard_dcache_range | 278 | .global discard_dcache_range |
283 | .type discard_dcache_range, %function | 279 | .type discard_dcache_range, %function |
284 | .global dump_dcache_range @ Alias, deprecated | ||
285 | 280 | ||
286 | @ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ | 281 | @ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ |
287 | discard_dcache_range: | 282 | discard_dcache_range: |
288 | dump_dcache_range: | ||
289 | add r1, r0, r1 @ size -> end | 283 | add r1, r0, r1 @ size -> end |
290 | cmp r1, r0 @ end <= start? | 284 | cmp r1, r0 @ end <= start? |
291 | bxls lr @ | 285 | bxls lr @ |
@@ -339,14 +333,8 @@ dump_dcache_range: | |||
339 | .align 2 | 333 | .align 2 |
340 | .global commit_dcache | 334 | .global commit_dcache |
341 | .type commit_dcache, %function | 335 | .type commit_dcache, %function |
342 | .global cpucache_commit @ Alias | ||
343 | .global clean_dcache @ Alias, deprecated | ||
344 | .global cpucache_flush @ Alias, deprecated | ||
345 | 336 | ||
346 | commit_dcache: | 337 | commit_dcache: |
347 | cpucache_commit: | ||
348 | clean_dcache: | ||
349 | cpucache_flush: | ||
350 | #ifdef HAVE_TEST_AND_CLEAN_CACHE | 338 | #ifdef HAVE_TEST_AND_CLEAN_CACHE |
351 | mrc p15, 0, r15, c7, c10, 3 @ test and clean dcache | 339 | mrc p15, 0, r15, c7, c10, 3 @ test and clean dcache |
352 | bne commit_dcache | 340 | bne commit_dcache |
@@ -376,10 +364,8 @@ cpucache_flush: | |||
376 | .align 2 | 364 | .align 2 |
377 | .global commit_discard_dcache | 365 | .global commit_discard_dcache |
378 | .type commit_discard_dcache, %function | 366 | .type commit_discard_dcache, %function |
379 | .global invalidate_dcache @ Alias, deprecated | ||
380 | 367 | ||
381 | commit_discard_dcache: | 368 | commit_discard_dcache: |
382 | invalidate_dcache: | ||
383 | #ifdef HAVE_TEST_AND_CLEAN_CACHE | 369 | #ifdef HAVE_TEST_AND_CLEAN_CACHE |
384 | mrc p15, 0, r15, c7, c14, 3 @ test, clean and invalidate dcache | 370 | mrc p15, 0, r15, c7, c14, 3 @ test, clean and invalidate dcache |
385 | bne commit_discard_dcache | 371 | bne commit_discard_dcache |
@@ -409,14 +395,8 @@ invalidate_dcache: | |||
409 | .align 2 | 395 | .align 2 |
410 | .global commit_discard_idcache | 396 | .global commit_discard_idcache |
411 | .type commit_discard_idcache, %function | 397 | .type commit_discard_idcache, %function |
412 | .global cpucache_commit_discard @ Alias | ||
413 | .global invalidate_idcache @ Alias, deprecated | ||
414 | .global cpucache_invalidate @ Alias, deprecated | ||
415 | 398 | ||
416 | commit_discard_idcache: | 399 | commit_discard_idcache: |
417 | cpucache_commit_discard: | ||
418 | invalidate_idcache: | ||
419 | cpucache_invalidate: | ||
420 | mov r2, lr @ save lr to r1, call uses r0 only | 400 | mov r2, lr @ save lr to r1, call uses r0 only |
421 | bl commit_discard_dcache @ commit and discard entire DCache | 401 | bl commit_discard_dcache @ commit and discard entire DCache |
422 | mcr p15, 0, r1, c7, c5, 0 @ Invalidate ICache (r1=0 from call) | 402 | mcr p15, 0, r1, c7, c5, 0 @ Invalidate ICache (r1=0 from call) |
diff --git a/firmware/target/arm/mmu-arm.h b/firmware/target/arm/mmu-arm.h index 92a81c0c34..155769489e 100644 --- a/firmware/target/arm/mmu-arm.h +++ b/firmware/target/arm/mmu-arm.h | |||
@@ -53,42 +53,24 @@ void map_section(unsigned int pa, unsigned int va, int mb, int flags); | |||
53 | 53 | ||
54 | /* Commits entire DCache */ | 54 | /* Commits entire DCache */ |
55 | void commit_dcache(void); | 55 | void commit_dcache(void); |
56 | /* deprecated alias */ | ||
57 | void clean_dcache(void); | ||
58 | 56 | ||
59 | /* Commit and discard entire DCache, will do writeback */ | 57 | /* Commit and discard entire DCache, will do writeback */ |
60 | void commit_discard_dcache(void); | 58 | void commit_discard_dcache(void); |
61 | /* deprecated alias */ | ||
62 | void invalidate_dcache(void); | ||
63 | 59 | ||
64 | /* Write DCache back to RAM for the given range and remove cache lines | 60 | /* Write DCache back to RAM for the given range and remove cache lines |
65 | * from DCache afterwards */ | 61 | * from DCache afterwards */ |
66 | void commit_discard_dcache_range(const void *base, unsigned int size); | 62 | void commit_discard_dcache_range(const void *base, unsigned int size); |
67 | /* deprecated alias */ | ||
68 | void invalidate_dcache_range(const void *base, unsigned int size); | ||
69 | 63 | ||
70 | /* Write DCache back to RAM for the given range */ | 64 | /* Write DCache back to RAM for the given range */ |
71 | void commit_dcache_range(const void *base, unsigned int size); | 65 | void commit_dcache_range(const void *base, unsigned int size); |
72 | /* deprecated alias */ | ||
73 | void clean_dcache_range(const void *base, unsigned int size); | ||
74 | 66 | ||
75 | /* | 67 | /* |
76 | * Remove cache lines for the given range from DCache | 68 | * Remove cache lines for the given range from DCache |
77 | * will *NOT* do write back except for buffer edges not on a line boundary | 69 | * will *NOT* do write back except for buffer edges not on a line boundary |
78 | */ | 70 | */ |
79 | void discard_dcache_range(const void *base, unsigned int size); | 71 | void discard_dcache_range(const void *base, unsigned int size); |
80 | /* deprecated alias */ | ||
81 | void dump_dcache_range(const void *base, unsigned int size); | ||
82 | 72 | ||
83 | /* Discards the entire ICache, and commit+discards the entire DCache */ | 73 | /* Discards the entire ICache, and commit+discards the entire DCache */ |
84 | void commit_discard_idcache(void); | 74 | void commit_discard_idcache(void); |
85 | /* deprecated alias */ | ||
86 | void invalidate_idcache(void); | ||
87 | |||
88 | #define HAVE_CPUCACHE_COMMIT_DISCARD | ||
89 | #define HAVE_CPUCACHE_COMMIT | ||
90 | /* deprecated alias */ | ||
91 | #define HAVE_CPUCACHE_INVALIDATE | ||
92 | #define HAVE_CPUCACHE_FLUSH | ||
93 | 75 | ||
94 | #endif /* MMU_ARM_H */ | 76 | #endif /* MMU_ARM_H */ |
diff --git a/firmware/target/arm/mmu-armv6.S b/firmware/target/arm/mmu-armv6.S index c4cb49ea26..30d719d475 100644 --- a/firmware/target/arm/mmu-armv6.S +++ b/firmware/target/arm/mmu-armv6.S | |||
@@ -36,11 +36,9 @@ | |||
36 | .align 2 | 36 | .align 2 |
37 | .global commit_discard_dcache_range | 37 | .global commit_discard_dcache_range |
38 | .type commit_discard_dcache_range, %function | 38 | .type commit_discard_dcache_range, %function |
39 | .global invalidate_dcache_range @ Alias, deprecated | ||
40 | 39 | ||
41 | @ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ | 40 | @ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ |
42 | commit_discard_dcache_range: | 41 | commit_discard_dcache_range: |
43 | invalidate_dcache_range: | ||
44 | add r1, r0, r1 @ size -> end | 42 | add r1, r0, r1 @ size -> end |
45 | cmp r1, r0 @ end <= start? | 43 | cmp r1, r0 @ end <= start? |
46 | subhi r1, r1, #1 @ round it down | 44 | subhi r1, r1, #1 @ round it down |
@@ -60,11 +58,9 @@ invalidate_dcache_range: | |||
60 | .align 2 | 58 | .align 2 |
61 | .global commit_dcache_range | 59 | .global commit_dcache_range |
62 | .type commit_dcache_range, %function | 60 | .type commit_dcache_range, %function |
63 | .global clean_dcache_range @ Alias, deprecated | ||
64 | 61 | ||
65 | @ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ | 62 | @ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ |
66 | commit_dcache_range: | 63 | commit_dcache_range: |
67 | clean_dcache_range: | ||
68 | add r1, r0, r1 @ size -> end | 64 | add r1, r0, r1 @ size -> end |
69 | cmp r1, r0 @ end <= start? | 65 | cmp r1, r0 @ end <= start? |
70 | subhi r1, r1, #1 @ round it down | 66 | subhi r1, r1, #1 @ round it down |
@@ -83,11 +79,9 @@ clean_dcache_range: | |||
83 | .align 2 | 79 | .align 2 |
84 | .global discard_dcache_range | 80 | .global discard_dcache_range |
85 | .type discard_dcache_range, %function | 81 | .type discard_dcache_range, %function |
86 | .global dump_dcache_range @ Alias, deprecated | ||
87 | 82 | ||
88 | @ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ | 83 | @ MVA format: 31:5 = Modified virtual address, 4:0 = SBZ |
89 | discard_dcache_range: | 84 | discard_dcache_range: |
90 | dump_dcache_range: | ||
91 | add r1, r0, r1 @ size -> end | 85 | add r1, r0, r1 @ size -> end |
92 | cmp r1, r0 @ end <= start? | 86 | cmp r1, r0 @ end <= start? |
93 | bxls lr @ | 87 | bxls lr @ |
@@ -118,14 +112,8 @@ dump_dcache_range: | |||
118 | .align 2 | 112 | .align 2 |
119 | .global commit_dcache | 113 | .global commit_dcache |
120 | .type commit_dcache, %function | 114 | .type commit_dcache, %function |
121 | .global cpucache_commit @ Alias | ||
122 | .global clean_dcache @ Alias, deprecated | ||
123 | .global cpucache_flush @ Alias, deprecated | ||
124 | 115 | ||
125 | commit_dcache: | 116 | commit_dcache: |
126 | cpucache_commit: | ||
127 | clean_dcache: | ||
128 | cpucache_flush: | ||
129 | mov r0, #0 @ | 117 | mov r0, #0 @ |
130 | mcr p15, 0, r0, c7, c10, 0 @ Clean entire DCache | 118 | mcr p15, 0, r0, c7, c10, 0 @ Clean entire DCache |
131 | mcr p15, 0, r0, c7, c10, 4 @ Data synchronization barrier | 119 | mcr p15, 0, r0, c7, c10, 4 @ Data synchronization barrier |
@@ -140,10 +128,8 @@ cpucache_flush: | |||
140 | .align 2 | 128 | .align 2 |
141 | .global commit_discard_dcache | 129 | .global commit_discard_dcache |
142 | .type commit_discard_dcache, %function | 130 | .type commit_discard_dcache, %function |
143 | .global invalidate_dcache @ Alias, deprecated | ||
144 | 131 | ||
145 | commit_discard_dcache: | 132 | commit_discard_dcache: |
146 | invalidate_dcache: | ||
147 | mov r0, #0 @ | 133 | mov r0, #0 @ |
148 | mcr p15, 0, r0, c7, c14, 0 @ Clean and invalidate entire DCache | 134 | mcr p15, 0, r0, c7, c14, 0 @ Clean and invalidate entire DCache |
149 | mcr p15, 0, r0, c7, c10, 4 @ Data synchronization barrier | 135 | mcr p15, 0, r0, c7, c10, 4 @ Data synchronization barrier |
@@ -153,20 +139,14 @@ invalidate_dcache: | |||
153 | 139 | ||
154 | /* | 140 | /* |
155 | * Discards the entire ICache, and commit+discards the entire DCache | 141 | * Discards the entire ICache, and commit+discards the entire DCache |
156 | * void cpucache_commit_discard(void); | 142 | * void commit_discard_idcache(void); |
157 | */ | 143 | */ |
158 | .section .icode.cpucache_commit_discard, "ax", %progbits | 144 | .section .icode.commit_discard_idcache, "ax", %progbits |
159 | .align 2 | 145 | .align 2 |
160 | .global cpucache_commit_discard | 146 | .global commit_discard_idcache |
161 | .type cpucache_commit_discard, %function | 147 | .type commit_discard_idcache, %function |
162 | .global commit_discard_idcache @ Alias | ||
163 | .global invalidate_idcache @ Alias, deprecated | ||
164 | .global cpucache_invalidate @ Alias, deprecated | ||
165 | 148 | ||
166 | cpucache_commit_discard: | ||
167 | commit_discard_idcache: | 149 | commit_discard_idcache: |
168 | invalidate_idcache: | ||
169 | cpucache_invalidate: | ||
170 | mov r0, #0 @ | 150 | mov r0, #0 @ |
171 | mcr p15, 0, r0, c7, c14, 0 @ Clean and invalidate entire DCache | 151 | mcr p15, 0, r0, c7, c14, 0 @ Clean and invalidate entire DCache |
172 | mcr p15, 0, r0, c7, c5, 0 @ Invalidate entire ICache | 152 | mcr p15, 0, r0, c7, c5, 0 @ Invalidate entire ICache |
diff --git a/firmware/target/arm/pcm-pp.c b/firmware/target/arm/pcm-pp.c index 695bc71567..3854206ae8 100644 --- a/firmware/target/arm/pcm-pp.c +++ b/firmware/target/arm/pcm-pp.c | |||
@@ -158,7 +158,7 @@ void ICODE_ATTR __attribute__((interrupt("FIQ"))) fiq_playback(void) | |||
158 | if (dma_play_data.addr < UNCACHED_BASE_ADDR) { | 158 | if (dma_play_data.addr < UNCACHED_BASE_ADDR) { |
159 | /* Flush any pending cache writes */ | 159 | /* Flush any pending cache writes */ |
160 | dma_play_data.addr = UNCACHED_ADDR(dma_play_data.addr); | 160 | dma_play_data.addr = UNCACHED_ADDR(dma_play_data.addr); |
161 | cpucache_flush(); | 161 | commit_discard_idcache(); |
162 | } | 162 | } |
163 | } | 163 | } |
164 | } | 164 | } |
@@ -444,7 +444,7 @@ void pcm_play_dma_start(const void *addr, size_t size) | |||
444 | if ((unsigned long)addr < UNCACHED_BASE_ADDR) { | 444 | if ((unsigned long)addr < UNCACHED_BASE_ADDR) { |
445 | /* Flush any pending cache writes */ | 445 | /* Flush any pending cache writes */ |
446 | addr = UNCACHED_ADDR(addr); | 446 | addr = UNCACHED_ADDR(addr); |
447 | cpucache_flush(); | 447 | commit_discard_idcache(); |
448 | } | 448 | } |
449 | 449 | ||
450 | dma_play_data.addr = (unsigned long)addr; | 450 | dma_play_data.addr = (unsigned long)addr; |
diff --git a/firmware/target/arm/rk27xx/system-rk27xx.c b/firmware/target/arm/rk27xx/system-rk27xx.c index e73edf1add..3349f9d0f1 100644 --- a/firmware/target/arm/rk27xx/system-rk27xx.c +++ b/firmware/target/arm/rk27xx/system-rk27xx.c | |||
@@ -163,7 +163,7 @@ void udelay(unsigned usecs) | |||
163 | ); | 163 | ); |
164 | } | 164 | } |
165 | 165 | ||
166 | void cpucache_commit_discard(void) | 166 | void commit_discard_idcache(void) |
167 | { | 167 | { |
168 | /* invalidate cache way 0 */ | 168 | /* invalidate cache way 0 */ |
169 | CACHEOP = 0x02; | 169 | CACHEOP = 0x02; |
@@ -178,8 +178,6 @@ void cpucache_commit_discard(void) | |||
178 | while (CACHEOP & 0x03); | 178 | while (CACHEOP & 0x03); |
179 | } | 179 | } |
180 | 180 | ||
181 | void cpucache_invalidate(void) __attribute__((alias("cpucache_commit_discard"))); | ||
182 | |||
183 | void commit_discard_dcache_range (const void *base, unsigned int size) | 181 | void commit_discard_dcache_range (const void *base, unsigned int size) |
184 | { | 182 | { |
185 | int cnt = size + ((unsigned long)base & 0x1f); | 183 | int cnt = size + ((unsigned long)base & 0x1f); |
@@ -196,4 +194,5 @@ void commit_discard_dcache_range (const void *base, unsigned int size) | |||
196 | } | 194 | } |
197 | } | 195 | } |
198 | 196 | ||
199 | void clean_dcache_range(const void *base, unsigned int size) __attribute__((alias("commit_discard_dcache_range"))); | 197 | void commit_dcache_range(const void *base, unsigned int size) |
198 | __attribute__((alias("commit_discard_dcache_range"))); | ||
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/ata-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/ata-meg-fx.c index 89b00bbd1d..aae4c4b1d8 100644 --- a/firmware/target/arm/s3c2440/gigabeat-fx/ata-meg-fx.c +++ b/firmware/target/arm/s3c2440/gigabeat-fx/ata-meg-fx.c | |||
@@ -121,7 +121,8 @@ void copy_read_sectors(unsigned char* buf, int wordcount) | |||
121 | /* Activate the channel */ | 121 | /* Activate the channel */ |
122 | DMASKTRIG0 = 0x2; | 122 | DMASKTRIG0 = 0x2; |
123 | 123 | ||
124 | invalidate_dcache_range((void *)buf, wordcount*2); | 124 | /* Dump cache for the buffer */ |
125 | discard_dcache_range((void *)buf, wordcount*2); | ||
125 | 126 | ||
126 | /* Start DMA */ | 127 | /* Start DMA */ |
127 | DMASKTRIG0 |= 0x1; | 128 | DMASKTRIG0 |= 0x1; |
@@ -129,6 +130,5 @@ void copy_read_sectors(unsigned char* buf, int wordcount) | |||
129 | /* Wait for transfer to complete */ | 130 | /* Wait for transfer to complete */ |
130 | while((DSTAT0 & 0x000fffff)) | 131 | while((DSTAT0 & 0x000fffff)) |
131 | yield(); | 132 | yield(); |
132 | /* Dump cache for the buffer */ | ||
133 | } | 133 | } |
134 | #endif | 134 | #endif |
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c index b133639e12..35905645dd 100644 --- a/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c +++ b/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c | |||
@@ -111,7 +111,7 @@ static void play_start_pcm(void) | |||
111 | SRCPND = DMA2_MASK; | 111 | SRCPND = DMA2_MASK; |
112 | 112 | ||
113 | /* Flush any pending writes */ | 113 | /* Flush any pending writes */ |
114 | clean_dcache_range((char*)DISRC2-0x30000000, (DCON2 & 0xFFFFF) * 2); | 114 | commit_dcache_range((char*)DISRC2-0x30000000, (DCON2 & 0xFFFFF) * 2); |
115 | 115 | ||
116 | /* unmask DMA interrupt when unlocking */ | 116 | /* unmask DMA interrupt when unlocking */ |
117 | dma_play_lock.state = DMA2_MASK; | 117 | dma_play_lock.state = DMA2_MASK; |
@@ -228,7 +228,7 @@ void fiq_handler(void) | |||
228 | return; | 228 | return; |
229 | 229 | ||
230 | /* Flush any pending cache writes */ | 230 | /* Flush any pending cache writes */ |
231 | clean_dcache_range(start, size); | 231 | commit_dcache_range(start, size); |
232 | 232 | ||
233 | /* set the new DMA values */ | 233 | /* set the new DMA values */ |
234 | DCON2 = DMA_CONTROL_SETUP | (size >> 1); | 234 | DCON2 = DMA_CONTROL_SETUP | (size >> 1); |
diff --git a/firmware/target/arm/s3c2440/mini2440/pcm-mini2440.c b/firmware/target/arm/s3c2440/mini2440/pcm-mini2440.c index 20332c12f8..a4f58a8e06 100644 --- a/firmware/target/arm/s3c2440/mini2440/pcm-mini2440.c +++ b/firmware/target/arm/s3c2440/mini2440/pcm-mini2440.c | |||
@@ -146,7 +146,7 @@ static void play_start_pcm(void) | |||
146 | SRCPND = DMA2_MASK; | 146 | SRCPND = DMA2_MASK; |
147 | 147 | ||
148 | /* Flush any pending writes */ | 148 | /* Flush any pending writes */ |
149 | clean_dcache_range((char*)DISRC2-0x30000000, (DCON2 & 0xFFFFF) * 2); | 149 | commit_dcache_range((char*)DISRC2-0x30000000, (DCON2 & 0xFFFFF) * 2); |
150 | 150 | ||
151 | /* unmask DMA interrupt when unlocking */ | 151 | /* unmask DMA interrupt when unlocking */ |
152 | dma_play_lock.state = DMA2_MASK; | 152 | dma_play_lock.state = DMA2_MASK; |
@@ -268,7 +268,7 @@ void fiq_handler(void) | |||
268 | return; | 268 | return; |
269 | 269 | ||
270 | /* Flush any pending cache writes */ | 270 | /* Flush any pending cache writes */ |
271 | clean_dcache_range(start, size); | 271 | commit_dcache_range(start, size); |
272 | 272 | ||
273 | /* set the new DMA values */ | 273 | /* set the new DMA values */ |
274 | DCON2 = DMA_CONTROL_SETUP | (size >> 1); | 274 | DCON2 = DMA_CONTROL_SETUP | (size >> 1); |
diff --git a/firmware/target/arm/system-pp5002.c b/firmware/target/arm/system-pp5002.c index 04e052fa83..3186d3739a 100644 --- a/firmware/target/arm/system-pp5002.c +++ b/firmware/target/arm/system-pp5002.c | |||
@@ -54,15 +54,8 @@ void __attribute__((interrupt("IRQ"))) irq_handler(void) | |||
54 | 54 | ||
55 | #endif | 55 | #endif |
56 | 56 | ||
57 | /* TODO: The following two function have been lifted straight from IPL, and | ||
58 | hence have a lot of numeric addresses used straight. I'd like to use | ||
59 | #defines for these, but don't know what most of them are for or even what | ||
60 | they should be named. Because of this I also have no way of knowing how | ||
61 | to extend the funtions to do alternate cache configurations and/or | ||
62 | some other CPU frequency scaling. */ | ||
63 | |||
64 | #ifndef BOOTLOADER | 57 | #ifndef BOOTLOADER |
65 | void ICODE_ATTR __attribute__((naked)) cpucache_commit(void) | 58 | void ICODE_ATTR __attribute__((naked)) commit_dcache(void) |
66 | { | 59 | { |
67 | asm volatile( | 60 | asm volatile( |
68 | "mov r0, #0xf0000000 \n" | 61 | "mov r0, #0xf0000000 \n" |
@@ -76,9 +69,8 @@ void ICODE_ATTR __attribute__((naked)) cpucache_commit(void) | |||
76 | "bx lr \n" | 69 | "bx lr \n" |
77 | ); | 70 | ); |
78 | } | 71 | } |
79 | void cpucache_flush(void) __attribute__((alias("cpucache_commit"))); | ||
80 | 72 | ||
81 | void ICODE_ATTR __attribute__((naked)) cpucache_commit_discard(void) | 73 | void ICODE_ATTR __attribute__((naked)) commit_discard_idcache(void) |
82 | { | 74 | { |
83 | asm volatile( | 75 | asm volatile( |
84 | "mov r0, #0xf0000000 \n" | 76 | "mov r0, #0xf0000000 \n" |
@@ -94,7 +86,8 @@ void ICODE_ATTR __attribute__((naked)) cpucache_commit_discard(void) | |||
94 | "bx lr \n" | 86 | "bx lr \n" |
95 | ); | 87 | ); |
96 | } | 88 | } |
97 | void cpucache_invalidate(void) __attribute__((alias("cpucache_commit_discard"))); | 89 | |
90 | void commit_discard_dcache(void) __attribute__((alias("commit_discard_idcache"))); | ||
98 | 91 | ||
99 | static void ipod_init_cache(void) | 92 | static void ipod_init_cache(void) |
100 | { | 93 | { |
diff --git a/firmware/target/arm/system-pp502x.c b/firmware/target/arm/system-pp502x.c index 0422ea7d9c..08c2719aef 100644 --- a/firmware/target/arm/system-pp502x.c +++ b/firmware/target/arm/system-pp502x.c | |||
@@ -209,7 +209,7 @@ static void disable_all_interrupts(void) | |||
209 | GPIOL_INT_EN = 0; | 209 | GPIOL_INT_EN = 0; |
210 | } | 210 | } |
211 | 211 | ||
212 | void ICODE_ATTR cpucache_commit(void) | 212 | void ICODE_ATTR commit_dcache(void) |
213 | { | 213 | { |
214 | if (CACHE_CTL & CACHE_CTL_ENABLE) | 214 | if (CACHE_CTL & CACHE_CTL_ENABLE) |
215 | { | 215 | { |
@@ -218,9 +218,8 @@ void ICODE_ATTR cpucache_commit(void) | |||
218 | nop; nop; nop; nop; | 218 | nop; nop; nop; nop; |
219 | } | 219 | } |
220 | } | 220 | } |
221 | void cpucache_flush(void) __attribute__((alias("cpucache_commit"))); | ||
222 | 221 | ||
223 | void ICODE_ATTR cpucache_commit_discard(void) | 222 | void ICODE_ATTR commit_discard_idcache(void) |
224 | { | 223 | { |
225 | if (CACHE_CTL & CACHE_CTL_ENABLE) | 224 | if (CACHE_CTL & CACHE_CTL_ENABLE) |
226 | { | 225 | { |
@@ -229,7 +228,8 @@ void ICODE_ATTR cpucache_commit_discard(void) | |||
229 | nop; nop; nop; nop; | 228 | nop; nop; nop; nop; |
230 | } | 229 | } |
231 | } | 230 | } |
232 | void cpucache_invalidate(void) __attribute__((alias("cpucache_commit_discard"))); | 231 | |
232 | void commit_discard_dcache(void) __attribute__((alias("commit_discard_idcache"))); | ||
233 | 233 | ||
234 | static void init_cache(void) | 234 | static void init_cache(void) |
235 | { | 235 | { |
diff --git a/firmware/target/arm/system-target.h b/firmware/target/arm/system-target.h index e5a8b15f64..730bc2dbbb 100644 --- a/firmware/target/arm/system-target.h +++ b/firmware/target/arm/system-target.h | |||
@@ -141,6 +141,10 @@ static inline void wake_core(int core) | |||
141 | } | 141 | } |
142 | #endif | 142 | #endif |
143 | 143 | ||
144 | void commit_dcache(void); | ||
145 | void commit_discard_dcache(void); | ||
146 | void commit_discard_idcache(void); | ||
147 | |||
144 | #if defined(BOOTLOADER) && !defined(HAVE_BOOTLOADER_USB_MODE) | 148 | #if defined(BOOTLOADER) && !defined(HAVE_BOOTLOADER_USB_MODE) |
145 | /* All addresses within rockbox are in IRAM in the bootloader so | 149 | /* All addresses within rockbox are in IRAM in the bootloader so |
146 | are therefore uncached */ | 150 | are therefore uncached */ |
@@ -162,15 +166,6 @@ static inline void wake_core(int core) | |||
162 | #define STORAGE_WANTS_ALIGN | 166 | #define STORAGE_WANTS_ALIGN |
163 | #endif | 167 | #endif |
164 | 168 | ||
165 | /** cache functions **/ | ||
166 | #if !defined(BOOTLOADER) || defined(HAVE_BOOTLOADER_USB_MODE) | ||
167 | #define HAVE_CPUCACHE_COMMIT_DISCARD | ||
168 | #define HAVE_CPUCACHE_COMMIT | ||
169 | /* deprecated alias */ | ||
170 | #define HAVE_CPUCACHE_INVALIDATE | ||
171 | #define HAVE_CPUCACHE_FLUSH | ||
172 | #endif | ||
173 | |||
174 | #if defined(IPOD_VIDEO) && !defined(BOOTLOADER) | 169 | #if defined(IPOD_VIDEO) && !defined(BOOTLOADER) |
175 | extern unsigned char probed_ramsize; | 170 | extern unsigned char probed_ramsize; |
176 | int battery_default_capacity(void); | 171 | int battery_default_capacity(void); |
diff --git a/firmware/target/arm/thread-arm.c b/firmware/target/arm/thread-arm.c index e1bbc04248..0b46ca2558 100644 --- a/firmware/target/arm/thread-arm.c +++ b/firmware/target/arm/thread-arm.c | |||
@@ -34,7 +34,7 @@ static void __attribute__((naked)) USED_ATTR start_thread(void) | |||
34 | "mov r1, #0 \n" /* Mark thread as running */ | 34 | "mov r1, #0 \n" /* Mark thread as running */ |
35 | "str r1, [r0, #40] \n" | 35 | "str r1, [r0, #40] \n" |
36 | #if NUM_CORES > 1 | 36 | #if NUM_CORES > 1 |
37 | "ldr r0, =cpucache_invalidate \n" /* Invalidate this core's cache. */ | 37 | "ldr r0, =commit_discard_idcache \n" /* Invalidate this core's cache. */ |
38 | "mov lr, pc \n" /* This could be the first entry into */ | 38 | "mov lr, pc \n" /* This could be the first entry into */ |
39 | "bx r0 \n" /* plugin or codec code for this core. */ | 39 | "bx r0 \n" /* plugin or codec code for this core. */ |
40 | #endif | 40 | #endif |
diff --git a/firmware/target/arm/thread-pp.c b/firmware/target/arm/thread-pp.c index a0a4d4fd17..0836b27204 100644 --- a/firmware/target/arm/thread-pp.c +++ b/firmware/target/arm/thread-pp.c | |||
@@ -214,7 +214,7 @@ static inline void NORETURN_ATTR __attribute__((always_inline)) | |||
214 | { | 214 | { |
215 | asm volatile ( | 215 | asm volatile ( |
216 | "cmp %1, #0 \n" /* CPU? */ | 216 | "cmp %1, #0 \n" /* CPU? */ |
217 | "ldrne r0, =cpucache_flush \n" /* No? write back data */ | 217 | "ldrne r0, =commit_dcache \n" /* No? write back data */ |
218 | "movne lr, pc \n" | 218 | "movne lr, pc \n" |
219 | "bxne r0 \n" | 219 | "bxne r0 \n" |
220 | "mov r0, %0 \n" /* copy thread parameter */ | 220 | "mov r0, %0 \n" /* copy thread parameter */ |
@@ -244,7 +244,7 @@ static inline void NORETURN_ATTR __attribute__((always_inline)) | |||
244 | static void core_switch_blk_op(unsigned int core, struct thread_entry *thread) | 244 | static void core_switch_blk_op(unsigned int core, struct thread_entry *thread) |
245 | { | 245 | { |
246 | /* Flush our data to ram */ | 246 | /* Flush our data to ram */ |
247 | cpucache_flush(); | 247 | commit_dcache(); |
248 | /* Stash thread in r4 slot */ | 248 | /* Stash thread in r4 slot */ |
249 | thread->context.r[0] = (uint32_t)thread; | 249 | thread->context.r[0] = (uint32_t)thread; |
250 | /* Stash restart address in r5 slot */ | 250 | /* Stash restart address in r5 slot */ |
@@ -285,7 +285,7 @@ static void __attribute__((naked)) | |||
285 | "ldr sp, [r0, #32] \n" /* Reload original sp from context structure */ | 285 | "ldr sp, [r0, #32] \n" /* Reload original sp from context structure */ |
286 | "mov r1, #0 \n" /* Clear start address */ | 286 | "mov r1, #0 \n" /* Clear start address */ |
287 | "str r1, [r0, #40] \n" | 287 | "str r1, [r0, #40] \n" |
288 | "ldr r0, =cpucache_invalidate \n" /* Invalidate new core's cache */ | 288 | "ldr r0, =commit_discard_idcache \n" /* Invalidate new core's cache */ |
289 | "mov lr, pc \n" | 289 | "mov lr, pc \n" |
290 | "bx r0 \n" | 290 | "bx r0 \n" |
291 | "ldmfd sp!, { r4-r11, pc } \n" /* Restore non-volatile context to new core and return */ | 291 | "ldmfd sp!, { r4-r11, pc } \n" /* Restore non-volatile context to new core and return */ |
diff --git a/firmware/target/arm/tms320dm320/mrobe-500/lcd-mr500.c b/firmware/target/arm/tms320dm320/mrobe-500/lcd-mr500.c index 94163eddbe..898013982b 100644 --- a/firmware/target/arm/tms320dm320/mrobe-500/lcd-mr500.c +++ b/firmware/target/arm/tms320dm320/mrobe-500/lcd-mr500.c | |||
@@ -318,7 +318,7 @@ static void dma_start_transfer16( char *src, int src_x, int src_y, int stride, | |||
318 | dst = (char *)FRAME + (y * LCD_HEIGHT + x) * pix_width; | 318 | dst = (char *)FRAME + (y * LCD_HEIGHT + x) * pix_width; |
319 | 319 | ||
320 | /* Flush the area that is being copied from. */ | 320 | /* Flush the area that is being copied from. */ |
321 | clean_dcache_range(src, (stride*pix_width*width)); | 321 | commit_dcache_range(src, (stride*pix_width*width)); |
322 | 322 | ||
323 | /* Addresses are relative to start of SDRAM */ | 323 | /* Addresses are relative to start of SDRAM */ |
324 | src -= CONFIG_SDRAM_START; | 324 | src -= CONFIG_SDRAM_START; |
@@ -393,9 +393,9 @@ static void dma_start_transfer16( char *src, int src_x, int src_y, int stride, | |||
393 | * pix_width; | 393 | * pix_width; |
394 | 394 | ||
395 | /* Flush the area that is being copied from. */ | 395 | /* Flush the area that is being copied from. */ |
396 | clean_dcache(); | 396 | commit_dcache(); |
397 | 397 | ||
398 | // clean_dcache_range(src, (stride*pix_width*width)); | 398 | // commit_dcache_range(src, (stride*pix_width*width)); |
399 | 399 | ||
400 | /* Addresses are relative to start of SDRAM */ | 400 | /* Addresses are relative to start of SDRAM */ |
401 | src -= CONFIG_SDRAM_START; | 401 | src -= CONFIG_SDRAM_START; |
diff --git a/firmware/target/arm/tms320dm320/mrobe-500/pcm-mr500.c b/firmware/target/arm/tms320dm320/mrobe-500/pcm-mr500.c index c507428c57..91d6b66130 100644 --- a/firmware/target/arm/tms320dm320/mrobe-500/pcm-mr500.c +++ b/firmware/target/arm/tms320dm320/mrobe-500/pcm-mr500.c | |||
@@ -170,7 +170,7 @@ void DSPHINT(void) | |||
170 | { | 170 | { |
171 | unsigned long sdem_addr=(unsigned long)start - CONFIG_SDRAM_START; | 171 | unsigned long sdem_addr=(unsigned long)start - CONFIG_SDRAM_START; |
172 | /* Flush any pending cache writes */ | 172 | /* Flush any pending cache writes */ |
173 | clean_dcache_range(start, size); | 173 | commit_dcache_range(start, size); |
174 | 174 | ||
175 | /* set the new DMA values */ | 175 | /* set the new DMA values */ |
176 | DSP_(_sdem_addrl) = sdem_addr & 0xffff; | 176 | DSP_(_sdem_addrl) = sdem_addr & 0xffff; |
diff --git a/firmware/target/arm/tms320dm320/sansa-connect/pcm-sansaconnect.c b/firmware/target/arm/tms320dm320/sansa-connect/pcm-sansaconnect.c index 3f04838388..045f7b0ee9 100644 --- a/firmware/target/arm/tms320dm320/sansa-connect/pcm-sansaconnect.c +++ b/firmware/target/arm/tms320dm320/sansa-connect/pcm-sansaconnect.c | |||
@@ -180,7 +180,7 @@ void DSPHINT(void) | |||
180 | { | 180 | { |
181 | unsigned long sdem_addr=(unsigned long)start - CONFIG_SDRAM_START; | 181 | unsigned long sdem_addr=(unsigned long)start - CONFIG_SDRAM_START; |
182 | /* Flush any pending cache writes */ | 182 | /* Flush any pending cache writes */ |
183 | clean_dcache_range(start, size); | 183 | commit_dcache_range(start, size); |
184 | 184 | ||
185 | /* set the new DMA values */ | 185 | /* set the new DMA values */ |
186 | DSP_(_sdem_addrl) = sdem_addr & 0xffff; | 186 | DSP_(_sdem_addrl) = sdem_addr & 0xffff; |
diff --git a/firmware/target/coldfire/system-coldfire.c b/firmware/target/coldfire/system-coldfire.c index 4f7ac43017..ed130fca1f 100644 --- a/firmware/target/coldfire/system-coldfire.c +++ b/firmware/target/coldfire/system-coldfire.c | |||
@@ -384,12 +384,10 @@ void coldfire_set_dataincontrol(unsigned long value) | |||
384 | restore_irq(level); | 384 | restore_irq(level); |
385 | } | 385 | } |
386 | 386 | ||
387 | void cpucache_commit_discard(void) | 387 | void commit_discard_idcache(void) |
388 | { | 388 | { |
389 | asm volatile ("move.l #0x01000000,%d0\n" | 389 | asm volatile ("move.l #0x01000000,%d0\n" |
390 | "movec.l %d0,%cacr\n" | 390 | "movec.l %d0,%cacr\n" |
391 | "move.l #0x80000000,%d0\n" | 391 | "move.l #0x80000000,%d0\n" |
392 | "movec.l %d0,%cacr"); | 392 | "movec.l %d0,%cacr"); |
393 | } | 393 | } |
394 | |||
395 | void cpucache_invalidate(void) __attribute__((alias("cpucache_commit_discard"))); | ||
diff --git a/firmware/target/coldfire/system-target.h b/firmware/target/coldfire/system-target.h index 3d7502a6dd..74767c4583 100644 --- a/firmware/target/coldfire/system-target.h +++ b/firmware/target/coldfire/system-target.h | |||
@@ -194,10 +194,6 @@ static inline uint32_t swap_odd_even32_hw(uint32_t value) | |||
194 | return value; | 194 | return value; |
195 | } | 195 | } |
196 | 196 | ||
197 | #define HAVE_CPUCACHE_COMMIT_DISCARD | ||
198 | /* deprecated alias */ | ||
199 | #define HAVE_CPUCACHE_INVALIDATE | ||
200 | |||
201 | #define DEFAULT_PLLCR_AUDIO_BITS 0x10400000 | 197 | #define DEFAULT_PLLCR_AUDIO_BITS 0x10400000 |
202 | void coldfire_set_pllcr_audio_bits(long bits); | 198 | void coldfire_set_pllcr_audio_bits(long bits); |
203 | 199 | ||
@@ -223,4 +219,8 @@ extern void cf_set_cpu_frequency(long frequency); | |||
223 | #define CPUFREQ_MAX_MULT 11 | 219 | #define CPUFREQ_MAX_MULT 11 |
224 | #define CPUFREQ_MAX (CPUFREQ_MAX_MULT * CPU_FREQ) | 220 | #define CPUFREQ_MAX (CPUFREQ_MAX_MULT * CPU_FREQ) |
225 | 221 | ||
222 | void commit_discard_idcache(void); | ||
223 | static inline void commit_discard_dcache(void) {} | ||
224 | static inline void commit_dcache(void) {} | ||
225 | |||
226 | #endif /* SYSTEM_TARGET_H */ | 226 | #endif /* SYSTEM_TARGET_H */ |
diff --git a/firmware/target/hosted/android/system-target.h b/firmware/target/hosted/android/system-target.h index 325c1012af..12610de42f 100644 --- a/firmware/target/hosted/android/system-target.h +++ b/firmware/target/hosted/android/system-target.h | |||
@@ -26,6 +26,10 @@ | |||
26 | #define disable_irq_save() 0 | 26 | #define disable_irq_save() 0 |
27 | #define restore_irq(level) (void)level | 27 | #define restore_irq(level) (void)level |
28 | 28 | ||
29 | static inline void commit_dcache(void) {} | ||
30 | static inline void commit_discard_dcache(void) {} | ||
31 | static inline void commit_discard_idcache(void) {} | ||
32 | |||
29 | void power_off(void); | 33 | void power_off(void); |
30 | void wait_for_interrupt(void); | 34 | void wait_for_interrupt(void); |
31 | void interrupt(void); | 35 | void interrupt(void); |
diff --git a/firmware/target/hosted/sdl/system-sdl.h b/firmware/target/hosted/sdl/system-sdl.h index 9021a12543..d607e5e0a6 100644 --- a/firmware/target/hosted/sdl/system-sdl.h +++ b/firmware/target/hosted/sdl/system-sdl.h | |||
@@ -57,4 +57,8 @@ extern bool showremote; | |||
57 | extern int display_zoom; | 57 | extern int display_zoom; |
58 | extern long start_tick; | 58 | extern long start_tick; |
59 | 59 | ||
60 | static inline void commit_dcache(void) {} | ||
61 | static inline void commit_discard_dcache(void) {} | ||
62 | static inline void commit_discard_idcache(void) {} | ||
63 | |||
60 | #endif /* _SYSTEM_SDL_H_ */ | 64 | #endif /* _SYSTEM_SDL_H_ */ |
diff --git a/firmware/target/mips/mmu-mips.c b/firmware/target/mips/mmu-mips.c index 31b07409d5..9dcec43321 100644 --- a/firmware/target/mips/mmu-mips.c +++ b/firmware/target/mips/mmu-mips.c | |||
@@ -169,12 +169,6 @@ void __icache_invalidate_all(void) | |||
169 | : "r" (i)); | 169 | : "r" (i)); |
170 | } | 170 | } |
171 | 171 | ||
172 | void cpucache_commit_discard(void) | ||
173 | { | ||
174 | __icache_invalidate_all(); | ||
175 | } | ||
176 | void cpucache_invalidate(void) __attribute__((alias("cpucache_commit_discard"))); | ||
177 | |||
178 | void __dcache_invalidate_all(void) | 172 | void __dcache_invalidate_all(void) |
179 | { | 173 | { |
180 | unsigned int i; | 174 | unsigned int i; |
diff --git a/firmware/target/mips/mmu-mips.h b/firmware/target/mips/mmu-mips.h index f3d35f606d..47aea807cc 100644 --- a/firmware/target/mips/mmu-mips.h +++ b/firmware/target/mips/mmu-mips.h | |||
@@ -37,4 +37,8 @@ void __icache_invalidate_all(void); | |||
37 | void __flush_dcache_line(unsigned long addr); | 37 | void __flush_dcache_line(unsigned long addr); |
38 | void dma_cache_wback_inv(unsigned long addr, unsigned long size); | 38 | void dma_cache_wback_inv(unsigned long addr, unsigned long size); |
39 | 39 | ||
40 | #define commit_discard_idcache __icache_invalidate_all | ||
41 | #define commit_discard_dcache __dcache_invalidate_all | ||
42 | #define commit_dcache __dcache_writeback_all | ||
43 | |||
40 | #endif /* __MMU_MIPS_INCLUDE_H */ | 44 | #endif /* __MMU_MIPS_INCLUDE_H */ |
diff --git a/firmware/target/sh/system-target.h b/firmware/target/sh/system-target.h index d78c0587fc..5db9cc071f 100644 --- a/firmware/target/sh/system-target.h +++ b/firmware/target/sh/system-target.h | |||
@@ -133,4 +133,8 @@ extern const unsigned bit_n_table[32]; | |||
133 | : bit_n_table[n] \ | 133 | : bit_n_table[n] \ |
134 | ) | 134 | ) |
135 | 135 | ||
136 | static inline void commit_dcache(void) {} | ||
137 | static inline void commit_discard_dcache(void) {} | ||
138 | static inline void commit_discard_idcache(void) {} | ||
139 | |||
136 | #endif /* SYSTEM_TARGET_H */ | 140 | #endif /* SYSTEM_TARGET_H */ |
diff --git a/firmware/thread.c b/firmware/thread.c index 251646b0f5..732675abf8 100644 --- a/firmware/thread.c +++ b/firmware/thread.c | |||
@@ -1613,7 +1613,7 @@ unsigned int create_thread(void (*function)(void), | |||
1613 | /* Writeback stack munging or anything else before starting */ | 1613 | /* Writeback stack munging or anything else before starting */ |
1614 | if (core != CURRENT_CORE) | 1614 | if (core != CURRENT_CORE) |
1615 | { | 1615 | { |
1616 | cpucache_flush(); | 1616 | commit_discard_idcache(); |
1617 | } | 1617 | } |
1618 | #endif | 1618 | #endif |
1619 | 1619 | ||
diff --git a/firmware/usbstack/usb_storage.c b/firmware/usbstack/usb_storage.c index 0b9e6a95db..c156d80396 100644 --- a/firmware/usbstack/usb_storage.c +++ b/firmware/usbstack/usb_storage.c | |||
@@ -474,7 +474,7 @@ void usb_storage_init_connection(void) | |||
474 | cbw_buffer = (void *)((unsigned int)(audio_buffer+31) & 0xffffffe0); | 474 | cbw_buffer = (void *)((unsigned int)(audio_buffer+31) & 0xffffffe0); |
475 | #endif | 475 | #endif |
476 | tb.transfer_buffer = cbw_buffer + MAX_CBW_SIZE; | 476 | tb.transfer_buffer = cbw_buffer + MAX_CBW_SIZE; |
477 | cpucache_invalidate(); | 477 | commit_discard_dcache(); |
478 | #ifdef USB_USE_RAMDISK | 478 | #ifdef USB_USE_RAMDISK |
479 | ramdisk_buffer = tb.transfer_buffer + ALLOCATE_BUFFER_SIZE; | 479 | ramdisk_buffer = tb.transfer_buffer + ALLOCATE_BUFFER_SIZE; |
480 | #endif | 480 | #endif |