diff options
Diffstat (limited to 'firmware')
-rw-r--r-- | firmware/drivers/button.c | 10 | ||||
-rw-r--r-- | firmware/drivers/lcd-ipod.c | 5 | ||||
-rw-r--r-- | firmware/export/pp5020.h | 52 | ||||
-rw-r--r-- | firmware/kernel.c | 10 | ||||
-rw-r--r-- | firmware/system.c | 4 |
5 files changed, 40 insertions, 41 deletions
diff --git a/firmware/drivers/button.c b/firmware/drivers/button.c index 143d4570e4..fc9cc7ac25 100644 --- a/firmware/drivers/button.c +++ b/firmware/drivers/button.c | |||
@@ -203,7 +203,7 @@ static int ipod_4g_button_read(void) | |||
203 | 203 | ||
204 | void ipod_4g_button_int(void) | 204 | void ipod_4g_button_int(void) |
205 | { | 205 | { |
206 | PP5020_CPU_HI_INT_CLR = PP5020_I2C_MASK; | 206 | CPU_HI_INT_CLR = I2C_MASK; |
207 | udelay(250); | 207 | udelay(250); |
208 | outl(0x0, 0x7000c140); | 208 | outl(0x0, 0x7000c140); |
209 | int_btn = ipod_4g_button_read(); | 209 | int_btn = ipod_4g_button_read(); |
@@ -211,8 +211,8 @@ void ipod_4g_button_int(void) | |||
211 | outl(0x400a1f00, 0x7000c100); | 211 | outl(0x400a1f00, 0x7000c100); |
212 | 212 | ||
213 | GPIOB_OUTPUT_VAL |= 0x10; | 213 | GPIOB_OUTPUT_VAL |= 0x10; |
214 | PP5020_CPU_INT_EN = 0x40000000; | 214 | CPU_INT_EN = 0x40000000; |
215 | PP5020_CPU_HI_INT_EN = PP5020_I2C_MASK; | 215 | CPU_HI_INT_EN = I2C_MASK; |
216 | } | 216 | } |
217 | #endif | 217 | #endif |
218 | 218 | ||
@@ -397,8 +397,8 @@ void button_init(void) | |||
397 | GPIOA_INT_CLR = GPIOA_INT_STAT & 0x20; | 397 | GPIOA_INT_CLR = GPIOA_INT_STAT & 0x20; |
398 | /* enable interrupts */ | 398 | /* enable interrupts */ |
399 | GPIOA_INT_EN = 0x20; | 399 | GPIOA_INT_EN = 0x20; |
400 | PP5020_CPU_INT_EN = 0x40000000; | 400 | CPU_INT_EN = 0x40000000; |
401 | PP5020_CPU_HI_INT_EN = PP5020_I2C_MASK; | 401 | CPU_HI_INT_EN = I2C_MASK; |
402 | #endif /* CONFIG_KEYPAD */ | 402 | #endif /* CONFIG_KEYPAD */ |
403 | 403 | ||
404 | queue_init(&button_queue); | 404 | queue_init(&button_queue); |
diff --git a/firmware/drivers/lcd-ipod.c b/firmware/drivers/lcd-ipod.c index 154158c6ad..9aa7d01adb 100644 --- a/firmware/drivers/lcd-ipod.c +++ b/firmware/drivers/lcd-ipod.c | |||
@@ -31,7 +31,6 @@ | |||
31 | 31 | ||
32 | /*** definitions ***/ | 32 | /*** definitions ***/ |
33 | #define IPOD_HW_REVISION (*((volatile unsigned long*)0x00002084)) | 33 | #define IPOD_HW_REVISION (*((volatile unsigned long*)0x00002084)) |
34 | #define IPOD_PP5020_RTC (*((volatile unsigned long*)0x60005010)) | ||
35 | 34 | ||
36 | #define IPOD_LCD_BASE 0x70008a0c | 35 | #define IPOD_LCD_BASE 0x70008a0c |
37 | #define IPOD_LCD_BUSY_MASK 0x80000000 | 36 | #define IPOD_LCD_BUSY_MASK 0x80000000 |
@@ -49,7 +48,7 @@ static int lcd_type = 1; /* 0 = "old" Color/Photo, 1 = "new" Color & Nano */ | |||
49 | /* check if number of useconds has past */ | 48 | /* check if number of useconds has past */ |
50 | static inline int timer_check(unsigned long clock_start, unsigned long usecs) | 49 | static inline int timer_check(unsigned long clock_start, unsigned long usecs) |
51 | { | 50 | { |
52 | if ( (IPOD_PP5020_RTC - clock_start) >= usecs ) { | 51 | if ( (USEC_TIMER - clock_start) >= usecs ) { |
53 | return 1; | 52 | return 1; |
54 | } else { | 53 | } else { |
55 | return 0; | 54 | return 0; |
@@ -59,7 +58,7 @@ static inline int timer_check(unsigned long clock_start, unsigned long usecs) | |||
59 | static void lcd_wait_write(void) | 58 | static void lcd_wait_write(void) |
60 | { | 59 | { |
61 | if ((inl(IPOD_LCD_BASE) & IPOD_LCD_BUSY_MASK) != 0) { | 60 | if ((inl(IPOD_LCD_BASE) & IPOD_LCD_BUSY_MASK) != 0) { |
62 | int start = IPOD_PP5020_RTC; | 61 | int start = USEC_TIMER; |
63 | 62 | ||
64 | do { | 63 | do { |
65 | if ((inl(IPOD_LCD_BASE) & IPOD_LCD_BUSY_MASK) == 0) break; | 64 | if ((inl(IPOD_LCD_BASE) & IPOD_LCD_BUSY_MASK) == 0) break; |
diff --git a/firmware/export/pp5020.h b/firmware/export/pp5020.h index 14dd2ba1c1..c5fa83cf1a 100644 --- a/firmware/export/pp5020.h +++ b/firmware/export/pp5020.h | |||
@@ -57,35 +57,35 @@ | |||
57 | #define DEV_RS (*(volatile unsigned long *)(0x60006004)) | 57 | #define DEV_RS (*(volatile unsigned long *)(0x60006004)) |
58 | #define DEV_EN (*(volatile unsigned long *)(0x6000600c)) | 58 | #define DEV_EN (*(volatile unsigned long *)(0x6000600c)) |
59 | 59 | ||
60 | #define PP5020_TIMER1 (*(volatile unsigned long *)(0x60005000)) | 60 | #define TIMER1_CFG (*(volatile unsigned long *)(0x60005000)) |
61 | #define PP5020_TIMER1_ACK (*(volatile unsigned long *)(0x60005004)) | 61 | #define TIMER1_VAL (*(volatile unsigned long *)(0x60005004)) |
62 | #define PP5020_TIMER2 (*(volatile unsigned long *)(0x60005008)) | 62 | #define TIMER2_CFG (*(volatile unsigned long *)(0x60005008)) |
63 | #define PP5020_TIMER2_ACK (*(volatile unsigned long *)(0x6000500c)) | 63 | #define TIMER2_VAL (*(volatile unsigned long *)(0x6000500c)) |
64 | #define PP5020_TIMER_STATUS (*(volatile unsigned long *)(0x60005010)) | 64 | #define USEC_TIMER (*(volatile unsigned long *)(0x60005010)) |
65 | 65 | ||
66 | #define PP5020_CPU_INT_STAT (*(volatile unsigned long*)(0x64004000)) | 66 | #define CPU_INT_STAT (*(volatile unsigned long*)(0x64004000)) |
67 | #define PP5020_CPU_HI_INT_STAT (*(volatile unsigned long*)(0x64004100)) | 67 | #define CPU_HI_INT_STAT (*(volatile unsigned long*)(0x64004100)) |
68 | #define PP5020_CPU_INT_EN (*(volatile unsigned long*)(0x60004024)) | 68 | #define CPU_INT_EN (*(volatile unsigned long*)(0x60004024)) |
69 | #define PP5020_CPU_HI_INT_EN (*(volatile unsigned long*)(0x60004124)) | 69 | #define CPU_HI_INT_EN (*(volatile unsigned long*)(0x60004124)) |
70 | #define PP5020_CPU_INT_CLR (*(volatile unsigned long*)(0x60004028)) | 70 | #define CPU_INT_CLR (*(volatile unsigned long*)(0x60004028)) |
71 | #define PP5020_CPU_HI_INT_CLR (*(volatile unsigned long*)(0x60004128)) | 71 | #define CPU_HI_INT_CLR (*(volatile unsigned long*)(0x60004128)) |
72 | 72 | ||
73 | #define PP5020_TIMER1_IRQ 0 | 73 | #define TIMER1_IRQ 0 |
74 | #define PP5020_TIMER2_IRQ 1 | 74 | #define TIMER2_IRQ 1 |
75 | #define PP5020_I2S_IRQ 10 | 75 | #define I2S_IRQ 10 |
76 | #define PP5020_IDE_IRQ 23 | 76 | #define IDE_IRQ 23 |
77 | #define PP5020_GPIO_IRQ (32+0) | 77 | #define GPIO_IRQ (32+0) |
78 | #define PP5020_SER0_IRQ (32+4) | 78 | #define SER0_IRQ (32+4) |
79 | #define PP5020_SER1_IRQ (32+5) | 79 | #define SER1_IRQ (32+5) |
80 | #define PP5020_I2C_IRQ (32+8) | 80 | #define I2C_IRQ (32+8) |
81 | 81 | ||
82 | #define PP5020_TIMER1_MASK (1 << PP5020_TIMER1_IRQ) | 82 | #define TIMER1_MASK (1 << TIMER1_IRQ) |
83 | #define PP5020_I2S_MASK (1 << PP5020_I2S_IRQ) | 83 | #define I2S_MASK (1 << I2S_IRQ) |
84 | #define PP5020_IDE_MASK (1 << PP5020_IDE_IRQ) | 84 | #define IDE_MASK (1 << IDE_IRQ) |
85 | #define PP5020_GPIO_MASK (1 << (PP5020_GPIO_IRQ-32)) | 85 | #define GPIO_MASK (1 << (GPIO_IRQ-32)) |
86 | #define PP5020_SER0_MASK (1 << (PP5020_SER0_IRQ-32)) | 86 | #define SER0_MASK (1 << (SER0_IRQ-32)) |
87 | #define PP5020_SER1_MASK (1 << (PP5020_SER1_IRQ-32)) | 87 | #define SER1_MASK (1 << (SER1_IRQ-32)) |
88 | #define PP5020_I2C_MASK (1 << (PP5020_I2C_IRQ-32)) | 88 | #define I2C_MASK (1 << (I2C_IRQ-32)) |
89 | 89 | ||
90 | #define USB2D_IDENT (*(volatile unsigned long*)(0xc5000000)) | 90 | #define USB2D_IDENT (*(volatile unsigned long*)(0xc5000000)) |
91 | #define USB_STATUS (*(volatile unsigned long*)(0xc50001a4)) | 91 | #define USB_STATUS (*(volatile unsigned long*)(0xc50001a4)) |
diff --git a/firmware/kernel.c b/firmware/kernel.c index 7d392a013b..85dca37b84 100644 --- a/firmware/kernel.c +++ b/firmware/kernel.c | |||
@@ -351,7 +351,7 @@ void TIMER1(void) | |||
351 | { | 351 | { |
352 | int i; | 352 | int i; |
353 | 353 | ||
354 | PP5020_TIMER1_ACK; | 354 | TIMER1_VAL; /* Read value to ack IRQ */ |
355 | /* Run through the list of tick tasks */ | 355 | /* Run through the list of tick tasks */ |
356 | for (i = 0;i < MAX_NUM_TICK_TASKS;i++) | 356 | for (i = 0;i < MAX_NUM_TICK_TASKS;i++) |
357 | { | 357 | { |
@@ -369,12 +369,12 @@ void TIMER1(void) | |||
369 | void tick_start(unsigned int interval_in_ms) | 369 | void tick_start(unsigned int interval_in_ms) |
370 | { | 370 | { |
371 | #ifndef BOOTLOADER | 371 | #ifndef BOOTLOADER |
372 | PP5020_TIMER1 = 0x0; | 372 | TIMER1_CFG = 0x0; |
373 | PP5020_TIMER1_ACK; | 373 | TIMER1_VAL; |
374 | /* enable timer */ | 374 | /* enable timer */ |
375 | PP5020_TIMER1 = 0xc0000000 | (interval_in_ms*1000); | 375 | TIMER1_CFG = 0xc0000000 | (interval_in_ms*1000); |
376 | /* unmask interrupt source */ | 376 | /* unmask interrupt source */ |
377 | PP5020_CPU_INT_EN = PP5020_TIMER1_MASK; | 377 | CPU_INT_EN = TIMER1_MASK; |
378 | #else | 378 | #else |
379 | /* We don't enable interrupts in the bootloader */ | 379 | /* We don't enable interrupts in the bootloader */ |
380 | (void)interval_in_ms; | 380 | (void)interval_in_ms; |
diff --git a/firmware/system.c b/firmware/system.c index 81e6957c2b..90b697885c 100644 --- a/firmware/system.c +++ b/firmware/system.c | |||
@@ -1112,9 +1112,9 @@ extern void ipod_4g_button_int(void); | |||
1112 | 1112 | ||
1113 | void irq(void) | 1113 | void irq(void) |
1114 | { | 1114 | { |
1115 | if (PP5020_CPU_INT_STAT & PP5020_TIMER1_MASK) | 1115 | if (CPU_INT_STAT & TIMER1_MASK) |
1116 | TIMER1(); | 1116 | TIMER1(); |
1117 | else if (PP5020_CPU_HI_INT_STAT & PP5020_I2C_MASK) | 1117 | else if (CPU_HI_INT_STAT & I2C_MASK) |
1118 | ipod_4g_button_int(); | 1118 | ipod_4g_button_int(); |
1119 | } | 1119 | } |
1120 | #endif | 1120 | #endif |