diff options
Diffstat (limited to 'firmware')
-rw-r--r-- | firmware/export/s5l8700.h | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/firmware/export/s5l8700.h b/firmware/export/s5l8700.h index 47b34808b6..e8f4bc70c7 100644 --- a/firmware/export/s5l8700.h +++ b/firmware/export/s5l8700.h | |||
@@ -609,17 +609,17 @@ | |||
609 | #define LCD_BASE 0x38600000 | 609 | #define LCD_BASE 0x38600000 |
610 | #endif | 610 | #endif |
611 | 611 | ||
612 | #define LCD_CON (*(REG16_PTR_T)(LCD_BASE+0x00)) /* Control register. */ | 612 | #define LCD_CON (*(REG32_PTR_T)(LCD_BASE+0x00)) /* Control register. */ |
613 | #define LCD_WCMD (*(REG16_PTR_T)(LCD_BASE+0x04)) /* Write command register. */ | 613 | #define LCD_WCMD (*(REG32_PTR_T)(LCD_BASE+0x04)) /* Write command register. */ |
614 | #define LCD_RCMD (*(REG16_PTR_T)(LCD_BASE+0x0C)) /* Read command register. */ | 614 | #define LCD_RCMD (*(REG32_PTR_T)(LCD_BASE+0x0C)) /* Read command register. */ |
615 | #define LCD_RDATA (*(REG16_PTR_T)(LCD_BASE+0x10)) /* Read data register. */ | 615 | #define LCD_RDATA (*(REG32_PTR_T)(LCD_BASE+0x10)) /* Read data register. */ |
616 | #define LCD_DBUFF (*(REG16_PTR_T)(LCD_BASE+0x14)) /* Read Data buffer */ | 616 | #define LCD_DBUFF (*(REG32_PTR_T)(LCD_BASE+0x14)) /* Read Data buffer */ |
617 | #define LCD_INTCON (*(REG16_PTR_T)(LCD_BASE+0x18)) /* Interrupt control register */ | 617 | #define LCD_INTCON (*(REG32_PTR_T)(LCD_BASE+0x18)) /* Interrupt control register */ |
618 | #define LCD_STATUS (*(REG16_PTR_T)(LCD_BASE+0x1C)) /* LCD Interface status 0106 */ | 618 | #define LCD_STATUS (*(REG32_PTR_T)(LCD_BASE+0x1C)) /* LCD Interface status 0106 */ |
619 | #define LCD_PHTIME (*(REG16_PTR_T)(LCD_BASE+0x20)) /* Phase time register 0060 */ | 619 | #define LCD_PHTIME (*(REG32_PTR_T)(LCD_BASE+0x20)) /* Phase time register 0060 */ |
620 | #define LCD_RST_TIME (*(REG16_PTR_T)(LCD_BASE+0x24)) /* Reset active period 07FF */ | 620 | #define LCD_RST_TIME (*(REG32_PTR_T)(LCD_BASE+0x24)) /* Reset active period 07FF */ |
621 | #define LCD_DRV_RST (*(REG16_PTR_T)(LCD_BASE+0x28)) /* Reset drive signal */ | 621 | #define LCD_DRV_RST (*(REG32_PTR_T)(LCD_BASE+0x28)) /* Reset drive signal */ |
622 | #define LCD_WDATA (*(REG16_PTR_T)(LCD_BASE+0x40)) /* Write data register FIXME */ | 622 | #define LCD_WDATA (*(REG32_PTR_T)(LCD_BASE+0x40)) /* Write data register (0x40...0x5C) FIXME */ |
623 | 623 | ||
624 | /* 27. CLCD CONTROLLER */ | 624 | /* 27. CLCD CONTROLLER */ |
625 | #define LCDCON1 (*(REG32_PTR_T)(0x39200000)) /* LCD control 1 register */ | 625 | #define LCDCON1 (*(REG32_PTR_T)(0x39200000)) /* LCD control 1 register */ |