diff options
Diffstat (limited to 'firmware')
26 files changed, 241 insertions, 83 deletions
diff --git a/firmware/drivers/ata.c b/firmware/drivers/ata.c index 681160cf01..57164c4749 100644 --- a/firmware/drivers/ata.c +++ b/firmware/drivers/ata.c | |||
@@ -134,7 +134,7 @@ static void ata_lock_unlock(struct ata_lock *l) | |||
134 | #define mutex_unlock ata_lock_unlock | 134 | #define mutex_unlock ata_lock_unlock |
135 | #endif /* MAX_PHYS_SECTOR_SIZE */ | 135 | #endif /* MAX_PHYS_SECTOR_SIZE */ |
136 | 136 | ||
137 | static struct mutex ata_mtx NOCACHEBSS_ATTR; | 137 | static struct mutex ata_mtx SHAREDBSS_ATTR; |
138 | int ata_device; /* device 0 (master) or 1 (slave) */ | 138 | int ata_device; /* device 0 (master) or 1 (slave) */ |
139 | 139 | ||
140 | int ata_spinup_time = 0; | 140 | int ata_spinup_time = 0; |
diff --git a/firmware/drivers/fat.c b/firmware/drivers/fat.c index a538b92695..002e100405 100644 --- a/firmware/drivers/fat.c +++ b/firmware/drivers/fat.c | |||
@@ -201,7 +201,7 @@ struct fat_cache_entry | |||
201 | 201 | ||
202 | static char fat_cache_sectors[FAT_CACHE_SIZE][SECTOR_SIZE]; | 202 | static char fat_cache_sectors[FAT_CACHE_SIZE][SECTOR_SIZE]; |
203 | static struct fat_cache_entry fat_cache[FAT_CACHE_SIZE]; | 203 | static struct fat_cache_entry fat_cache[FAT_CACHE_SIZE]; |
204 | static struct mutex cache_mutex NOCACHEBSS_ATTR; | 204 | static struct mutex cache_mutex SHAREDBSS_ATTR; |
205 | 205 | ||
206 | #if defined(HAVE_HOTSWAP) && !defined(HAVE_MMC) /* A better condition ?? */ | 206 | #if defined(HAVE_HOTSWAP) && !defined(HAVE_MMC) /* A better condition ?? */ |
207 | void fat_lock(void) | 207 | void fat_lock(void) |
diff --git a/firmware/export/config.h b/firmware/export/config.h index cd98fc9dca..a93152b5e7 100644 --- a/firmware/export/config.h +++ b/firmware/export/config.h | |||
@@ -457,25 +457,30 @@ | |||
457 | and not a special semaphore instruction */ | 457 | and not a special semaphore instruction */ |
458 | #define CORELOCK_SWAP 2 /* A swap (exchange) instruction */ | 458 | #define CORELOCK_SWAP 2 /* A swap (exchange) instruction */ |
459 | 459 | ||
460 | /* Dual core support - not yet working on the 1G/2G and 3G iPod */ | ||
461 | #if defined(CPU_PP) | 460 | #if defined(CPU_PP) |
462 | #define IDLE_STACK_SIZE 0x80 | 461 | #define IDLE_STACK_SIZE 0x80 |
463 | #define IDLE_STACK_WORDS 0x20 | 462 | #define IDLE_STACK_WORDS 0x20 |
464 | 463 | ||
464 | /* Attributes to place data in uncached DRAM */ | ||
465 | /* These are useful beyond dual-core and ultimately beyond PP since they may | ||
466 | * be used for DMA buffers and such without cache maintenence calls. */ | ||
467 | #define NOCACHEBSS_ATTR __attribute__((section(".ncbss"),nocommon)) | ||
468 | #define NOCACHEDATA_ATTR __attribute__((section(".ncdata"),nocommon)) | ||
469 | |||
465 | #if !defined(FORCE_SINGLE_CORE) | 470 | #if !defined(FORCE_SINGLE_CORE) |
466 | 471 | ||
467 | #define NUM_CORES 2 | 472 | #define NUM_CORES 2 |
468 | #define CURRENT_CORE current_core() | 473 | #define CURRENT_CORE current_core() |
469 | /* Use IRAM for variables shared across cores - large memory buffers should | 474 | /* Attributes for core-shared data in DRAM where IRAM is better used for other |
470 | * use UNCACHED_ADDR(a) and be appropriately aligned and padded */ | 475 | * purposes. */ |
471 | #define NOCACHEBSS_ATTR IBSS_ATTR | 476 | #define SHAREDBSS_ATTR NOCACHEBSS_ATTR |
472 | #define NOCACHEDATA_ATTR IDATA_ATTR | 477 | #define SHAREDDATA_ATTR NOCACHEDATA_ATTR |
473 | 478 | ||
474 | #define IF_COP(...) __VA_ARGS__ | 479 | #define IF_COP(...) __VA_ARGS__ |
475 | #define IF_COP_VOID(...) __VA_ARGS__ | 480 | #define IF_COP_VOID(...) __VA_ARGS__ |
476 | #define IF_COP_CORE(core) core | 481 | #define IF_COP_CORE(core) core |
477 | 482 | ||
478 | #if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5002 | 483 | #ifdef CPU_PP |
479 | #define CONFIG_CORELOCK SW_CORELOCK /* SWP(B) is broken */ | 484 | #define CONFIG_CORELOCK SW_CORELOCK /* SWP(B) is broken */ |
480 | #else | 485 | #else |
481 | #define CONFIG_CORELOCK CORELOCK_SWAP | 486 | #define CONFIG_CORELOCK CORELOCK_SWAP |
@@ -500,9 +505,10 @@ | |||
500 | #ifndef NUM_CORES | 505 | #ifndef NUM_CORES |
501 | /* Default to single core */ | 506 | /* Default to single core */ |
502 | #define NUM_CORES 1 | 507 | #define NUM_CORES 1 |
503 | #define CURRENT_CORE CPU | 508 | #define CURRENT_CORE CPU |
504 | #define NOCACHEBSS_ATTR | 509 | /* Attributes for core-shared data in DRAM - no caching considerations */ |
505 | #define NOCACHEDATA_ATTR | 510 | #define SHAREDBSS_ATTR |
511 | #define SHAREDDATA_ATTR | ||
506 | #define CONFIG_CORELOCK CORELOCK_NONE | 512 | #define CONFIG_CORELOCK CORELOCK_NONE |
507 | 513 | ||
508 | #define IF_COP(...) | 514 | #define IF_COP(...) |
diff --git a/firmware/kernel.c b/firmware/kernel.c index 1882855985..8ee553e121 100644 --- a/firmware/kernel.c +++ b/firmware/kernel.c | |||
@@ -49,7 +49,7 @@ | |||
49 | #endif | 49 | #endif |
50 | 50 | ||
51 | #if !defined(CPU_PP) || !defined(BOOTLOADER) | 51 | #if !defined(CPU_PP) || !defined(BOOTLOADER) |
52 | volatile long current_tick NOCACHEDATA_ATTR = 0; | 52 | volatile long current_tick SHAREDDATA_ATTR = 0; |
53 | #endif | 53 | #endif |
54 | 54 | ||
55 | void (*tick_funcs[MAX_NUM_TICK_TASKS])(void); | 55 | void (*tick_funcs[MAX_NUM_TICK_TASKS])(void); |
@@ -62,7 +62,7 @@ static struct | |||
62 | int count; | 62 | int count; |
63 | struct event_queue *queues[MAX_NUM_QUEUES]; | 63 | struct event_queue *queues[MAX_NUM_QUEUES]; |
64 | IF_COP( struct corelock cl; ) | 64 | IF_COP( struct corelock cl; ) |
65 | } all_queues NOCACHEBSS_ATTR; | 65 | } all_queues SHAREDBSS_ATTR; |
66 | 66 | ||
67 | /**************************************************************************** | 67 | /**************************************************************************** |
68 | * Standard kernel stuff | 68 | * Standard kernel stuff |
diff --git a/firmware/pcm.c b/firmware/pcm.c index 9f354f1e40..a4e107ad4d 100644 --- a/firmware/pcm.c +++ b/firmware/pcm.c | |||
@@ -67,13 +67,13 @@ | |||
67 | 67 | ||
68 | /* the registered callback function to ask for more mp3 data */ | 68 | /* the registered callback function to ask for more mp3 data */ |
69 | volatile pcm_more_callback_type pcm_callback_for_more | 69 | volatile pcm_more_callback_type pcm_callback_for_more |
70 | NOCACHEBSS_ATTR = NULL; | 70 | SHAREDBSS_ATTR = NULL; |
71 | /* PCM playback state */ | 71 | /* PCM playback state */ |
72 | volatile bool pcm_playing NOCACHEBSS_ATTR = false; | 72 | volatile bool pcm_playing SHAREDBSS_ATTR = false; |
73 | /* PCM paused state. paused implies playing */ | 73 | /* PCM paused state. paused implies playing */ |
74 | volatile bool pcm_paused NOCACHEBSS_ATTR = false; | 74 | volatile bool pcm_paused SHAREDBSS_ATTR = false; |
75 | /* samplerate of currently playing audio - undefined if stopped */ | 75 | /* samplerate of currently playing audio - undefined if stopped */ |
76 | unsigned long pcm_curr_sampr NOCACHEBSS_ATTR = 0; | 76 | unsigned long pcm_curr_sampr SHAREDBSS_ATTR = 0; |
77 | 77 | ||
78 | /** | 78 | /** |
79 | * Do peak calculation using distance squared from axis and save a lot | 79 | * Do peak calculation using distance squared from axis and save a lot |
@@ -312,12 +312,12 @@ void pcm_mute(bool mute) | |||
312 | /** Low level pcm recording apis **/ | 312 | /** Low level pcm recording apis **/ |
313 | 313 | ||
314 | /* Next start for recording peaks */ | 314 | /* Next start for recording peaks */ |
315 | const volatile void *pcm_rec_peak_addr NOCACHEBSS_ATTR = NULL; | 315 | const volatile void *pcm_rec_peak_addr SHAREDBSS_ATTR = NULL; |
316 | /* the registered callback function for when more data is available */ | 316 | /* the registered callback function for when more data is available */ |
317 | volatile pcm_more_callback_type2 | 317 | volatile pcm_more_callback_type2 |
318 | pcm_callback_more_ready NOCACHEBSS_ATTR = NULL; | 318 | pcm_callback_more_ready SHAREDBSS_ATTR = NULL; |
319 | /* DMA transfer in is currently active */ | 319 | /* DMA transfer in is currently active */ |
320 | volatile bool pcm_recording NOCACHEBSS_ATTR = false; | 320 | volatile bool pcm_recording SHAREDBSS_ATTR = false; |
321 | 321 | ||
322 | /** | 322 | /** |
323 | * Return recording peaks - From the end of the last peak up to | 323 | * Return recording peaks - From the end of the last peak up to |
diff --git a/firmware/pcm_record.c b/firmware/pcm_record.c index 49da257c08..6e65e678a3 100644 --- a/firmware/pcm_record.c +++ b/firmware/pcm_record.c | |||
@@ -212,8 +212,8 @@ enum | |||
212 | 212 | ||
213 | /***************************************************************************/ | 213 | /***************************************************************************/ |
214 | 214 | ||
215 | static struct event_queue pcmrec_queue NOCACHEBSS_ATTR; | 215 | static struct event_queue pcmrec_queue SHAREDBSS_ATTR; |
216 | static struct queue_sender_list pcmrec_queue_send NOCACHEBSS_ATTR; | 216 | static struct queue_sender_list pcmrec_queue_send SHAREDBSS_ATTR; |
217 | static long pcmrec_stack[3*DEFAULT_STACK_SIZE/sizeof(long)]; | 217 | static long pcmrec_stack[3*DEFAULT_STACK_SIZE/sizeof(long)]; |
218 | static const char pcmrec_thread_name[] = "pcmrec"; | 218 | static const char pcmrec_thread_name[] = "pcmrec"; |
219 | static struct thread_entry *pcmrec_thread_p; | 219 | static struct thread_entry *pcmrec_thread_p; |
diff --git a/firmware/system.c b/firmware/system.c index 65478e724b..15eb77eada 100644 --- a/firmware/system.c +++ b/firmware/system.c | |||
@@ -29,14 +29,14 @@ | |||
29 | #include "string.h" | 29 | #include "string.h" |
30 | 30 | ||
31 | #ifndef SIMULATOR | 31 | #ifndef SIMULATOR |
32 | long cpu_frequency NOCACHEBSS_ATTR = CPU_FREQ; | 32 | long cpu_frequency SHAREDBSS_ATTR = CPU_FREQ; |
33 | #endif | 33 | #endif |
34 | 34 | ||
35 | #ifdef HAVE_ADJUSTABLE_CPU_FREQ | 35 | #ifdef HAVE_ADJUSTABLE_CPU_FREQ |
36 | static int boost_counter NOCACHEBSS_ATTR = 0; | 36 | static int boost_counter SHAREDBSS_ATTR = 0; |
37 | static bool cpu_idle NOCACHEBSS_ATTR = false; | 37 | static bool cpu_idle SHAREDBSS_ATTR = false; |
38 | #if NUM_CORES > 1 | 38 | #if NUM_CORES > 1 |
39 | struct spinlock boostctrl_spin NOCACHEBSS_ATTR; | 39 | struct spinlock boostctrl_spin SHAREDBSS_ATTR; |
40 | void cpu_boost_init(void) | 40 | void cpu_boost_init(void) |
41 | { | 41 | { |
42 | spinlock_init(&boostctrl_spin); | 42 | spinlock_init(&boostctrl_spin); |
diff --git a/firmware/target/arm/i2c-pp.c b/firmware/target/arm/i2c-pp.c index 450effc32d..40eb80cfe1 100644 --- a/firmware/target/arm/i2c-pp.c +++ b/firmware/target/arm/i2c-pp.c | |||
@@ -33,7 +33,7 @@ | |||
33 | #include "as3514.h" | 33 | #include "as3514.h" |
34 | 34 | ||
35 | /* Local functions definitions */ | 35 | /* Local functions definitions */ |
36 | static struct mutex i2c_mtx NOCACHEBSS_ATTR; | 36 | static struct mutex i2c_mtx SHAREDBSS_ATTR; |
37 | 37 | ||
38 | #define POLL_TIMEOUT (HZ) | 38 | #define POLL_TIMEOUT (HZ) |
39 | 39 | ||
diff --git a/firmware/target/arm/ipod/1g2g/adc-ipod-1g2g.c b/firmware/target/arm/ipod/1g2g/adc-ipod-1g2g.c index f80412023d..564eb2e642 100644 --- a/firmware/target/arm/ipod/1g2g/adc-ipod-1g2g.c +++ b/firmware/target/arm/ipod/1g2g/adc-ipod-1g2g.c | |||
@@ -22,7 +22,7 @@ | |||
22 | #include "hwcompat.h" | 22 | #include "hwcompat.h" |
23 | #include "kernel.h" | 23 | #include "kernel.h" |
24 | 24 | ||
25 | static struct mutex adc_mtx NOCACHEBSS_ATTR; | 25 | static struct mutex adc_mtx SHAREDBSS_ATTR; |
26 | 26 | ||
27 | /* used in the 2nd gen ADC interrupt */ | 27 | /* used in the 2nd gen ADC interrupt */ |
28 | static unsigned int_data; | 28 | static unsigned int_data; |
diff --git a/firmware/target/arm/ipod/app.lds b/firmware/target/arm/ipod/app.lds index 765a5f0389..54af494d72 100644 --- a/firmware/target/arm/ipod/app.lds +++ b/firmware/target/arm/ipod/app.lds | |||
@@ -21,6 +21,14 @@ INPUT(target/arm/crt0-pp.o) | |||
21 | #define IRAMORIG 0x40000000 | 21 | #define IRAMORIG 0x40000000 |
22 | #define IRAMSIZE 0xc000 | 22 | #define IRAMSIZE 0xc000 |
23 | 23 | ||
24 | #ifdef CPU_PP502x | ||
25 | #define NOCACHE_BASE 0x10000000 | ||
26 | #else | ||
27 | #define NOCACHE_BASE 0x28000000 | ||
28 | #endif | ||
29 | |||
30 | #define CACHEALIGN_SIZE 16 | ||
31 | |||
24 | /* End of the audio buffer, where the codec buffer starts */ | 32 | /* End of the audio buffer, where the codec buffer starts */ |
25 | #define ENDAUDIOADDR (DRAMORIG + DRAMSIZE) | 33 | #define ENDAUDIOADDR (DRAMORIG + DRAMSIZE) |
26 | 34 | ||
@@ -70,6 +78,18 @@ SECTIONS | |||
70 | _dataend = .; | 78 | _dataend = .; |
71 | } > DRAM | 79 | } > DRAM |
72 | 80 | ||
81 | #if NOCACHE_BASE != 0 | ||
82 | /* .ncdata section is placed at uncached physical alias address and is | ||
83 | * loaded at the proper cached virtual address - no copying is | ||
84 | * performed in the init code */ | ||
85 | .ncdata . + NOCACHE_BASE : | ||
86 | { | ||
87 | . = ALIGN(CACHEALIGN_SIZE); | ||
88 | *(.ncdata*) | ||
89 | . = ALIGN(CACHEALIGN_SIZE); | ||
90 | } AT> DRAM | ||
91 | #endif | ||
92 | |||
73 | /DISCARD/ : | 93 | /DISCARD/ : |
74 | { | 94 | { |
75 | *(.eh_frame) | 95 | *(.eh_frame) |
@@ -103,7 +123,7 @@ SECTIONS | |||
103 | _iend = .; | 123 | _iend = .; |
104 | } > IRAM | 124 | } > IRAM |
105 | 125 | ||
106 | .idle_stacks : | 126 | .idle_stacks (NOLOAD) : |
107 | { | 127 | { |
108 | *(.idle_stacks) | 128 | *(.idle_stacks) |
109 | #if NUM_CORES > 1 | 129 | #if NUM_CORES > 1 |
@@ -116,7 +136,7 @@ SECTIONS | |||
116 | cop_idlestackend = .; | 136 | cop_idlestackend = .; |
117 | } > IRAM | 137 | } > IRAM |
118 | 138 | ||
119 | .stack : | 139 | .stack (NOLOAD) : |
120 | { | 140 | { |
121 | *(.stack) | 141 | *(.stack) |
122 | stackbegin = .; | 142 | stackbegin = .; |
@@ -124,37 +144,53 @@ SECTIONS | |||
124 | stackend = .; | 144 | stackend = .; |
125 | } > IRAM | 145 | } > IRAM |
126 | 146 | ||
127 | .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram) + SIZEOF(.vectors): | 147 | /* .bss and .ncbss are treated as a single section to use one init loop to |
148 | * zero it - note "_edata" and "_end" */ | ||
149 | .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.ncdata) +\ | ||
150 | SIZEOF(.iram) + SIZEOF(.vectors) (NOLOAD) : | ||
128 | { | 151 | { |
129 | _edata = .; | 152 | _edata = .; |
130 | *(.bss*) | 153 | *(.bss*) |
131 | *(COMMON) | 154 | *(COMMON) |
132 | . = ALIGN(0x4); | 155 | . = ALIGN(0x4); |
133 | _end = .; | ||
134 | } > DRAM | 156 | } > DRAM |
135 | 157 | ||
136 | .audiobuf ALIGN(4) : | 158 | #if NOCACHE_BASE != 0 |
159 | .ncbss . + NOCACHE_BASE (NOLOAD): | ||
160 | { | ||
161 | . = ALIGN(CACHEALIGN_SIZE); | ||
162 | *(.ncbss*) | ||
163 | . = ALIGN(CACHEALIGN_SIZE); | ||
164 | } AT> DRAM | ||
165 | #endif | ||
166 | |||
167 | /* This will be aligned by preceding alignments */ | ||
168 | .endaddr . - NOCACHE_BASE (NOLOAD) : | ||
169 | { | ||
170 | _end = .; | ||
171 | } > DRAM | ||
172 | |||
173 | .audiobuf (NOLOAD) : | ||
137 | { | 174 | { |
138 | _audiobuffer = .; | 175 | _audiobuffer = .; |
139 | audiobuffer = .; | 176 | audiobuffer = .; |
140 | } > DRAM | 177 | } > DRAM |
141 | 178 | ||
142 | .audiobufend ENDAUDIOADDR: | 179 | .audiobufend ENDAUDIOADDR (NOLOAD) : |
143 | { | 180 | { |
144 | audiobufend = .; | 181 | audiobufend = .; |
145 | _audiobufend = .; | 182 | _audiobufend = .; |
146 | } > DRAM | 183 | } > DRAM |
147 | 184 | ||
148 | .codec ENDAUDIOADDR: | 185 | .codec ENDAUDIOADDR (NOLOAD) : |
149 | { | 186 | { |
150 | codecbuf = .; | 187 | codecbuf = .; |
151 | _codecbuf = .; | 188 | _codecbuf = .; |
152 | } | 189 | } |
153 | 190 | ||
154 | .plugin ENDADDR: | 191 | .plugin ENDADDR (NOLOAD) : |
155 | { | 192 | { |
156 | _pluginbuf = .; | 193 | _pluginbuf = .; |
157 | pluginbuf = .; | 194 | pluginbuf = .; |
158 | } | 195 | } |
159 | } | 196 | } |
160 | |||
diff --git a/firmware/target/arm/ipod/boot.lds b/firmware/target/arm/ipod/boot.lds index 2f2f4f91a1..1f9c65d31c 100644 --- a/firmware/target/arm/ipod/boot.lds +++ b/firmware/target/arm/ipod/boot.lds | |||
@@ -43,6 +43,7 @@ SECTIONS | |||
43 | *(.irodata) | 43 | *(.irodata) |
44 | *(.idata) | 44 | *(.idata) |
45 | *(.data*) | 45 | *(.data*) |
46 | *(.ncdata*); | ||
46 | _dataend = . ; | 47 | _dataend = . ; |
47 | } | 48 | } |
48 | 49 | ||
@@ -64,6 +65,7 @@ SECTIONS | |||
64 | _edata = .; | 65 | _edata = .; |
65 | *(.bss*); | 66 | *(.bss*); |
66 | *(.ibss); | 67 | *(.ibss); |
68 | *(.ncbss*); | ||
67 | _end = .; | 69 | _end = .; |
68 | } | 70 | } |
69 | } | 71 | } |
diff --git a/firmware/target/arm/iriver/app.lds b/firmware/target/arm/iriver/app.lds index 765a5f0389..54af494d72 100644 --- a/firmware/target/arm/iriver/app.lds +++ b/firmware/target/arm/iriver/app.lds | |||
@@ -21,6 +21,14 @@ INPUT(target/arm/crt0-pp.o) | |||
21 | #define IRAMORIG 0x40000000 | 21 | #define IRAMORIG 0x40000000 |
22 | #define IRAMSIZE 0xc000 | 22 | #define IRAMSIZE 0xc000 |
23 | 23 | ||
24 | #ifdef CPU_PP502x | ||
25 | #define NOCACHE_BASE 0x10000000 | ||
26 | #else | ||
27 | #define NOCACHE_BASE 0x28000000 | ||
28 | #endif | ||
29 | |||
30 | #define CACHEALIGN_SIZE 16 | ||
31 | |||
24 | /* End of the audio buffer, where the codec buffer starts */ | 32 | /* End of the audio buffer, where the codec buffer starts */ |
25 | #define ENDAUDIOADDR (DRAMORIG + DRAMSIZE) | 33 | #define ENDAUDIOADDR (DRAMORIG + DRAMSIZE) |
26 | 34 | ||
@@ -70,6 +78,18 @@ SECTIONS | |||
70 | _dataend = .; | 78 | _dataend = .; |
71 | } > DRAM | 79 | } > DRAM |
72 | 80 | ||
81 | #if NOCACHE_BASE != 0 | ||
82 | /* .ncdata section is placed at uncached physical alias address and is | ||
83 | * loaded at the proper cached virtual address - no copying is | ||
84 | * performed in the init code */ | ||
85 | .ncdata . + NOCACHE_BASE : | ||
86 | { | ||
87 | . = ALIGN(CACHEALIGN_SIZE); | ||
88 | *(.ncdata*) | ||
89 | . = ALIGN(CACHEALIGN_SIZE); | ||
90 | } AT> DRAM | ||
91 | #endif | ||
92 | |||
73 | /DISCARD/ : | 93 | /DISCARD/ : |
74 | { | 94 | { |
75 | *(.eh_frame) | 95 | *(.eh_frame) |
@@ -103,7 +123,7 @@ SECTIONS | |||
103 | _iend = .; | 123 | _iend = .; |
104 | } > IRAM | 124 | } > IRAM |
105 | 125 | ||
106 | .idle_stacks : | 126 | .idle_stacks (NOLOAD) : |
107 | { | 127 | { |
108 | *(.idle_stacks) | 128 | *(.idle_stacks) |
109 | #if NUM_CORES > 1 | 129 | #if NUM_CORES > 1 |
@@ -116,7 +136,7 @@ SECTIONS | |||
116 | cop_idlestackend = .; | 136 | cop_idlestackend = .; |
117 | } > IRAM | 137 | } > IRAM |
118 | 138 | ||
119 | .stack : | 139 | .stack (NOLOAD) : |
120 | { | 140 | { |
121 | *(.stack) | 141 | *(.stack) |
122 | stackbegin = .; | 142 | stackbegin = .; |
@@ -124,37 +144,53 @@ SECTIONS | |||
124 | stackend = .; | 144 | stackend = .; |
125 | } > IRAM | 145 | } > IRAM |
126 | 146 | ||
127 | .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram) + SIZEOF(.vectors): | 147 | /* .bss and .ncbss are treated as a single section to use one init loop to |
148 | * zero it - note "_edata" and "_end" */ | ||
149 | .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.ncdata) +\ | ||
150 | SIZEOF(.iram) + SIZEOF(.vectors) (NOLOAD) : | ||
128 | { | 151 | { |
129 | _edata = .; | 152 | _edata = .; |
130 | *(.bss*) | 153 | *(.bss*) |
131 | *(COMMON) | 154 | *(COMMON) |
132 | . = ALIGN(0x4); | 155 | . = ALIGN(0x4); |
133 | _end = .; | ||
134 | } > DRAM | 156 | } > DRAM |
135 | 157 | ||
136 | .audiobuf ALIGN(4) : | 158 | #if NOCACHE_BASE != 0 |
159 | .ncbss . + NOCACHE_BASE (NOLOAD): | ||
160 | { | ||
161 | . = ALIGN(CACHEALIGN_SIZE); | ||
162 | *(.ncbss*) | ||
163 | . = ALIGN(CACHEALIGN_SIZE); | ||
164 | } AT> DRAM | ||
165 | #endif | ||
166 | |||
167 | /* This will be aligned by preceding alignments */ | ||
168 | .endaddr . - NOCACHE_BASE (NOLOAD) : | ||
169 | { | ||
170 | _end = .; | ||
171 | } > DRAM | ||
172 | |||
173 | .audiobuf (NOLOAD) : | ||
137 | { | 174 | { |
138 | _audiobuffer = .; | 175 | _audiobuffer = .; |
139 | audiobuffer = .; | 176 | audiobuffer = .; |
140 | } > DRAM | 177 | } > DRAM |
141 | 178 | ||
142 | .audiobufend ENDAUDIOADDR: | 179 | .audiobufend ENDAUDIOADDR (NOLOAD) : |
143 | { | 180 | { |
144 | audiobufend = .; | 181 | audiobufend = .; |
145 | _audiobufend = .; | 182 | _audiobufend = .; |
146 | } > DRAM | 183 | } > DRAM |
147 | 184 | ||
148 | .codec ENDAUDIOADDR: | 185 | .codec ENDAUDIOADDR (NOLOAD) : |
149 | { | 186 | { |
150 | codecbuf = .; | 187 | codecbuf = .; |
151 | _codecbuf = .; | 188 | _codecbuf = .; |
152 | } | 189 | } |
153 | 190 | ||
154 | .plugin ENDADDR: | 191 | .plugin ENDADDR (NOLOAD) : |
155 | { | 192 | { |
156 | _pluginbuf = .; | 193 | _pluginbuf = .; |
157 | pluginbuf = .; | 194 | pluginbuf = .; |
158 | } | 195 | } |
159 | } | 196 | } |
160 | |||
diff --git a/firmware/target/arm/iriver/boot.lds b/firmware/target/arm/iriver/boot.lds index 5fbe999333..971ec6627b 100644 --- a/firmware/target/arm/iriver/boot.lds +++ b/firmware/target/arm/iriver/boot.lds | |||
@@ -27,6 +27,7 @@ SECTIONS | |||
27 | *(.irodata) | 27 | *(.irodata) |
28 | *(.idata) | 28 | *(.idata) |
29 | *(.data*) | 29 | *(.data*) |
30 | *(.ncdata*); | ||
30 | _dataend = . ; | 31 | _dataend = . ; |
31 | } | 32 | } |
32 | 33 | ||
@@ -48,6 +49,7 @@ SECTIONS | |||
48 | _edata = .; | 49 | _edata = .; |
49 | *(.bss*); | 50 | *(.bss*); |
50 | *(.ibss); | 51 | *(.ibss); |
52 | *(.ncbss*); | ||
51 | _end = .; | 53 | _end = .; |
52 | } | 54 | } |
53 | } | 55 | } |
diff --git a/firmware/target/arm/iriver/h10/lcd-h10_20gb.c b/firmware/target/arm/iriver/h10/lcd-h10_20gb.c index 1c4116d2e7..1ee43c390f 100644 --- a/firmware/target/arm/iriver/h10/lcd-h10_20gb.c +++ b/firmware/target/arm/iriver/h10/lcd-h10_20gb.c | |||
@@ -34,7 +34,7 @@ static unsigned short disp_control_rev; | |||
34 | /* Contrast setting << 8 */ | 34 | /* Contrast setting << 8 */ |
35 | static int lcd_contrast; | 35 | static int lcd_contrast; |
36 | 36 | ||
37 | static unsigned lcd_yuv_options NOCACHEBSS_ATTR = 0; | 37 | static unsigned lcd_yuv_options SHAREDBSS_ATTR = 0; |
38 | 38 | ||
39 | /* Forward declarations */ | 39 | /* Forward declarations */ |
40 | static void lcd_display_off(void); | 40 | static void lcd_display_off(void); |
diff --git a/firmware/target/arm/olympus/app.lds b/firmware/target/arm/olympus/app.lds index 765a5f0389..54af494d72 100644 --- a/firmware/target/arm/olympus/app.lds +++ b/firmware/target/arm/olympus/app.lds | |||
@@ -21,6 +21,14 @@ INPUT(target/arm/crt0-pp.o) | |||
21 | #define IRAMORIG 0x40000000 | 21 | #define IRAMORIG 0x40000000 |
22 | #define IRAMSIZE 0xc000 | 22 | #define IRAMSIZE 0xc000 |
23 | 23 | ||
24 | #ifdef CPU_PP502x | ||
25 | #define NOCACHE_BASE 0x10000000 | ||
26 | #else | ||
27 | #define NOCACHE_BASE 0x28000000 | ||
28 | #endif | ||
29 | |||
30 | #define CACHEALIGN_SIZE 16 | ||
31 | |||
24 | /* End of the audio buffer, where the codec buffer starts */ | 32 | /* End of the audio buffer, where the codec buffer starts */ |
25 | #define ENDAUDIOADDR (DRAMORIG + DRAMSIZE) | 33 | #define ENDAUDIOADDR (DRAMORIG + DRAMSIZE) |
26 | 34 | ||
@@ -70,6 +78,18 @@ SECTIONS | |||
70 | _dataend = .; | 78 | _dataend = .; |
71 | } > DRAM | 79 | } > DRAM |
72 | 80 | ||
81 | #if NOCACHE_BASE != 0 | ||
82 | /* .ncdata section is placed at uncached physical alias address and is | ||
83 | * loaded at the proper cached virtual address - no copying is | ||
84 | * performed in the init code */ | ||
85 | .ncdata . + NOCACHE_BASE : | ||
86 | { | ||
87 | . = ALIGN(CACHEALIGN_SIZE); | ||
88 | *(.ncdata*) | ||
89 | . = ALIGN(CACHEALIGN_SIZE); | ||
90 | } AT> DRAM | ||
91 | #endif | ||
92 | |||
73 | /DISCARD/ : | 93 | /DISCARD/ : |
74 | { | 94 | { |
75 | *(.eh_frame) | 95 | *(.eh_frame) |
@@ -103,7 +123,7 @@ SECTIONS | |||
103 | _iend = .; | 123 | _iend = .; |
104 | } > IRAM | 124 | } > IRAM |
105 | 125 | ||
106 | .idle_stacks : | 126 | .idle_stacks (NOLOAD) : |
107 | { | 127 | { |
108 | *(.idle_stacks) | 128 | *(.idle_stacks) |
109 | #if NUM_CORES > 1 | 129 | #if NUM_CORES > 1 |
@@ -116,7 +136,7 @@ SECTIONS | |||
116 | cop_idlestackend = .; | 136 | cop_idlestackend = .; |
117 | } > IRAM | 137 | } > IRAM |
118 | 138 | ||
119 | .stack : | 139 | .stack (NOLOAD) : |
120 | { | 140 | { |
121 | *(.stack) | 141 | *(.stack) |
122 | stackbegin = .; | 142 | stackbegin = .; |
@@ -124,37 +144,53 @@ SECTIONS | |||
124 | stackend = .; | 144 | stackend = .; |
125 | } > IRAM | 145 | } > IRAM |
126 | 146 | ||
127 | .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram) + SIZEOF(.vectors): | 147 | /* .bss and .ncbss are treated as a single section to use one init loop to |
148 | * zero it - note "_edata" and "_end" */ | ||
149 | .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.ncdata) +\ | ||
150 | SIZEOF(.iram) + SIZEOF(.vectors) (NOLOAD) : | ||
128 | { | 151 | { |
129 | _edata = .; | 152 | _edata = .; |
130 | *(.bss*) | 153 | *(.bss*) |
131 | *(COMMON) | 154 | *(COMMON) |
132 | . = ALIGN(0x4); | 155 | . = ALIGN(0x4); |
133 | _end = .; | ||
134 | } > DRAM | 156 | } > DRAM |
135 | 157 | ||
136 | .audiobuf ALIGN(4) : | 158 | #if NOCACHE_BASE != 0 |
159 | .ncbss . + NOCACHE_BASE (NOLOAD): | ||
160 | { | ||
161 | . = ALIGN(CACHEALIGN_SIZE); | ||
162 | *(.ncbss*) | ||
163 | . = ALIGN(CACHEALIGN_SIZE); | ||
164 | } AT> DRAM | ||
165 | #endif | ||
166 | |||
167 | /* This will be aligned by preceding alignments */ | ||
168 | .endaddr . - NOCACHE_BASE (NOLOAD) : | ||
169 | { | ||
170 | _end = .; | ||
171 | } > DRAM | ||
172 | |||
173 | .audiobuf (NOLOAD) : | ||
137 | { | 174 | { |
138 | _audiobuffer = .; | 175 | _audiobuffer = .; |
139 | audiobuffer = .; | 176 | audiobuffer = .; |
140 | } > DRAM | 177 | } > DRAM |
141 | 178 | ||
142 | .audiobufend ENDAUDIOADDR: | 179 | .audiobufend ENDAUDIOADDR (NOLOAD) : |
143 | { | 180 | { |
144 | audiobufend = .; | 181 | audiobufend = .; |
145 | _audiobufend = .; | 182 | _audiobufend = .; |
146 | } > DRAM | 183 | } > DRAM |
147 | 184 | ||
148 | .codec ENDAUDIOADDR: | 185 | .codec ENDAUDIOADDR (NOLOAD) : |
149 | { | 186 | { |
150 | codecbuf = .; | 187 | codecbuf = .; |
151 | _codecbuf = .; | 188 | _codecbuf = .; |
152 | } | 189 | } |
153 | 190 | ||
154 | .plugin ENDADDR: | 191 | .plugin ENDADDR (NOLOAD) : |
155 | { | 192 | { |
156 | _pluginbuf = .; | 193 | _pluginbuf = .; |
157 | pluginbuf = .; | 194 | pluginbuf = .; |
158 | } | 195 | } |
159 | } | 196 | } |
160 | |||
diff --git a/firmware/target/arm/olympus/boot.lds b/firmware/target/arm/olympus/boot.lds index 5fbe999333..2c0245072c 100644 --- a/firmware/target/arm/olympus/boot.lds +++ b/firmware/target/arm/olympus/boot.lds | |||
@@ -27,6 +27,7 @@ SECTIONS | |||
27 | *(.irodata) | 27 | *(.irodata) |
28 | *(.idata) | 28 | *(.idata) |
29 | *(.data*) | 29 | *(.data*) |
30 | *(.ncdata*) | ||
30 | _dataend = . ; | 31 | _dataend = . ; |
31 | } | 32 | } |
32 | 33 | ||
@@ -48,6 +49,7 @@ SECTIONS | |||
48 | _edata = .; | 49 | _edata = .; |
49 | *(.bss*); | 50 | *(.bss*); |
50 | *(.ibss); | 51 | *(.ibss); |
52 | *(.ncbss*); | ||
51 | _end = .; | 53 | _end = .; |
52 | } | 54 | } |
53 | } | 55 | } |
diff --git a/firmware/target/arm/pcm-pp.c b/firmware/target/arm/pcm-pp.c index 433e6e1e4f..64c6d0cdc8 100644 --- a/firmware/target/arm/pcm-pp.c +++ b/firmware/target/arm/pcm-pp.c | |||
@@ -72,7 +72,7 @@ void fiq_handler(void) | |||
72 | /**************************************************************************** | 72 | /**************************************************************************** |
73 | ** Playback DMA transfer | 73 | ** Playback DMA transfer |
74 | **/ | 74 | **/ |
75 | struct dma_data dma_play_data NOCACHEBSS_ATTR = | 75 | struct dma_data dma_play_data SHAREDBSS_ATTR = |
76 | { | 76 | { |
77 | /* Initialize to a locked, stopped state */ | 77 | /* Initialize to a locked, stopped state */ |
78 | .p = NULL, | 78 | .p = NULL, |
@@ -84,7 +84,7 @@ struct dma_data dma_play_data NOCACHEBSS_ATTR = | |||
84 | .state = 0 | 84 | .state = 0 |
85 | }; | 85 | }; |
86 | 86 | ||
87 | static unsigned long pcm_freq NOCACHEDATA_ATTR = HW_SAMPR_DEFAULT; /* 44.1 is default */ | 87 | static unsigned long pcm_freq SHAREDDATA_ATTR = HW_SAMPR_DEFAULT; /* 44.1 is default */ |
88 | #ifdef HAVE_WM8751 | 88 | #ifdef HAVE_WM8751 |
89 | /* Samplerate control for audio codec */ | 89 | /* Samplerate control for audio codec */ |
90 | static int sr_ctrl = MROBE100_44100HZ; | 90 | static int sr_ctrl = MROBE100_44100HZ; |
@@ -356,7 +356,7 @@ const void * pcm_play_dma_get_peak_buffer(int *count) | |||
356 | **/ | 356 | **/ |
357 | #ifdef HAVE_RECORDING | 357 | #ifdef HAVE_RECORDING |
358 | /* PCM recording interrupt routine lockout */ | 358 | /* PCM recording interrupt routine lockout */ |
359 | static struct dma_data dma_rec_data NOCACHEBSS_ATTR = | 359 | static struct dma_data dma_rec_data SHAREDBSS_ATTR = |
360 | { | 360 | { |
361 | /* Initialize to a locked, stopped state */ | 361 | /* Initialize to a locked, stopped state */ |
362 | .p = NULL, | 362 | .p = NULL, |
diff --git a/firmware/target/arm/sandisk/app.lds b/firmware/target/arm/sandisk/app.lds index 765a5f0389..54af494d72 100644 --- a/firmware/target/arm/sandisk/app.lds +++ b/firmware/target/arm/sandisk/app.lds | |||
@@ -21,6 +21,14 @@ INPUT(target/arm/crt0-pp.o) | |||
21 | #define IRAMORIG 0x40000000 | 21 | #define IRAMORIG 0x40000000 |
22 | #define IRAMSIZE 0xc000 | 22 | #define IRAMSIZE 0xc000 |
23 | 23 | ||
24 | #ifdef CPU_PP502x | ||
25 | #define NOCACHE_BASE 0x10000000 | ||
26 | #else | ||
27 | #define NOCACHE_BASE 0x28000000 | ||
28 | #endif | ||
29 | |||
30 | #define CACHEALIGN_SIZE 16 | ||
31 | |||
24 | /* End of the audio buffer, where the codec buffer starts */ | 32 | /* End of the audio buffer, where the codec buffer starts */ |
25 | #define ENDAUDIOADDR (DRAMORIG + DRAMSIZE) | 33 | #define ENDAUDIOADDR (DRAMORIG + DRAMSIZE) |
26 | 34 | ||
@@ -70,6 +78,18 @@ SECTIONS | |||
70 | _dataend = .; | 78 | _dataend = .; |
71 | } > DRAM | 79 | } > DRAM |
72 | 80 | ||
81 | #if NOCACHE_BASE != 0 | ||
82 | /* .ncdata section is placed at uncached physical alias address and is | ||
83 | * loaded at the proper cached virtual address - no copying is | ||
84 | * performed in the init code */ | ||
85 | .ncdata . + NOCACHE_BASE : | ||
86 | { | ||
87 | . = ALIGN(CACHEALIGN_SIZE); | ||
88 | *(.ncdata*) | ||
89 | . = ALIGN(CACHEALIGN_SIZE); | ||
90 | } AT> DRAM | ||
91 | #endif | ||
92 | |||
73 | /DISCARD/ : | 93 | /DISCARD/ : |
74 | { | 94 | { |
75 | *(.eh_frame) | 95 | *(.eh_frame) |
@@ -103,7 +123,7 @@ SECTIONS | |||
103 | _iend = .; | 123 | _iend = .; |
104 | } > IRAM | 124 | } > IRAM |
105 | 125 | ||
106 | .idle_stacks : | 126 | .idle_stacks (NOLOAD) : |
107 | { | 127 | { |
108 | *(.idle_stacks) | 128 | *(.idle_stacks) |
109 | #if NUM_CORES > 1 | 129 | #if NUM_CORES > 1 |
@@ -116,7 +136,7 @@ SECTIONS | |||
116 | cop_idlestackend = .; | 136 | cop_idlestackend = .; |
117 | } > IRAM | 137 | } > IRAM |
118 | 138 | ||
119 | .stack : | 139 | .stack (NOLOAD) : |
120 | { | 140 | { |
121 | *(.stack) | 141 | *(.stack) |
122 | stackbegin = .; | 142 | stackbegin = .; |
@@ -124,37 +144,53 @@ SECTIONS | |||
124 | stackend = .; | 144 | stackend = .; |
125 | } > IRAM | 145 | } > IRAM |
126 | 146 | ||
127 | .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram) + SIZEOF(.vectors): | 147 | /* .bss and .ncbss are treated as a single section to use one init loop to |
148 | * zero it - note "_edata" and "_end" */ | ||
149 | .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.ncdata) +\ | ||
150 | SIZEOF(.iram) + SIZEOF(.vectors) (NOLOAD) : | ||
128 | { | 151 | { |
129 | _edata = .; | 152 | _edata = .; |
130 | *(.bss*) | 153 | *(.bss*) |
131 | *(COMMON) | 154 | *(COMMON) |
132 | . = ALIGN(0x4); | 155 | . = ALIGN(0x4); |
133 | _end = .; | ||
134 | } > DRAM | 156 | } > DRAM |
135 | 157 | ||
136 | .audiobuf ALIGN(4) : | 158 | #if NOCACHE_BASE != 0 |
159 | .ncbss . + NOCACHE_BASE (NOLOAD): | ||
160 | { | ||
161 | . = ALIGN(CACHEALIGN_SIZE); | ||
162 | *(.ncbss*) | ||
163 | . = ALIGN(CACHEALIGN_SIZE); | ||
164 | } AT> DRAM | ||
165 | #endif | ||
166 | |||
167 | /* This will be aligned by preceding alignments */ | ||
168 | .endaddr . - NOCACHE_BASE (NOLOAD) : | ||
169 | { | ||
170 | _end = .; | ||
171 | } > DRAM | ||
172 | |||
173 | .audiobuf (NOLOAD) : | ||
137 | { | 174 | { |
138 | _audiobuffer = .; | 175 | _audiobuffer = .; |
139 | audiobuffer = .; | 176 | audiobuffer = .; |
140 | } > DRAM | 177 | } > DRAM |
141 | 178 | ||
142 | .audiobufend ENDAUDIOADDR: | 179 | .audiobufend ENDAUDIOADDR (NOLOAD) : |
143 | { | 180 | { |
144 | audiobufend = .; | 181 | audiobufend = .; |
145 | _audiobufend = .; | 182 | _audiobufend = .; |
146 | } > DRAM | 183 | } > DRAM |
147 | 184 | ||
148 | .codec ENDAUDIOADDR: | 185 | .codec ENDAUDIOADDR (NOLOAD) : |
149 | { | 186 | { |
150 | codecbuf = .; | 187 | codecbuf = .; |
151 | _codecbuf = .; | 188 | _codecbuf = .; |
152 | } | 189 | } |
153 | 190 | ||
154 | .plugin ENDADDR: | 191 | .plugin ENDADDR (NOLOAD) : |
155 | { | 192 | { |
156 | _pluginbuf = .; | 193 | _pluginbuf = .; |
157 | pluginbuf = .; | 194 | pluginbuf = .; |
158 | } | 195 | } |
159 | } | 196 | } |
160 | |||
diff --git a/firmware/target/arm/sandisk/ata-c200_e200.c b/firmware/target/arm/sandisk/ata-c200_e200.c index 747cb17ca1..e4a5388978 100644 --- a/firmware/target/arm/sandisk/ata-c200_e200.c +++ b/firmware/target/arm/sandisk/ata-c200_e200.c | |||
@@ -165,7 +165,7 @@ static struct sd_card_status sd_status[NUM_VOLUMES] = | |||
165 | /* Shoot for around 75% usage */ | 165 | /* Shoot for around 75% usage */ |
166 | static long sd_stack [(DEFAULT_STACK_SIZE*2 + 0x1c0)/sizeof(long)]; | 166 | static long sd_stack [(DEFAULT_STACK_SIZE*2 + 0x1c0)/sizeof(long)]; |
167 | static const char sd_thread_name[] = "ata/sd"; | 167 | static const char sd_thread_name[] = "ata/sd"; |
168 | static struct mutex sd_mtx NOCACHEBSS_ATTR; | 168 | static struct mutex sd_mtx SHAREDBSS_ATTR; |
169 | static struct event_queue sd_queue; | 169 | static struct event_queue sd_queue; |
170 | 170 | ||
171 | /* Posted when card plugged status has changed */ | 171 | /* Posted when card plugged status has changed */ |
diff --git a/firmware/target/arm/sandisk/boot.lds b/firmware/target/arm/sandisk/boot.lds index a087a7250d..1c1066895f 100644 --- a/firmware/target/arm/sandisk/boot.lds +++ b/firmware/target/arm/sandisk/boot.lds | |||
@@ -30,6 +30,7 @@ SECTIONS | |||
30 | *(.irodata) | 30 | *(.irodata) |
31 | *(.idata) | 31 | *(.idata) |
32 | *(.data*) | 32 | *(.data*) |
33 | *(.ncdata*) | ||
33 | _dataend = . ; | 34 | _dataend = . ; |
34 | } | 35 | } |
35 | 36 | ||
@@ -51,6 +52,7 @@ SECTIONS | |||
51 | _edata = .; | 52 | _edata = .; |
52 | *(.bss*); | 53 | *(.bss*); |
53 | *(.ibss); | 54 | *(.ibss); |
55 | *(.ncbss*); | ||
54 | _end = .; | 56 | _end = .; |
55 | } | 57 | } |
56 | } | 58 | } |
diff --git a/firmware/target/arm/sandisk/sansa-c200/lcd-c200.c b/firmware/target/arm/sandisk/sansa-c200/lcd-c200.c index a629739d50..a2110f7e66 100644 --- a/firmware/target/arm/sandisk/sansa-c200/lcd-c200.c +++ b/firmware/target/arm/sandisk/sansa-c200/lcd-c200.c | |||
@@ -23,7 +23,7 @@ | |||
23 | #include "system.h" | 23 | #include "system.h" |
24 | 24 | ||
25 | /* Display status */ | 25 | /* Display status */ |
26 | static unsigned lcd_yuv_options NOCACHEBSS_ATTR = 0; | 26 | static unsigned lcd_yuv_options SHAREDBSS_ATTR = 0; |
27 | 27 | ||
28 | /* LCD command set for Samsung S6B33B2 */ | 28 | /* LCD command set for Samsung S6B33B2 */ |
29 | 29 | ||
diff --git a/firmware/target/arm/sandisk/sansa-e200/lcd-e200.c b/firmware/target/arm/sandisk/sansa-e200/lcd-e200.c index f2689eabbf..15263b5533 100644 --- a/firmware/target/arm/sandisk/sansa-e200/lcd-e200.c +++ b/firmware/target/arm/sandisk/sansa-e200/lcd-e200.c | |||
@@ -28,8 +28,8 @@ | |||
28 | 28 | ||
29 | /* Power and display status */ | 29 | /* Power and display status */ |
30 | static bool power_on = false; /* Is the power turned on? */ | 30 | static bool power_on = false; /* Is the power turned on? */ |
31 | static bool display_on NOCACHEBSS_ATTR = false; /* Is the display turned on? */ | 31 | static bool display_on SHAREDBSS_ATTR = false; /* Is the display turned on? */ |
32 | static unsigned lcd_yuv_options NOCACHEBSS_ATTR = 0; | 32 | static unsigned lcd_yuv_options SHAREDBSS_ATTR = 0; |
33 | 33 | ||
34 | /* Reverse Flag */ | 34 | /* Reverse Flag */ |
35 | #define R_DISP_CONTROL_NORMAL 0x0004 | 35 | #define R_DISP_CONTROL_NORMAL 0x0004 |
diff --git a/firmware/target/arm/system-target.h b/firmware/target/arm/system-target.h index 8dcbf0f9da..2a72b524f7 100644 --- a/firmware/target/arm/system-target.h +++ b/firmware/target/arm/system-target.h | |||
@@ -108,7 +108,7 @@ static inline unsigned int processor_id(void) | |||
108 | /* Certain data needs to be out of the way of cache line interference | 108 | /* Certain data needs to be out of the way of cache line interference |
109 | * such as data for COP use or for use with UNCACHED_ADDR */ | 109 | * such as data for COP use or for use with UNCACHED_ADDR */ |
110 | #define PROC_NEEDS_CACHEALIGN | 110 | #define PROC_NEEDS_CACHEALIGN |
111 | #define CACHEALIGN_BITS (5) /* 2^5 = 32 bytes */ | 111 | #define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */ |
112 | 112 | ||
113 | /** cache functions **/ | 113 | /** cache functions **/ |
114 | #ifndef BOOTLOADER | 114 | #ifndef BOOTLOADER |
diff --git a/firmware/target/arm/tcc780x/ata-nand-tcc780x.c b/firmware/target/arm/tcc780x/ata-nand-tcc780x.c index f6d1df96ce..b47444f3a8 100644 --- a/firmware/target/arm/tcc780x/ata-nand-tcc780x.c +++ b/firmware/target/arm/tcc780x/ata-nand-tcc780x.c | |||
@@ -42,7 +42,7 @@ static bool initialized = false; | |||
42 | static long next_yield = 0; | 42 | static long next_yield = 0; |
43 | #define MIN_YIELD_PERIOD 2000 | 43 | #define MIN_YIELD_PERIOD 2000 |
44 | 44 | ||
45 | static struct mutex ata_mtx NOCACHEBSS_ATTR; | 45 | static struct mutex ata_mtx SHAREDBSS_ATTR; |
46 | 46 | ||
47 | #define SECTOR_SIZE 512 | 47 | #define SECTOR_SIZE 512 |
48 | 48 | ||
diff --git a/firmware/thread.c b/firmware/thread.c index e6ab0e4a71..040818f31c 100644 --- a/firmware/thread.c +++ b/firmware/thread.c | |||
@@ -235,7 +235,7 @@ extern uintptr_t cpu_idlestackbegin[]; | |||
235 | extern uintptr_t cpu_idlestackend[]; | 235 | extern uintptr_t cpu_idlestackend[]; |
236 | extern uintptr_t cop_idlestackbegin[]; | 236 | extern uintptr_t cop_idlestackbegin[]; |
237 | extern uintptr_t cop_idlestackend[]; | 237 | extern uintptr_t cop_idlestackend[]; |
238 | static uintptr_t * const idle_stacks[NUM_CORES] NOCACHEDATA_ATTR = | 238 | static uintptr_t * const idle_stacks[NUM_CORES] = |
239 | { | 239 | { |
240 | [CPU] = cpu_idlestackbegin, | 240 | [CPU] = cpu_idlestackbegin, |
241 | [COP] = cop_idlestackbegin | 241 | [COP] = cop_idlestackbegin |
@@ -251,7 +251,7 @@ struct core_semaphores | |||
251 | volatile uint8_t unused; /* 03h */ | 251 | volatile uint8_t unused; /* 03h */ |
252 | }; | 252 | }; |
253 | 253 | ||
254 | static struct core_semaphores core_semaphores[NUM_CORES] NOCACHEBSS_ATTR; | 254 | static struct core_semaphores core_semaphores[NUM_CORES] IBSS_ATTR; |
255 | #endif /* CONFIG_CPU == PP5002 */ | 255 | #endif /* CONFIG_CPU == PP5002 */ |
256 | 256 | ||
257 | #endif /* NUM_CORES */ | 257 | #endif /* NUM_CORES */ |
diff --git a/firmware/timer.c b/firmware/timer.c index 23df271220..c803048744 100644 --- a/firmware/timer.c +++ b/firmware/timer.c | |||
@@ -25,12 +25,12 @@ | |||
25 | #include "logf.h" | 25 | #include "logf.h" |
26 | 26 | ||
27 | static int timer_prio = -1; | 27 | static int timer_prio = -1; |
28 | void NOCACHEBSS_ATTR (*pfn_timer)(void) = NULL; /* timer callback */ | 28 | void SHAREDBSS_ATTR (*pfn_timer)(void) = NULL; /* timer callback */ |
29 | void NOCACHEBSS_ATTR (*pfn_unregister)(void) = NULL; /* unregister callback */ | 29 | void SHAREDBSS_ATTR (*pfn_unregister)(void) = NULL; /* unregister callback */ |
30 | #ifdef CPU_COLDFIRE | 30 | #ifdef CPU_COLDFIRE |
31 | static int base_prescale; | 31 | static int base_prescale; |
32 | #elif defined CPU_PP || CONFIG_CPU == PNX0101 | 32 | #elif defined CPU_PP || CONFIG_CPU == PNX0101 |
33 | static long NOCACHEBSS_ATTR cycles_new = 0; | 33 | static long SHAREDBSS_ATTR cycles_new = 0; |
34 | #endif | 34 | #endif |
35 | 35 | ||
36 | /* interrupt handler */ | 36 | /* interrupt handler */ |