12 files changed, 89 insertions, 319 deletions

diff --git a/firmware/target/arm/as3525/pcm-as3525.c b/firmware/target/arm/as3525/pcm-as3525.c
index d47f80ae77..fe694e0967 100644
--- a/firmware/target/arm/as3525/pcm-as3525.c
+++ b/firmware/target/arm/as3525/pcm-as3525.c
@@ -138,8 +138,10 @@ void pcm_postinit(void)
     pcm_apply_settings();
 }
 
-void pcm_set_frequency(unsigned int frequency)
+void pcm_dma_apply_settings(void)
 {
+    unsigned long frequency = pcm_sampr;
+
     const int divider = (((AS3525_PLLA_FREQ/128) + (frequency/2)) / frequency) - 1;
     if(divider < 0 || divider > 511)
         panicf("unsupported frequency %d", frequency);
@@ -147,13 +149,6 @@ void pcm_set_frequency(unsigned int frequency)
     CGU_AUDIO &= ~(((511 ^ divider) << 2) /* I2SOUT */
             /*| ((511 ^ divider) << 14) */ /* I2SIN */
             );
-
-    pcm_curr_sampr = frequency;
-}
-
-void pcm_apply_settings(void)
-{
-    pcm_set_frequency(HW_SAMPR_DEFAULT);
 }
 
 size_t pcm_get_bytes_waiting(void)
diff --git a/firmware/target/arm/audio-pp.c b/firmware/target/arm/audio-pp.c
index ba52118e0f..b170518af4 100644
--- a/firmware/target/arm/audio-pp.c
+++ b/firmware/target/arm/audio-pp.c
@@ -40,6 +40,23 @@ void audio_input_mux(int source, unsigned flags)
     static bool last_recording = false;
 #endif
 
+#if defined(IPOD_COLOR) || defined (IPOD_4G)
+    /* The usual magic from IPL - I'm guessing this configures the headphone
+       socket to be input or output. */
+    if (recording && source != AUDIO_SRC_PLAYBACK)
+    {
+        /* input */
+        GPIO_CLEAR_BITWISE(GPIOI_OUTPUT_VAL, 0x40);
+        GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_VAL, 0x04);
+    }
+    else
+    {
+        /* output */
+        GPIO_SET_BITWISE(GPIOI_OUTPUT_VAL, 0x40);
+        GPIO_SET_BITWISE(GPIOA_OUTPUT_VAL, 0x04);
+    }
+#endif /* IPOD_COLOR || IPOD_4G */
+
     switch (source)
     {
         default:                        /* playback - no recording */
@@ -109,4 +126,3 @@ void audio_input_mux(int source, unsigned flags)
     last_source = source;
 } /* audio_input_mux */
 #endif /* INPUT_SRC_CAPS != 0 */
-
diff --git a/firmware/target/arm/i2s-pp.c b/firmware/target/arm/i2s-pp.c
index c96a559a8a..81c1fa1265 100644
--- a/firmware/target/arm/i2s-pp.c
+++ b/firmware/target/arm/i2s-pp.c
@@ -25,28 +25,22 @@
  * KIND, either express or implied.
  *
  ****************************************************************************/
-
 #include "system.h"
 #include "cpu.h"
 #include "i2s.h"
 
-/* TODO: Add in PP5002 defs */
 #if CONFIG_CPU == PP5002
 void i2s_reset(void)
 {
     /* I2S device reset */
-    DEV_RS |= 0x80;
-    DEV_RS &= ~0x80;
+    DEV_RS |= DEV_I2S;
+    DEV_RS &= ~DEV_I2S;
 
     /* I2S controller enable */
-    IISCONFIG |= 1;
-
-    /* BIT.FORMAT [11:10] = I2S (default) */
-    /* BIT.SIZE [9:8] = 24bit */
-    /* FIFO.FORMAT = 24 bit LSB */
+    IISCONFIG |= IIS_ENABLE;
 
     /* reset DAC and ADC fifo */
-    IISFIFO_CFG |= 0x30000;
+    IISFIFO_CFG |= IIS_RXCLR | IIS_TXCLR;
 }
 #else /* PP502X */
 
diff --git a/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c b/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c
index 99aa66a781..48f7f608d9 100644
--- a/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c
+++ b/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c
@@ -37,9 +37,6 @@ struct dma_data
     int state;
 };
 
-static unsigned long pcm_freq; /* 44.1 is default */
-static int sr_ctrl;
-
 static struct dma_data dma_play_data =
 {
     /* Initialize to a locked, stopped state */
@@ -67,15 +64,6 @@ void pcm_play_unlock(void)
     }
 }
 
-static void _pcm_apply_settings(void)
-{
-    if (pcm_freq != pcm_curr_sampr)
-    {
-        pcm_curr_sampr = pcm_freq;
-        audiohw_set_frequency(sr_ctrl);
-    }
-}
-
 static void __attribute__((interrupt("IRQ"))) SSI1_HANDLER(void)
 {
     register pcm_more_callback_type get_more;
@@ -109,19 +97,9 @@ static void __attribute__((interrupt("IRQ"))) SSI1_HANDLER(void)
     pcm_play_dma_stopped_callback();
 }
 
-void pcm_apply_settings(void)
+void pcm_dma_apply_settings(void)
 {
-    pcm_play_lock();
-#ifdef HAVE_RECORDING
-    pcm_rec_lock();
-#endif
-
-    _pcm_apply_settings();
-
-#ifdef HAVE_RECORDING
-    pcm_rec_unlock();
-#endif
-    pcm_play_unlock();
+    audiohw_set_frequency(pcm_fsel);
 }
 
 void pcm_play_dma_init(void)
@@ -214,7 +192,6 @@ void pcm_play_dma_init(void)
     /* Enable SSI2 (codec clock) */
     SSI_SCR2 |= SSI_SCR_SSIEN;
 
-    pcm_set_frequency(HW_SAMPR_DEFAULT);
     audiohw_init();
 }
 
@@ -230,7 +207,7 @@ static void play_start_pcm(void)
     SSI_SCR1 &= ~SSI_SCR_TE;
 
     /* Apply new settings */
-    _pcm_apply_settings();
+    pcm_apply_settings();
 
     /* Enable interrupt on unlock */
     dma_play_data.state = 1;
@@ -296,52 +273,6 @@ void pcm_play_dma_pause(bool pause)
     }
 }
 
-/* Set the pcm frequency hardware will use when play is next started or
-   when pcm_apply_settings is called. Do not apply the setting to the
-   hardware here but simply cache it. */
-void pcm_set_frequency(unsigned int frequency)
-{
-    int index;
-
-    switch (frequency)
-    {
-    case SAMPR_48:
-        index = HW_FREQ_48;
-        break;
-    case SAMPR_44:
-        index = HW_FREQ_44;
-        break;
-    case SAMPR_32:
-        index = HW_FREQ_32;
-        break;
-    case SAMPR_24:
-        index = HW_FREQ_24;
-        break;
-    case SAMPR_22:
-        index = HW_FREQ_22;
-        break;
-    case SAMPR_16:
-        index = HW_FREQ_16;
-        break;
-    case SAMPR_12:
-        index = HW_FREQ_12;
-        break;
-    case SAMPR_11:
-        index = HW_FREQ_11;
-        break;
-    case SAMPR_8:
-        index = HW_FREQ_8;
-        break;
-    default:
-        /* Invalid = default */
-        frequency = HW_SAMPR_DEFAULT;
-        index = HW_FREQ_DEFAULT;
-    }
-
-    pcm_freq = frequency;
-    sr_ctrl = index;
-}
-
 /* Return the number of bytes waiting - full L-R sample pairs only */
 size_t pcm_get_bytes_waiting(void)
 {
diff --git a/firmware/target/arm/pcm-pp.c b/firmware/target/arm/pcm-pp.c
index deaa20b6be..e00b1d7e75 100644
--- a/firmware/target/arm/pcm-pp.c
+++ b/firmware/target/arm/pcm-pp.c
@@ -25,10 +25,7 @@
 #include "audio.h"
 #include "sound.h"
 #include "pcm.h"
-
-#ifdef HAVE_WM8751
-#define MROBE100_44100HZ     (0x40|(0x11 << 1)|1)
-#endif
+#include "pcm_sampr.h"
 
 /** DMA **/
 
@@ -87,36 +84,9 @@ static struct dma_data dma_play_data SHAREDBSS_ATTR =
     .state = 0
 };
 
-static unsigned long pcm_freq SHAREDDATA_ATTR = HW_SAMPR_DEFAULT; /* 44.1 is default */
-#ifdef HAVE_WM8751
-/* Samplerate control for audio codec */
-static int sr_ctrl = MROBE100_44100HZ;
-#endif
-
-void pcm_set_frequency(unsigned int frequency)
-{
-#if defined(HAVE_WM8731) || defined(HAVE_WM8721)
-    pcm_freq = frequency;
-#else
-    (void)frequency;
-    pcm_freq = HW_SAMPR_DEFAULT;
-#endif
-#ifdef HAVE_WM8751
-    sr_ctrl  = MROBE100_44100HZ;
-#endif
-}
-
-void pcm_apply_settings(void)
+void pcm_dma_apply_settings(void)
 {
-#ifdef HAVE_WM8751
-    audiohw_set_frequency(sr_ctrl);
-#endif
-
-#if defined(HAVE_WM8711) || defined(HAVE_WM8721) \
-    || defined(HAVE_WM8731)
-    audiohw_set_sample_rate(pcm_freq);
-#endif
-    pcm_curr_sampr = pcm_freq;
+    audiohw_set_frequency(pcm_fsel);
 }
 
 /* ASM optimised FIQ handler. Checks for the minimum allowed loop cycles by
@@ -330,9 +300,7 @@ static void play_stop_pcm(void)
     IIS_IRQTX_REG &= ~IIS_IRQTX;
 
     /* Wait for FIFO to empty */
-#ifdef CPU_PP502x
-    while (IIS_TX_FREE_COUNT < 16);
-#endif
+    while (!IIS_TX_IS_EMPTY);
 
     dma_play_data.state = 0;
 }
@@ -397,8 +365,6 @@ void pcm_play_dma_init(void)
         : [iiscfg]"r"(iiscfg), [dmapd]"r"(dmapd)
         : "r2");
 
-    pcm_set_frequency(SAMPR_44);
-
     /* Initialize default register values. */
     audiohw_init();
 
@@ -620,24 +586,10 @@ void pcm_rec_dma_start(void *addr, size_t size)
 void pcm_rec_dma_close(void)
 {
     pcm_rec_dma_stop();
-
-#if defined(IPOD_COLOR) || defined (IPOD_4G)
-    /* The usual magic from IPL - I'm guessing this configures the headphone
-       socket to be input or output - in this case, output. */
-    GPIO_SET_BITWISE(GPIOI_OUTPUT_VAL, 0x40);
-    GPIO_SET_BITWISE(GPIOA_OUTPUT_VAL, 0x04);
-#endif
 } /* pcm_close_recording */
 
 void pcm_rec_dma_init(void)
 {
-#if defined(IPOD_COLOR) || defined (IPOD_4G)
-    /* The usual magic from IPL - I'm guessing this configures the headphone
-       socket to be input or output - in this case, input. */
-    GPIO_CLEAR_BITWISE(GPIOI_OUTPUT_VAL, 0x40);
-    GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_VAL, 0x04);
-#endif
-
     pcm_rec_dma_stop();
 } /* pcm_init */
 
diff --git a/firmware/target/arm/pcm-telechips.c b/firmware/target/arm/pcm-telechips.c
index affad01c76..a4dc63fc56 100644
--- a/firmware/target/arm/pcm-telechips.c
+++ b/firmware/target/arm/pcm-telechips.c
@@ -58,7 +58,7 @@ struct dma_data dma_play_data SHAREDBSS_ATTR =
     .state = 0
 };
 
-static unsigned long pcm_freq SHAREDDATA_ATTR = HW_SAMPR_DEFAULT; /* 44.1 is default */
+static unsigned long pcm_sampr SHAREDDATA_ATTR = HW_SAMPR_DEFAULT; /* 44.1 is default */
 
 void pcm_postinit(void)
 {
@@ -102,8 +102,6 @@ void pcm_play_dma_init(void)
     /* Set DAI interrupts as FIQs */
     IRQSEL = ~(DAI_RX_IRQ_MASK | DAI_TX_IRQ_MASK);
     
-    pcm_set_frequency(SAMPR_44);
-
     /* Initialize default register values. */
     audiohw_init();
    
@@ -113,15 +111,8 @@ void pcm_play_dma_init(void)
 #endif
 }
 
-void pcm_apply_settings(void)
-{
-    pcm_curr_sampr = pcm_freq;
-}
-
-void pcm_set_frequency(unsigned int frequency)
+void pcm_dma_apply_settings(void)
 {
-    (void) frequency;
-    pcm_freq = HW_SAMPR_DEFAULT;
 }
 
 static void play_start_pcm(void)
diff --git a/firmware/target/arm/pnx0101/pcm-pnx0101.c b/firmware/target/arm/pnx0101/pcm-pnx0101.c
index 4f90c5f829..20fca48039 100644
--- a/firmware/target/arm/pnx0101/pcm-pnx0101.c
+++ b/firmware/target/arm/pnx0101/pcm-pnx0101.c
@@ -27,7 +27,7 @@
 short __attribute__((section(".dmabuf"))) dma_buf_left[DMA_BUF_SAMPLES];
 short __attribute__((section(".dmabuf"))) dma_buf_right[DMA_BUF_SAMPLES];
 
-static int pcm_freq = HW_SAMPR_DEFAULT; /* 44.1 is default */
+static int pcm_sampr = HW_SAMPR_DEFAULT; /* 44.1 is default */
 
 unsigned short* p IBSS_ATTR;
 size_t p_size IBSS_ATTR;
@@ -147,8 +147,6 @@ void pcm_init(void)
 {
     int i;
 
-    pcm_set_frequency(HW_SAMPR_DEFAULT);
-
     memset(dma_buf_left, 0, sizeof(dma_buf_left));
     memset(dma_buf_right, 0, sizeof(dma_buf_right));
 
@@ -193,15 +191,8 @@ void pcm_postinit(void)
     pcm_apply_settings();
 }
 
-void pcm_set_frequency(unsigned int frequency)
-{
-    (void)frequency;
-    pcm_freq = HW_SAMPR_DEFAULT;
-}
-
-void pcm_apply_settings(void)
+void pcm_dma_apply_settings(void)
 {
-    pcm_curr_sampr = pcm_freq;
 }
 
 size_t pcm_get_bytes_waiting(void)
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c
index 14fbcd5cfe..315fc3bf0f 100644
--- a/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c
+++ b/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c
@@ -26,12 +26,6 @@
 #include "sound.h"
 #include "file.h"
 
-/* All exact rates for 16.9344MHz clock */
-#define GIGABEAT_11025HZ     (0x19 << 1)
-#define GIGABEAT_22050HZ     (0x1b << 1)
-#define GIGABEAT_44100HZ     (0x11 << 1)
-#define GIGABEAT_88200HZ     (0x1f << 1)
-
 /* PCM interrupt routine lockout */
 static struct
 {
@@ -43,11 +37,6 @@ static struct
     .state  = 0,
 };
 
-/* Last samplerate set by pcm_set_frequency */
-static unsigned long pcm_freq = 0; /* 44.1 is default */
-/* Samplerate control for audio codec */
-static int sr_ctrl = 0;
-
 #define FIFO_COUNT ((IISFCON >> 6) & 0x3F)
 
 /* Setup for the DMA controller */
@@ -57,22 +46,6 @@ static int sr_ctrl = 0;
 /* Get more data from the callback and top off the FIFO */
 void fiq_handler(void) __attribute__((interrupt ("FIQ")));
 
-static void _pcm_apply_settings(void)
-{
-    if (pcm_freq != pcm_curr_sampr)
-    {
-        pcm_curr_sampr = pcm_freq;
-        audiohw_set_frequency(sr_ctrl);
-    }
-}
-
-void pcm_apply_settings(void)
-{
-    int status = disable_fiq_save();
-    _pcm_apply_settings();
-    restore_fiq(status);
-}
-
 /* Mask the DMA interrupt */
 void pcm_play_lock(void)
 {
@@ -89,8 +62,6 @@ void pcm_play_unlock(void)
 
 void pcm_play_dma_init(void)
 {
-    pcm_set_frequency(SAMPR_44);
-
     /* There seem to be problems when changing the IIS interface configuration
      * when a clock is not present.
      */
@@ -128,13 +99,18 @@ void pcm_postinit(void)
     pcm_apply_settings();
 }
 
+void pcm_dma_apply_settings(void)
+{
+    audiohw_set_frequency(pcm_fsel);
+}
+
 /* Connect the DMA and start filling the FIFO */
 static void play_start_pcm(void)
 {
     /* clear pending DMA interrupt */
     SRCPND = DMA2_MASK;
 
-    _pcm_apply_settings();
+    pcm_apply_settings();
 
     /* Flush any pending writes */
     clean_dcache_range((void*)DISRC2, (DCON2 & 0xFFFFF) * 2);
@@ -272,29 +248,6 @@ void fiq_handler(void)
     }
 }
 
-void pcm_set_frequency(unsigned int frequency)
-{
-    switch(frequency)
-    {
-        case SAMPR_11:
-            sr_ctrl = GIGABEAT_11025HZ;
-            break;
-        case SAMPR_22:
-            sr_ctrl = GIGABEAT_22050HZ;
-            break;
-        default:
-            frequency = SAMPR_44;
-        case SAMPR_44:
-            sr_ctrl = GIGABEAT_44100HZ;
-            break;
-        case SAMPR_88:
-            sr_ctrl = GIGABEAT_88200HZ;
-            break;
-    }
-
-    pcm_freq = frequency;
-}
-
 size_t pcm_get_bytes_waiting(void)
 {
     /* lie a little and only return full pairs */
diff --git a/firmware/target/arm/tms320dm320/creative-zvm/pcm-creativezvm.c b/firmware/target/arm/tms320dm320/creative-zvm/pcm-creativezvm.c
index 34425fa63d..d8c953bbce 100644
--- a/firmware/target/arm/tms320dm320/creative-zvm/pcm-creativezvm.c
+++ b/firmware/target/arm/tms320dm320/creative-zvm/pcm-creativezvm.c
@@ -28,6 +28,8 @@
 #include "audiohw.h"
 #include "dsp-target.h"
 
+static int pcm_fsel = HW_FREQ_DEFAULT;
+
 void pcm_play_dma_init(void)
 {
     IO_CLK_O1DIV = 3;
@@ -37,7 +39,7 @@ void pcm_play_dma_init(void)
 
     audiohw_init();
 
-    audiohw_set_frequency(1);
+    audiohw_set_frequency(HW_FREQ_DEFAULT);
 
     /* init DSP */
     dsp_init();
@@ -46,42 +48,21 @@ void pcm_play_dma_init(void)
 void pcm_postinit(void)
 {
     audiohw_postinit();
+    pcm_apply_settings();
+
     /* wake DSP */
     dsp_wake();
 }
 
-/* set frequency used by the audio hardware */
-void pcm_set_frequency(unsigned int frequency)
-{
-    int index;
-
-    switch(frequency)
-    {
-        case SAMPR_11:
-        case SAMPR_22:
-            index = 0;
-            break;
-        default:
-        case SAMPR_44:
-            index = 1;
-            break;
-        case SAMPR_88:
-            index = 2;
-            break;
-    }
-
-    audiohw_set_frequency(index);
-} /* pcm_set_frequency */
-
 const void * pcm_play_dma_get_peak_buffer(int *count)
 {
     (void) count;
     return 0;
 }
 
-void pcm_apply_settings(void)
+void pcm_dma_apply_settings(void)
 {
-
+    audiohw_set_frequency(pcm_fsel);
 }
 
 void pcm_play_dma_start(const void *addr, size_t size)
diff --git a/firmware/target/arm/tms320dm320/mrobe-500/pcm-mr500.c b/firmware/target/arm/tms320dm320/mrobe-500/pcm-mr500.c
index 2f0e40757b..4c9cc337a5 100755..100644
--- a/firmware/target/arm/tms320dm320/mrobe-500/pcm-mr500.c
+++ b/firmware/target/arm/tms320dm320/mrobe-500/pcm-mr500.c
@@ -41,14 +41,8 @@ void pcm_play_dma_init(void)
 
 }
 
-void pcm_apply_settings(void)
+void pcm_dma_apply_settings(void)
 {
-
-}
-
-void pcm_set_frequency(unsigned int frequency)
-{
-    (void) frequency;
 }
 
 void pcm_play_dma_start(const void *addr, size_t size)
diff --git a/firmware/target/coldfire/pcm-coldfire.c b/firmware/target/coldfire/pcm-coldfire.c
index 35b3ecae9c..914947a98e 100644
--- a/firmware/target/coldfire/pcm-coldfire.c
+++ b/firmware/target/coldfire/pcm-coldfire.c
@@ -69,66 +69,43 @@ static void iis_play_reset_if_playback(bool if_playback)
 /** Sample rates **/
 #define FPARM_CLOCKSEL       0
 #define FPARM_CLSEL          1
-#define FPARM_FSEL           2
 #if CONFIG_CPU == MCF5249 && defined(HAVE_UDA1380)
-static const unsigned char pcm_freq_parms[HW_NUM_FREQ][3] =
+static const unsigned char pcm_freq_parms[HW_NUM_FREQ][2] =
 {
-    [HW_FREQ_88] = { 0x0c, 0x01, 0x03 },
-    [HW_FREQ_44] = { 0x06, 0x01, 0x02 },
-    [HW_FREQ_22] = { 0x04, 0x02, 0x01 },
-    [HW_FREQ_11] = { 0x02, 0x02, 0x00 },
+    [HW_FREQ_88] = { 0x0c, 0x01 },
+    [HW_FREQ_44] = { 0x06, 0x01 },
+    [HW_FREQ_22] = { 0x04, 0x02 },
+    [HW_FREQ_11] = { 0x02, 0x02 },
 };
 #endif
 
 #if (CONFIG_CPU == MCF5250 || CONFIG_CPU == MCF5249) && defined(HAVE_TLV320)
-static const unsigned char pcm_freq_parms[HW_NUM_FREQ][3] =
+static const unsigned char pcm_freq_parms[HW_NUM_FREQ][2] =
 {
-    [HW_FREQ_88] = { 0x0c, 0x01, 0x02 },
-    [HW_FREQ_44] = { 0x06, 0x01, 0x01 },
-    [HW_FREQ_22] = { 0x04, 0x01, 0x00 },
-    [HW_FREQ_11] = { 0x02, 0x02, 0x00 },
+    [HW_FREQ_88] = { 0x0c, 0x01 },
+    [HW_FREQ_44] = { 0x06, 0x01 },
+    [HW_FREQ_22] = { 0x04, 0x01 },
+    [HW_FREQ_11] = { 0x02, 0x02 },
 };
 #endif
 
-static unsigned long pcm_freq = 0; /* 44.1 is default */
-static const unsigned char *freq_ent = pcm_freq_parms[HW_FREQ_DEFAULT];
-
-/* set frequency used by the audio hardware */
-void pcm_set_frequency(unsigned int frequency)
-{
-    int index;
-
-    switch(frequency)
-    {
-        case SAMPR_11:
-            index = HW_FREQ_11;
-            break;
-        case SAMPR_22:
-            index = HW_FREQ_22;
-            break;
-        default:
-        case SAMPR_44:
-            index = HW_FREQ_44;
-            break;
-        case SAMPR_88:
-            index = HW_FREQ_88;
-            break;
-    }
-
-    /* remember table entry and rate */
-    freq_ent = pcm_freq_parms[index];
-    pcm_freq = hw_freq_sampr[index];
-} /* pcm_set_frequency */
+static const unsigned char *freq_ent;
 
 /* apply audio settings */
-static bool _pcm_apply_settings(bool clear_reset)
+static bool _pcm_dma_apply_settings(bool clear_reset)
 {
     bool did_reset = false;
-    unsigned long iis_play_defparm = IIS_PLAY_DEFPARM;
+    unsigned long iis_play_defparm;
+
+    int level = set_irq_level(DMA_IRQ_LEVEL);
+
+    /* remember table entry */
+    freq_ent = pcm_freq_parms[pcm_fsel];
  
-    if (pcm_freq != pcm_curr_sampr)
+    iis_play_defparm = IIS_PLAY_DEFPARM;
+
+    if (pcm_sampr != pcm_curr_sampr)
     {
-        pcm_curr_sampr = pcm_freq;
         /* Reprogramming bits 15-12 requires FIFO to be in a reset
            condition - Users Manual 17-8, Note 11 */
         or_l(IIS_FIFO_RESET, &IIS_PLAY);
@@ -136,8 +113,8 @@ static bool _pcm_apply_settings(bool clear_reset)
            or starting recording will sound absolutely awful once in
            awhile - audiohw_set_frequency then coldfire_set_pllcr_audio_bits
          */
-        SET_IIS_PLAY(iis_play_defparm | IIS_FIFO_RESET);
-        audiohw_set_frequency(freq_ent[FPARM_FSEL]);
+        SET_IIS_PLAY(IIS_PLAY_DEFPARM | IIS_FIFO_RESET);
+        audiohw_set_frequency(pcm_fsel);
         coldfire_set_pllcr_audio_bits(PLLCR_SET_AUDIO_BITS_DEFPARM);
         did_reset = true;
     }
@@ -147,26 +124,21 @@ static bool _pcm_apply_settings(bool clear_reset)
        be cleared. If the frequency didn't change, it was never altered and
        the reset flag can just be removed or no action taken. */
     if (clear_reset)
-        SET_IIS_PLAY(iis_play_defparm & ~IIS_FIFO_RESET);
+        SET_IIS_PLAY(IIS_PLAY_DEFPARM & ~IIS_FIFO_RESET);
+
+    restore_irq(level);
+
 #if 0
     logf("IISPLAY: %08X", IIS_PLAY);
 #endif
 
     return did_reset;
-} /* _pcm_apply_settings */
-
-/* apply audio setting with all DMA interrupts disabled */
-static void _pcm_apply_settings_irq_lock(bool clear_reset)
-{
-    int level = set_irq_level(DMA_IRQ_LEVEL);
-    _pcm_apply_settings(clear_reset);
-    restore_irq(level);
-}
+} /* _pcm_dma_apply_settings */
 
 /* This clears the reset bit to enable monitoring immediately if monitoring
    recording sources or always if playback is in progress - we might be 
    switching samplerates on the fly */
-void pcm_apply_settings(void)
+void pcm_dma_apply_settings(void)
 {
     int level = set_irq_level(DMA_IRQ_LEVEL);
     bool pbm = is_playback_monitoring();
@@ -174,14 +146,16 @@ void pcm_apply_settings(void)
 
     /* Clear reset if not playback monitoring or peripheral request is
        active and playback monitoring */
-    if (_pcm_apply_settings(!pbm || kick) && kick)
+    if (_pcm_dma_apply_settings(!pbm || kick) && kick)
         PDOR3 = 0; /* Kick FIFO out of reset by writing to it */
 
     restore_irq(level);
-} /* pcm_apply_settings */
+} /* pcm_dma_apply_settings */
 
 void pcm_play_dma_init(void)
 {
+    freq_ent = pcm_freq_parms[pcm_fsel];
+
     AUDIOGLOB =   (1 <<  8) /* IIS1 fifo auto sync  */
                 | (1 <<  7) /* PDIR2 fifo auto sync */
 #ifdef HAVE_SPDIF_OUT
@@ -200,7 +174,6 @@ void pcm_play_dma_init(void)
        other settings. */
     or_l(IIS_FIFO_RESET, &IIS_PLAY);
     SET_IIS_PLAY(IIS_PLAY_DEFPARM | IIS_FIFO_RESET);
-    pcm_set_frequency(HW_FREQ_DEFAULT);
     audio_set_output_source(AUDIO_SRC_PLAYBACK);
 
     /* Initialize default register values. */
@@ -208,7 +181,7 @@ void pcm_play_dma_init(void)
 
     audio_input_mux(AUDIO_SRC_PLAYBACK, SRCF_PLAYBACK);
 
-    audiohw_set_frequency(freq_ent[FPARM_FSEL]);
+    audiohw_set_frequency(pcm_fsel);
     coldfire_set_pllcr_audio_bits(PLLCR_SET_AUDIO_BITS_DEFPARM);
 
 #if defined(HAVE_SPDIF_REC) || defined(HAVE_SPDIF_OUT)
@@ -264,7 +237,7 @@ void pcm_play_dma_start(const void *addr, size_t size)
     BCR0 = (unsigned long)size;   /* Bytes to transfer   */
 
     /* Enable the FIFO and force one write to it */
-    _pcm_apply_settings_irq_lock(is_playback_monitoring());
+    _pcm_dma_apply_settings(is_playback_monitoring());
 
     DCR0 = DMA_INT | DMA_EEXT | DMA_CS | DMA_AA |
            DMA_SINC | DMA_SSIZE(DMA_SIZE_LINE) | DMA_START;
@@ -299,7 +272,7 @@ void pcm_play_dma_pause(bool pause)
     {
         /* restart playback on current buffer */
         /* Enable the FIFO and force one write to it */
-        _pcm_apply_settings_irq_lock(is_playback_monitoring());
+        _pcm_dma_apply_settings(is_playback_monitoring());
         or_l(DMA_EEXT | DMA_START, &DCR0);
         dma_play_lock.state = (1 << 14);
     }
@@ -403,7 +376,7 @@ void pcm_rec_dma_start(void *addr, size_t size)
     and_l(~PDIR2_FIFO_RESET, &DATAINCONTROL);
     /* Clear TX FIFO reset bit if the source is not set to monitor playback
        otherwise maintain independence between playback and recording. */
-    _pcm_apply_settings_irq_lock(!is_playback_monitoring());
+    _pcm_dma_apply_settings(!is_playback_monitoring());
 
     /* Start the DMA transfer.. */
 #ifdef HAVE_SPDIF_REC
diff --git a/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c b/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c
index e4d9127c21..2d3aa45d08 100644
--- a/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c
@@ -58,14 +58,13 @@ void pcm_play_dma_init(void)
     audiohw_init();
 }
 
-void pcm_set_frequency(unsigned int frequency)
+void pcm_dma_apply_settings(void)
 {
-    (void) frequency;
     /* TODO */
     
     /*
-    __i2s_set_oss_sample_size(frequency);
-    i2s_codec_set_samplerate(frequency);
+    __i2s_set_oss_sample_size(pcm_sampr);
+    i2s_codec_set_samplerate(pcm_sampr);
     */
 }