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-rw-r--r--firmware/target/arm/i2s-pp.c6
-rw-r--r--firmware/target/arm/pcm-pp.c67
2 files changed, 38 insertions, 35 deletions
diff --git a/firmware/target/arm/i2s-pp.c b/firmware/target/arm/i2s-pp.c
index af698fddd6..a2a74bf72b 100644
--- a/firmware/target/arm/i2s-pp.c
+++ b/firmware/target/arm/i2s-pp.c
@@ -84,6 +84,12 @@ void i2s_reset(void)
84 /* FIFO.FORMAT */ 84 /* FIFO.FORMAT */
85 /* If BIT.SIZE < FIFO.FORMAT low bits will be 0 */ 85 /* If BIT.SIZE < FIFO.FORMAT low bits will be 0 */
86 IISCONFIG = ((IISCONFIG & ~FIFO_FORMAT_MASK) | FIFO_FORMAT_32LSB); 86 IISCONFIG = ((IISCONFIG & ~FIFO_FORMAT_MASK) | FIFO_FORMAT_32LSB);
87#ifdef HAVE_AS3514
88 /* AS3514 can only operate as I2S Slave */
89 IISCONFIG |= I2S_MASTER;
90 /* Set I2S to 44.1kHz */
91 outl((inl(0x70002808) & ~(0x1ff)) | 271, 0x70002808);
92#endif
87 93
88 /* RX_ATN_LVL=1 == when 12 slots full */ 94 /* RX_ATN_LVL=1 == when 12 slots full */
89 /* TX_ATN_LVL=1 == when 12 slots empty */ 95 /* TX_ATN_LVL=1 == when 12 slots empty */
diff --git a/firmware/target/arm/pcm-pp.c b/firmware/target/arm/pcm-pp.c
index efe6c9b4e6..6ecc3dae31 100644
--- a/firmware/target/arm/pcm-pp.c
+++ b/firmware/target/arm/pcm-pp.c
@@ -30,12 +30,10 @@ static int rec_peak_left, rec_peak_right;
30#endif 30#endif
31 31
32/** DMA **/ 32/** DMA **/
33#if CONFIG_CPU == PP5020 33#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024
34#define FIFO_FREE_COUNT ((IISFIFO_CFG & 0x3f000000) >> 24) 34#define FIFO_FREE_COUNT ((IISFIFO_CFG & 0x3f000000) >> 24)
35#elif CONFIG_CPU == PP5002 35#elif CONFIG_CPU == PP5002
36#define FIFO_FREE_COUNT ((IISFIFO_CFG & 0x7800000) >> 23) 36#define FIFO_FREE_COUNT ((IISFIFO_CFG & 0x7800000) >> 23)
37#elif CONFIG_CPU == PP5024
38#define FIFO_FREE_COUNT 4 /* TODO: make this sensible */
39#endif 37#endif
40 38
41/**************************************************************************** 39/****************************************************************************
@@ -54,7 +52,7 @@ size_t p_size IBSS_ATTR;
54 actually needs to do so when calling pcm_callback_for_more. C version is 52 actually needs to do so when calling pcm_callback_for_more. C version is
55 still included below for reference. 53 still included below for reference.
56 */ 54 */
57#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5002 55#ifdef CPU_PP
58void fiq(void) ICODE_ATTR __attribute__((naked)); 56void fiq(void) ICODE_ATTR __attribute__((naked));
59void fiq(void) 57void fiq(void)
60{ 58{
@@ -94,10 +92,20 @@ void fiq(void)
94#endif 92#endif
95 "bls .fifo_full \n\t" /* FIFO full, exit */ 93 "bls .fifo_full \n\t" /* FIFO full, exit */
96 "ldr r10, [r9], #4 \n\t" /* load two samples */ 94 "ldr r10, [r9], #4 \n\t" /* load two samples */
95#ifdef HAVE_AS3514
96 /* The AS3514 reads 3 bytes at a time, it seems, ignoring the lowest.
97 This code seems to work well, but we may have to mask off the extra
98 bits - at the expense of a few extra cycles in the FIQ */
99 "mov r10, r10, ror #2\n\t" /* put left sample at the top bits */
100 "str r10, [r12, #0x40]\n\t" /* write top sample, lower sample ignored */
101 "mov r10, r10, ror #16\n\t" /* put left sample at the top bits */
102 "str r10, [r12, #0x40]\n\t" /* then write it */
103#else
97 "mov r10, r10, ror #16\n\t" /* put left sample at the top bits */ 104 "mov r10, r10, ror #16\n\t" /* put left sample at the top bits */
98 "str r10, [r12, #0x40]\n\t" /* write top sample, lower sample ignored */ 105 "str r10, [r12, #0x40]\n\t" /* write top sample, lower sample ignored */
99 "mov r10, r10, lsl #16\n\t" /* shift lower sample up */ 106 "mov r10, r10, lsl #16\n\t" /* shift lower sample up */
100 "str r10, [r12, #0x40]\n\t" /* then write it */ 107 "str r10, [r12, #0x40]\n\t" /* then write it */
108#endif
101 "subs r8, r8, #4 \n\t" /* check if we have more samples */ 109 "subs r8, r8, #4 \n\t" /* check if we have more samples */
102 "bne .fifo_loop \n\t" /* yes, continue */ 110 "bne .fifo_loop \n\t" /* yes, continue */
103 ".more_data: \n\t" 111 ".more_data: \n\t"
@@ -155,7 +163,7 @@ void fiq(void) ICODE_ATTR __attribute__ ((interrupt ("FIQ")));
155void fiq(void) 163void fiq(void)
156{ 164{
157 /* Clear interrupt */ 165 /* Clear interrupt */
158#if CONFIG_CPU == PP5020 166#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024
159 IISCONFIG &= ~0x2; 167 IISCONFIG &= ~0x2;
160#elif CONFIG_CPU == PP5002 168#elif CONFIG_CPU == PP5002
161 inl(0xcf001040); 169 inl(0xcf001040);
@@ -166,7 +174,7 @@ void fiq(void)
166 while (p_size) { 174 while (p_size) {
167 if (FIFO_FREE_COUNT < 2) { 175 if (FIFO_FREE_COUNT < 2) {
168 /* Enable interrupt */ 176 /* Enable interrupt */
169#if CONFIG_CPU == PP5020 177#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024
170 IISCONFIG |= 0x2; 178 IISCONFIG |= 0x2;
171#elif CONFIG_CPU == PP5002 179#elif CONFIG_CPU == PP5002
172 IISFIFO_CFG |= (1<<9); 180 IISFIFO_CFG |= (1<<9);
@@ -197,10 +205,9 @@ void pcm_play_dma_start(const void *addr, size_t size)
197 205
198 pcm_playing = true; 206 pcm_playing = true;
199 207
200#if CONFIG_CPU == PP5020 208#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024
201 CPU_INT_PRIORITY |= I2S_MASK; /* FIQ priority for I2S */ 209 CPU_INT_PRIORITY |= I2S_MASK; /* FIQ priority for I2S */
202 CPU_INT_EN = I2S_MASK; /* Enable I2S interrupt */ 210 CPU_INT_EN = I2S_MASK; /* Enable I2S interrupt */
203#elif CONFIG_CPU == PP5024
204#else 211#else
205 /* setup I2S interrupt for FIQ */ 212 /* setup I2S interrupt for FIQ */
206 outl(inl(0xcf00102c) | DMA_OUT_MASK, 0xcf00102c); 213 outl(inl(0xcf00102c) | DMA_OUT_MASK, 0xcf00102c);
@@ -212,7 +219,7 @@ void pcm_play_dma_start(const void *addr, size_t size)
212 enable_fiq(); 219 enable_fiq();
213 220
214 /* Enable playback FIFO */ 221 /* Enable playback FIFO */
215#if CONFIG_CPU == PP5020 222#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024
216 IISCONFIG |= 0x20000000; 223 IISCONFIG |= 0x20000000;
217#elif CONFIG_CPU == PP5002 224#elif CONFIG_CPU == PP5002
218 IISCONFIG |= 0x4; 225 IISCONFIG |= 0x4;
@@ -223,7 +230,7 @@ void pcm_play_dma_start(const void *addr, size_t size)
223 while (p_size > 0) { 230 while (p_size > 0) {
224 if (FIFO_FREE_COUNT < 2) { 231 if (FIFO_FREE_COUNT < 2) {
225 /* Enable interrupt */ 232 /* Enable interrupt */
226#if CONFIG_CPU == PP5020 233#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024
227 IISCONFIG |= 0x2; 234 IISCONFIG |= 0x2;
228#elif CONFIG_CPU == PP5002 235#elif CONFIG_CPU == PP5002
229 IISFIFO_CFG |= (1<<9); 236 IISFIFO_CFG |= (1<<9);
@@ -242,7 +249,7 @@ void pcm_play_dma_stop(void)
242{ 249{
243 pcm_playing = false; 250 pcm_playing = false;
244 251
245#if CONFIG_CPU == PP5020 252#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024
246 253
247 /* Disable playback FIFO */ 254 /* Disable playback FIFO */
248 IISCONFIG &= ~0x20000000; 255 IISCONFIG &= ~0x20000000;
@@ -264,7 +271,7 @@ void pcm_play_dma_stop(void)
264 271
265void pcm_play_pause_pause(void) 272void pcm_play_pause_pause(void)
266{ 273{
267#if CONFIG_CPU == PP5020 274#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024
268 /* Disable the interrupt */ 275 /* Disable the interrupt */
269 IISCONFIG &= ~0x2; 276 IISCONFIG &= ~0x2;
270 /* Disable playback FIFO */ 277 /* Disable playback FIFO */
@@ -286,7 +293,7 @@ void pcm_play_pause_unpause(void)
286 enable_fiq(); 293 enable_fiq();
287 294
288 /* Enable playback FIFO */ 295 /* Enable playback FIFO */
289#if CONFIG_CPU == PP5020 296#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024
290 IISCONFIG |= 0x20000000; 297 IISCONFIG |= 0x20000000;
291#elif CONFIG_CPU == PP5002 298#elif CONFIG_CPU == PP5002
292 IISCONFIG |= 0x4; 299 IISCONFIG |= 0x4;
@@ -297,7 +304,7 @@ void pcm_play_pause_unpause(void)
297 while (p_size > 0) { 304 while (p_size > 0) {
298 if (FIFO_FREE_COUNT < 2) { 305 if (FIFO_FREE_COUNT < 2) {
299 /* Enable interrupt */ 306 /* Enable interrupt */
300#if CONFIG_CPU == PP5020 307#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024
301 IISCONFIG |= 0x2; 308 IISCONFIG |= 0x2;
302#elif CONFIG_CPU == PP5002 309#elif CONFIG_CPU == PP5002
303 IISFIFO_CFG |= (1<<9); 310 IISFIFO_CFG |= (1<<9);
@@ -322,14 +329,6 @@ size_t pcm_get_bytes_waiting(void)
322 return p_size; 329 return p_size;
323} 330}
324 331
325#ifdef HAVE_PP5024_CODEC
326void pcm_init(void)
327{
328}
329void pcm_postinit(void)
330{
331}
332#else
333void pcm_init(void) 332void pcm_init(void)
334{ 333{
335 pcm_playing = false; 334 pcm_playing = false;
@@ -338,7 +337,7 @@ void pcm_init(void)
338 337
339 /* Initialize default register values. */ 338 /* Initialize default register values. */
340 audiohw_init(); 339 audiohw_init();
341 340
342 /* Power on */ 341 /* Power on */
343 audiohw_enable_output(true); 342 audiohw_enable_output(true);
344 343
@@ -353,8 +352,6 @@ void pcm_postinit(void)
353{ 352{
354 audiohw_postinit(); 353 audiohw_postinit();
355} 354}
356#endif /* HAVE_PP5024_CODEC */
357
358 355
359/**************************************************************************** 356/****************************************************************************
360 ** Recording DMA transfer 357 ** Recording DMA transfer
@@ -370,7 +367,7 @@ void fiq_record(void)
370 int status = 0; 367 int status = 0;
371 368
372 /* Clear interrupt */ 369 /* Clear interrupt */
373#if CONFIG_CPU == PP5020 370#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024
374 IISCONFIG &= ~0x01; 371 IISCONFIG &= ~0x01;
375#elif CONFIG_CPU == PP5002 372#elif CONFIG_CPU == PP5002
376 /* TODO */ 373 /* TODO */
@@ -379,7 +376,7 @@ void fiq_record(void)
379 while (p_size > 0) { 376 while (p_size > 0) {
380 if (FIFO_FREE_COUNT < 2) { 377 if (FIFO_FREE_COUNT < 2) {
381 /* enable interrupt */ 378 /* enable interrupt */
382#if CONFIG_CPU == PP5020 379#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024
383 IISCONFIG |= 0x01; 380 IISCONFIG |= 0x01;
384#elif CONFIG_CPU == PP5002 381#elif CONFIG_CPU == PP5002
385 /* TODO */ 382 /* TODO */
@@ -405,7 +402,7 @@ void fiq_record(void)
405 peak_l = peak_r = 0; 402 peak_l = peak_r = 0;
406 } 403 }
407 } 404 }
408 405
409 more_ready = pcm_callback_more_ready; 406 more_ready = pcm_callback_more_ready;
410 407
411 if (more_ready != NULL && more_ready(status) >= 0) 408 if (more_ready != NULL && more_ready(status) >= 0)
@@ -421,7 +418,7 @@ void pcm_record_more(void *start, size_t size)
421 rec_peak_addr = (unsigned long *)start; /* Start peaking at dest */ 418 rec_peak_addr = (unsigned long *)start; /* Start peaking at dest */
422 p = start; 419 p = start;
423 p_size = size; /* Bytes to transfer */ 420 p_size = size; /* Bytes to transfer */
424#if CONFIG_CPU == PP5020 421#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024
425 IISCONFIG |= 0x01; 422 IISCONFIG |= 0x01;
426#elif CONFIG_CPU == PP5002 423#elif CONFIG_CPU == PP5002
427 /* TODO */ 424 /* TODO */
@@ -431,12 +428,12 @@ void pcm_record_more(void *start, size_t size)
431void pcm_rec_dma_stop(void) 428void pcm_rec_dma_stop(void)
432{ 429{
433 logf("pcm_rec_dma_stop"); 430 logf("pcm_rec_dma_stop");
434 431
435 /* disable fifo */ 432 /* disable fifo */
436 IISCONFIG &= ~0x10000000; 433 IISCONFIG &= ~0x10000000;
437 434
438 disable_fiq(); 435 disable_fiq();
439 436
440 pcm_recording = false; 437 pcm_recording = false;
441} 438}
442 439
@@ -445,11 +442,11 @@ void pcm_rec_dma_start(void *addr, size_t size)
445 logf("pcm_rec_dma_start"); 442 logf("pcm_rec_dma_start");
446 443
447 pcm_recording = true; 444 pcm_recording = true;
448 445
449 peak_l = peak_r = 0; 446 peak_l = peak_r = 0;
450 p_size = size; 447 p_size = size;
451 p = addr; 448 p = addr;
452 449
453 /* setup FIQ */ 450 /* setup FIQ */
454 CPU_INT_PRIORITY |= I2S_MASK; 451 CPU_INT_PRIORITY |= I2S_MASK;
455 CPU_INT_EN = I2S_MASK; 452 CPU_INT_EN = I2S_MASK;
@@ -470,7 +467,7 @@ void pcm_close_recording(void)
470 467
471 pcm_rec_dma_stop(); 468 pcm_rec_dma_stop();
472 469
473#if (CONFIG_CPU == PP5020) 470#if (CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024)
474 disable_fiq(); 471 disable_fiq();
475 472
476 /* disable fifo */ 473 /* disable fifo */
@@ -488,7 +485,7 @@ void pcm_init_recording(void)
488 pcm_recording = false; 485 pcm_recording = false;
489 pcm_callback_more_ready = NULL; 486 pcm_callback_more_ready = NULL;
490 487
491#if (CONFIG_CPU == PP5020) 488#if (CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024)
492#if defined(IPOD_COLOR) || defined (IPOD_4G) 489#if defined(IPOD_COLOR) || defined (IPOD_4G)
493 /* The usual magic from IPL - I'm guessing this configures the headphone 490 /* The usual magic from IPL - I'm guessing this configures the headphone
494 socket to be input or output - in this case, input. */ 491 socket to be input or output - in this case, input. */