2 files changed, 10 insertions, 0 deletions

diff --git a/firmware/target/arm/s5l8700/system-target.h b/firmware/target/arm/s5l8700/system-target.h
index 81e5c7f7fd..c531344b64 100644
--- a/firmware/target/arm/s5l8700/system-target.h
+++ b/firmware/target/arm/s5l8700/system-target.h
@@ -29,6 +29,11 @@
 #define CPUFREQ_NORMAL  47923200
 #define CPUFREQ_MAX    191692800
 
+/* DMA engine needs aligned addresses */
+#define PROC_NEEDS_CACHEALIGN
+#define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */
+#define NEEDS_STORAGE_ALIGN
+
 #define inl(a) (*(volatile unsigned long *) (a))
 #define outl(a,b) (*(volatile unsigned long *) (b) = (a))
 #define inb(a) (*(volatile unsigned char *) (a))
diff --git a/firmware/target/arm/system-target.h b/firmware/target/arm/system-target.h
index 764cd18d15..1422e6467a 100644
--- a/firmware/target/arm/system-target.h
+++ b/firmware/target/arm/system-target.h
@@ -22,6 +22,7 @@
 #ifndef SYSTEM_TARGET_H
 #define SYSTEM_TARGET_H
 
+#include "config.h"
 #include "system-arm.h"
 
 #ifdef CPU_PP
@@ -162,6 +163,10 @@ static inline void wake_core(int core)
 #define PROC_NEEDS_CACHEALIGN
 #define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */
 
+#if defined(CPU_PP502x) && defined(HAVE_ATA_DMA)
+#define NEEDS_STORAGE_ALIGN
+#endif
+
 /** cache functions **/
 #ifndef BOOTLOADER
 #define HAVE_CPUCACHE_INVALIDATE