diff options
Diffstat (limited to 'firmware/target')
-rw-r--r-- | firmware/target/sh/archos/i2c-archos.c | 252 |
1 files changed, 252 insertions, 0 deletions
diff --git a/firmware/target/sh/archos/i2c-archos.c b/firmware/target/sh/archos/i2c-archos.c new file mode 100644 index 0000000000..b3a53240b4 --- /dev/null +++ b/firmware/target/sh/archos/i2c-archos.c | |||
@@ -0,0 +1,252 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2002 by Linus Nielsen Feltzing | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | #include "lcd.h" | ||
22 | #include "cpu.h" | ||
23 | #include "kernel.h" | ||
24 | #include "thread.h" | ||
25 | #include "debug.h" | ||
26 | #include "system.h" | ||
27 | #include "i2c.h" | ||
28 | |||
29 | /* cute little functions, atomic read-modify-write */ | ||
30 | |||
31 | /* SDA is PB7 */ | ||
32 | #define SDA_LO and_b(~0x80, &PBDRL) | ||
33 | #define SDA_HI or_b(0x80, &PBDRL) | ||
34 | #define SDA_INPUT and_b(~0x80, &PBIORL) | ||
35 | #define SDA_OUTPUT or_b(0x80, &PBIORL) | ||
36 | #define SDA (PBDRL & 0x80) | ||
37 | |||
38 | #if CONFIG_I2C == I2C_ONDIO | ||
39 | /* Ondio pinout, SCL moved to PB6 */ | ||
40 | #define SCL_INPUT and_b(~0x40, &PBIORL) | ||
41 | #define SCL_OUTPUT or_b(0x40, &PBIORL) | ||
42 | #define SCL_LO and_b(~0x40, &PBDRL) | ||
43 | #define SCL_HI or_b(0x40, &PBDRL) | ||
44 | #define SCL (PBDRL & 0x40) | ||
45 | #else | ||
46 | /* "classic" pinout, SCL is PB13 */ | ||
47 | #define SCL_INPUT and_b(~0x20, &PBIORH) | ||
48 | #define SCL_OUTPUT or_b(0x20, &PBIORH) | ||
49 | #define SCL_LO and_b(~0x20, &PBDRH) | ||
50 | #define SCL_HI or_b(0x20, &PBDRH) | ||
51 | #define SCL (PBDRH & 0x20) | ||
52 | #endif | ||
53 | |||
54 | /* arbitrary delay loop */ | ||
55 | #define DELAY do { int _x; for(_x=0;_x<20;_x++);} while (0) | ||
56 | |||
57 | static struct mutex i2c_mtx SHAREDBSS_ATTR; | ||
58 | |||
59 | void i2c_begin(void) | ||
60 | { | ||
61 | mutex_lock(&i2c_mtx); | ||
62 | } | ||
63 | |||
64 | void i2c_end(void) | ||
65 | { | ||
66 | mutex_unlock(&i2c_mtx); | ||
67 | } | ||
68 | |||
69 | void i2c_start(void) | ||
70 | { | ||
71 | SDA_OUTPUT; | ||
72 | SDA_HI; | ||
73 | SCL_HI; | ||
74 | SDA_LO; | ||
75 | DELAY; | ||
76 | SCL_LO; | ||
77 | } | ||
78 | |||
79 | void i2c_stop(void) | ||
80 | { | ||
81 | SDA_LO; | ||
82 | SCL_HI; | ||
83 | DELAY; | ||
84 | SDA_HI; | ||
85 | } | ||
86 | |||
87 | void i2c_init(void) | ||
88 | { | ||
89 | int i; | ||
90 | |||
91 | mutex_init(&i2c_mtx); | ||
92 | |||
93 | #if CONFIG_I2C == I2C_ONDIO | ||
94 | /* make PB6 & PB7 general I/O */ | ||
95 | PBCR2 &= ~0xf000; | ||
96 | #else /* not Ondio */ | ||
97 | /* make PB7 & PB13 general I/O */ | ||
98 | PBCR1 &= ~0x0c00; /* PB13 */ | ||
99 | PBCR2 &= ~0xc000; /* PB7 */ | ||
100 | #endif | ||
101 | |||
102 | SCL_OUTPUT; | ||
103 | SDA_OUTPUT; | ||
104 | SDA_HI; | ||
105 | SCL_LO; | ||
106 | for (i=0;i<3;i++) | ||
107 | i2c_stop(); | ||
108 | } | ||
109 | |||
110 | void i2c_ack(int bit) | ||
111 | { | ||
112 | /* Here's the deal. The MAS is slow, and sometimes needs to wait | ||
113 | before it can receive the acknowledge. Therefore it forces the clock | ||
114 | low until it is ready. We need to poll the clock line until it goes | ||
115 | high before we release the ack. */ | ||
116 | |||
117 | SCL_LO; /* Set the clock low */ | ||
118 | if ( bit ) | ||
119 | { | ||
120 | SDA_HI; | ||
121 | } | ||
122 | else | ||
123 | { | ||
124 | SDA_LO; | ||
125 | } | ||
126 | |||
127 | SCL_INPUT; /* Set the clock to input */ | ||
128 | while(!SCL) /* and wait for the MAS to release it */ | ||
129 | sleep(0); | ||
130 | |||
131 | DELAY; | ||
132 | SCL_OUTPUT; | ||
133 | SCL_LO; | ||
134 | } | ||
135 | |||
136 | int i2c_getack(void) | ||
137 | { | ||
138 | int ret = 1; | ||
139 | |||
140 | /* Here's the deal. The MAS is slow, and sometimes needs to wait | ||
141 | before it can send the acknowledge. Therefore it forces the clock | ||
142 | low until it is ready. We need to poll the clock line until it goes | ||
143 | high before we read the ack. */ | ||
144 | |||
145 | #ifdef HAVE_I2C_LOW_FIRST | ||
146 | SDA_LO; /* First, discharge the data line */ | ||
147 | #endif | ||
148 | SDA_INPUT; /* And set to input */ | ||
149 | SCL_INPUT; /* Set the clock to input */ | ||
150 | while(!SCL) /* and wait for the MAS to release it */ | ||
151 | sleep(0); | ||
152 | |||
153 | if (SDA) | ||
154 | /* ack failed */ | ||
155 | ret = 0; | ||
156 | |||
157 | SCL_OUTPUT; | ||
158 | SCL_LO; | ||
159 | SDA_HI; | ||
160 | SDA_OUTPUT; | ||
161 | return ret; | ||
162 | } | ||
163 | |||
164 | void i2c_outb(unsigned char byte) | ||
165 | { | ||
166 | int i; | ||
167 | |||
168 | /* clock out each bit, MSB first */ | ||
169 | for ( i=0x80; i; i>>=1 ) { | ||
170 | if ( i & byte ) | ||
171 | { | ||
172 | SDA_HI; | ||
173 | } | ||
174 | else | ||
175 | { | ||
176 | SDA_LO; | ||
177 | } | ||
178 | SCL_HI; | ||
179 | SCL_LO; | ||
180 | } | ||
181 | |||
182 | SDA_HI; | ||
183 | } | ||
184 | |||
185 | unsigned char i2c_inb(int ack) | ||
186 | { | ||
187 | int i; | ||
188 | unsigned char byte = 0; | ||
189 | |||
190 | /* clock in each bit, MSB first */ | ||
191 | for ( i=0x80; i; i>>=1 ) { | ||
192 | #ifdef HAVE_I2C_LOW_FIRST | ||
193 | /* Tricky business. Here we discharge the data line by driving it low | ||
194 | and then set it to input to see if it stays low or goes high */ | ||
195 | SDA_LO; /* First, discharge the data line */ | ||
196 | #endif | ||
197 | SDA_INPUT; /* And set to input */ | ||
198 | SCL_HI; | ||
199 | if ( SDA ) | ||
200 | byte |= i; | ||
201 | SCL_LO; | ||
202 | SDA_OUTPUT; | ||
203 | } | ||
204 | |||
205 | i2c_ack(ack); | ||
206 | |||
207 | return byte; | ||
208 | } | ||
209 | |||
210 | int i2c_write(int address, const unsigned char* buf, int count ) | ||
211 | { | ||
212 | int i,x=0; | ||
213 | |||
214 | i2c_start(); | ||
215 | i2c_outb(address & 0xfe); | ||
216 | if (i2c_getack()) | ||
217 | { | ||
218 | for (i=0; i<count; i++) | ||
219 | { | ||
220 | i2c_outb(buf[i]); | ||
221 | if (!i2c_getack()) | ||
222 | { | ||
223 | x=-2; | ||
224 | break; | ||
225 | } | ||
226 | } | ||
227 | } | ||
228 | else | ||
229 | { | ||
230 | debugf("i2c_write() - no ack\n"); | ||
231 | x=-1; | ||
232 | } | ||
233 | i2c_stop(); | ||
234 | return x; | ||
235 | } | ||
236 | |||
237 | int i2c_read(int address, unsigned char* buf, int count ) | ||
238 | { | ||
239 | int i,x=0; | ||
240 | |||
241 | i2c_start(); | ||
242 | i2c_outb(address | 1); | ||
243 | if (i2c_getack()) { | ||
244 | for (i=0; i<count; i++) { | ||
245 | buf[i] = i2c_inb(0); | ||
246 | } | ||
247 | } | ||
248 | else | ||
249 | x=-1; | ||
250 | i2c_stop(); | ||
251 | return x; | ||
252 | } | ||