diff options
Diffstat (limited to 'firmware/target')
-rw-r--r-- | firmware/target/arm/as3525/sansa-clipzip/lcd-clipzip.c | 2 | ||||
-rw-r--r-- | firmware/target/arm/s5l8700/postmortemstub.S | 616 | ||||
-rw-r--r-- | firmware/target/arm/s5l8702/debug-s5l8702.c | 332 | ||||
-rw-r--r-- | firmware/target/arm/s5l8702/debug-target.h | 66 | ||||
-rw-r--r-- | firmware/target/arm/s5l8702/i2c-s5l8702.c | 392 | ||||
-rw-r--r-- | firmware/target/arm/s5l8702/kernel-s5l8702.c | 112 | ||||
-rw-r--r-- | firmware/target/arm/s5l8702/pcm-s5l8702.c | 456 | ||||
-rw-r--r-- | firmware/target/arm/s5l8702/pcm-target.h | 80 | ||||
-rw-r--r-- | firmware/target/arm/s5l8702/system-target.h | 94 | ||||
-rw-r--r-- | firmware/target/arm/s5l8702/timer-s5l8702.c | 188 | ||||
-rw-r--r-- | firmware/target/sh/archos/mascodec-archos.c | 2 |
11 files changed, 1170 insertions, 1170 deletions
diff --git a/firmware/target/arm/as3525/sansa-clipzip/lcd-clipzip.c b/firmware/target/arm/as3525/sansa-clipzip/lcd-clipzip.c index 4650913ce3..2d8d25cf31 100644 --- a/firmware/target/arm/as3525/sansa-clipzip/lcd-clipzip.c +++ b/firmware/target/arm/as3525/sansa-clipzip/lcd-clipzip.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: lcd-clipzip.c 30465 2011-09-06 16:55:52Z bertrik $ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2011 Bertrik Sikken | 10 | * Copyright (C) 2011 Bertrik Sikken |
11 | * | 11 | * |
diff --git a/firmware/target/arm/s5l8700/postmortemstub.S b/firmware/target/arm/s5l8700/postmortemstub.S index 73f192a553..d0874c418b 100644 --- a/firmware/target/arm/s5l8700/postmortemstub.S +++ b/firmware/target/arm/s5l8700/postmortemstub.S | |||
@@ -1,308 +1,308 @@ | |||
1 | .section .text.post_mortem_stub, "ax", %progbits | 1 | .section .text.post_mortem_stub, "ax", %progbits |
2 | .align 4 | 2 | .align 4 |
3 | .global post_mortem_stub | 3 | .global post_mortem_stub |
4 | .type post_mortem_stub, %function | 4 | .type post_mortem_stub, %function |
5 | post_mortem_stub: | 5 | post_mortem_stub: |
6 | MSR CPSR_c, #0xD3 @ Supervisor mode, no IRQs, no FIQs | 6 | MSR CPSR_c, #0xD3 @ Supervisor mode, no IRQs, no FIQs |
7 | MRC p15, 0, R0,c1,c0 | 7 | MRC p15, 0, R0,c1,c0 |
8 | BIC R0, R0, #5 | 8 | BIC R0, R0, #5 |
9 | MCR p15, 0, R0,c1,c0 @ Disable the Protection Unit and DCache | 9 | MCR p15, 0, R0,c1,c0 @ Disable the Protection Unit and DCache |
10 | MOV R13, #0 | 10 | MOV R13, #0 |
11 | pms_flushcache_loop: | 11 | pms_flushcache_loop: |
12 | MCR p15, 0, R13,c7,c14,2 | 12 | MCR p15, 0, R13,c7,c14,2 |
13 | ADD R0, R13, #0x10 | 13 | ADD R0, R13, #0x10 |
14 | MCR p15, 0, R0,c7,c14,2 | 14 | MCR p15, 0, R0,c7,c14,2 |
15 | ADD R0, R0, #0x10 | 15 | ADD R0, R0, #0x10 |
16 | MCR p15, 0, R0,c7,c14,2 | 16 | MCR p15, 0, R0,c7,c14,2 |
17 | ADD R0, R0, #0x10 | 17 | ADD R0, R0, #0x10 |
18 | MCR p15, 0, R0,c7,c14,2 | 18 | MCR p15, 0, R0,c7,c14,2 |
19 | ADDS R13, R13, #0x04000000 | 19 | ADDS R13, R13, #0x04000000 |
20 | BNE pms_flushcache_loop | 20 | BNE pms_flushcache_loop |
21 | MCR p15, 0, R13,c7,c10,4 | 21 | MCR p15, 0, R13,c7,c10,4 |
22 | 22 | ||
23 | LDR R7, pms_00080200 | 23 | LDR R7, pms_00080200 |
24 | ORR R8, R7, #0x8000 | 24 | ORR R8, R7, #0x8000 |
25 | ADR R9, pms_recvbuf | 25 | ADR R9, pms_recvbuf |
26 | LDR R10, pms_20080040 | 26 | LDR R10, pms_20080040 |
27 | MOV R11, #0x38800000 | 27 | MOV R11, #0x38800000 |
28 | MOV R12, #1 | 28 | MOV R12, #1 |
29 | 29 | ||
30 | MOV R2, #0x3C400000 | 30 | MOV R2, #0x3C400000 |
31 | ADD R1, R2, #0x00100000 @ Enable USB clocks | 31 | ADD R1, R2, #0x00100000 @ Enable USB clocks |
32 | LDR R0, [R1,#0x28] | 32 | LDR R0, [R1,#0x28] |
33 | BIC R0, R0, #0x4000 | 33 | BIC R0, R0, #0x4000 |
34 | STR R0, [R1,#0x28] | 34 | STR R0, [R1,#0x28] |
35 | LDR R0, [R1,#0x40] | 35 | LDR R0, [R1,#0x40] |
36 | BIC R0, R0, #0x800 | 36 | BIC R0, R0, #0x800 |
37 | STR R0, [R1,#0x40] | 37 | STR R0, [R1,#0x40] |
38 | LDR R0, pms_20803180 @ Clocking config | 38 | LDR R0, pms_20803180 @ Clocking config |
39 | STR R0, [R1] | 39 | STR R0, [R1] |
40 | MOV R0, #0x280 | 40 | MOV R0, #0x280 |
41 | STR R0, [R1,#0x3C] | 41 | STR R0, [R1,#0x3C] |
42 | MRC p15, 0, R0,c1,c0 | 42 | MRC p15, 0, R0,c1,c0 |
43 | ORR R0, R0, #0xc0000000 | 43 | ORR R0, R0, #0xc0000000 |
44 | MCR p15, 0, R0,c1,c0 @ Asynchronous mode | 44 | MCR p15, 0, R0,c1,c0 @ Asynchronous mode |
45 | 45 | ||
46 | STR R13, [R11,#0xE00] @ PHY clock enable | 46 | STR R13, [R11,#0xE00] @ PHY clock enable |
47 | 47 | ||
48 | MOV R1, #0x800 | 48 | MOV R1, #0x800 |
49 | ORR R0, R2, #2 | 49 | ORR R0, R2, #2 |
50 | STR R0, [R11,#0x804] @ USB2 Gadget: Soft disconnect | 50 | STR R0, [R11,#0x804] @ USB2 Gadget: Soft disconnect |
51 | 51 | ||
52 | STR R13, [R2] @ USB2 PHY: Power on | 52 | STR R13, [R2] @ USB2 PHY: Power on |
53 | STR R12, [R2,#0x08] @ USB2 PHY: Assert Software Reset | 53 | STR R12, [R2,#0x08] @ USB2 PHY: Assert Software Reset |
54 | MOV R0, #0x10000 | 54 | MOV R0, #0x10000 |
55 | pms_wait: | 55 | pms_wait: |
56 | SUBS R0, R0, #1 | 56 | SUBS R0, R0, #1 |
57 | BNE pms_wait | 57 | BNE pms_wait |
58 | STR R13, [R2,#0x08] @ USB2 PHY: Deassert Software Reset | 58 | STR R13, [R2,#0x08] @ USB2 PHY: Deassert Software Reset |
59 | STR R13, [R2,#0x04] @ USB2 PHY: Clock is 48MHz | 59 | STR R13, [R2,#0x04] @ USB2 PHY: Clock is 48MHz |
60 | 60 | ||
61 | STR R12, [R11,#0x10] @ USB2 Gadget: Assert Core Software Reset | 61 | STR R12, [R11,#0x10] @ USB2 Gadget: Assert Core Software Reset |
62 | pms_waitcorereset: | 62 | pms_waitcorereset: |
63 | LDR R0, [R11,#0x10] @ USB2 Gadget: Wait for Core to reset | 63 | LDR R0, [R11,#0x10] @ USB2 Gadget: Wait for Core to reset |
64 | TST R0, #1 | 64 | TST R0, #1 |
65 | BNE pms_waitcorereset | 65 | BNE pms_waitcorereset |
66 | TST R0, #0x80000000 @ USB2 Gadget: Wait for AHB IDLE | 66 | TST R0, #0x80000000 @ USB2 Gadget: Wait for AHB IDLE |
67 | BEQ pms_waitcorereset | 67 | BEQ pms_waitcorereset |
68 | 68 | ||
69 | MOV R0, #0x200 | 69 | MOV R0, #0x200 |
70 | STR R0, [R11,#0x24] @ USB2 Gadget: RX FIFO size: 512 bytes | 70 | STR R0, [R11,#0x24] @ USB2 Gadget: RX FIFO size: 512 bytes |
71 | ORR R0, R0, #0x2000000 | 71 | ORR R0, R0, #0x2000000 |
72 | STR R0, [R11,#0x28] @ USB2 Gadget: Non-periodic TX FIFO size: 512 bytes | 72 | STR R0, [R11,#0x28] @ USB2 Gadget: Non-periodic TX FIFO size: 512 bytes |
73 | MOV R0, #0x26 | 73 | MOV R0, #0x26 |
74 | STR R0, [R11,#0x08] @ USB2 Gadget: DMA Enable, Burst Length: 4, Mask Interrupts | 74 | STR R0, [R11,#0x08] @ USB2 Gadget: DMA Enable, Burst Length: 4, Mask Interrupts |
75 | MOV R0, #0x1400 | 75 | MOV R0, #0x1400 |
76 | ADD R0, R0, #8 | 76 | ADD R0, R0, #8 |
77 | STR R0, [R11,#0x0C] @ USB2 Gadget: PHY IF is 16bit, Turnaround 5 | 77 | STR R0, [R11,#0x0C] @ USB2 Gadget: PHY IF is 16bit, Turnaround 5 |
78 | STR R1, [R11,#0x804] @ USB2 Gadget: Soft reconnect | 78 | STR R1, [R11,#0x804] @ USB2 Gadget: Soft reconnect |
79 | 79 | ||
80 | ADR R14, pms_ctrlbuf | 80 | ADR R14, pms_ctrlbuf |
81 | ORR R5, R8, #0x84000000 | 81 | ORR R5, R8, #0x84000000 |
82 | @ fallthrough | 82 | @ fallthrough |
83 | 83 | ||
84 | pms_mainloop: | 84 | pms_mainloop: |
85 | LDR R3, [R11,#0x14] @ Global USB interrupts | 85 | LDR R3, [R11,#0x14] @ Global USB interrupts |
86 | TST R3, #0x00001000 @ BUS reset | 86 | TST R3, #0x00001000 @ BUS reset |
87 | BEQ pms_noreset | 87 | BEQ pms_noreset |
88 | MOV R0, #0x500 | 88 | MOV R0, #0x500 |
89 | STR R0, [R11,#0x804] | 89 | STR R0, [R11,#0x804] |
90 | MOV R0, #4 | 90 | MOV R0, #4 |
91 | STR R0, [R11,#0x800] @ USB2 Gadget: Device Address 0, STALL on non-zero length status stage | 91 | STR R0, [R11,#0x800] @ USB2 Gadget: Device Address 0, STALL on non-zero length status stage |
92 | MOV R0, #0x8000 | 92 | MOV R0, #0x8000 |
93 | STR R0, [R11,#0x900] @ USB2 Gadget: Endpoint 0 IN Control: ACTIVE | 93 | STR R0, [R11,#0x900] @ USB2 Gadget: Endpoint 0 IN Control: ACTIVE |
94 | STR R10, [R11,#0xB10] @ USB2 Gadget: Endpoint 0 OUT Transfer Size: 64 Bytes, 1 Packet, 1 Setup Packet | 94 | STR R10, [R11,#0xB10] @ USB2 Gadget: Endpoint 0 OUT Transfer Size: 64 Bytes, 1 Packet, 1 Setup Packet |
95 | STR R14, [R11,#0xB14] @ USB2 Gadget: Endpoint 0 OUT DMA Address: pms_ctrlbuf | 95 | STR R14, [R11,#0xB14] @ USB2 Gadget: Endpoint 0 OUT DMA Address: pms_ctrlbuf |
96 | ORR R6, R0, #0x84000000 | 96 | ORR R6, R0, #0x84000000 |
97 | STR R6, [R11,#0xB00] @ USB2 Gadget: Endpoint 0 OUT Control: ENABLE CLEARNAK | 97 | STR R6, [R11,#0xB00] @ USB2 Gadget: Endpoint 0 OUT Control: ENABLE CLEARNAK |
98 | STR R8, [R11,#0x960] @ USB2 Gadget: Endpoint 3 IN Control: ACTIVE BULK, 512 byte packets | 98 | STR R8, [R11,#0x960] @ USB2 Gadget: Endpoint 3 IN Control: ACTIVE BULK, 512 byte packets |
99 | STR R8, [R11,#0xB80] @ USB2 Gadget: Endpoint 4 OUT Control: ACTIVE BULK, 512 byte packets | 99 | STR R8, [R11,#0xB80] @ USB2 Gadget: Endpoint 4 OUT Control: ACTIVE BULK, 512 byte packets |
100 | STR R7, [R11,#0xB90] @ USB2 Gadget: Endpoint 4 OUT Transfer Size: 512 Bytes, 1 Packet | 100 | STR R7, [R11,#0xB90] @ USB2 Gadget: Endpoint 4 OUT Transfer Size: 512 Bytes, 1 Packet |
101 | STR R9, [R11,#0xB94] @ USB2 Gadget: Endpoint 4 OUT DMA Address: pms_recvbuf | 101 | STR R9, [R11,#0xB94] @ USB2 Gadget: Endpoint 4 OUT DMA Address: pms_recvbuf |
102 | ORR R4, R5, #0x10000000 | 102 | ORR R4, R5, #0x10000000 |
103 | STR R4, [R11,#0xB80] @ USB2 Gadget: Endpoint 4 OUT Control: ENABLE CLEARNAK DATA0 | 103 | STR R4, [R11,#0xB80] @ USB2 Gadget: Endpoint 4 OUT Control: ENABLE CLEARNAK DATA0 |
104 | pms_noreset: | 104 | pms_noreset: |
105 | LDR R0, [R11,#0x908] @ Just ACK all IN events... | 105 | LDR R0, [R11,#0x908] @ Just ACK all IN events... |
106 | STR R0, [R11,#0x908] | 106 | STR R0, [R11,#0x908] |
107 | LDR R0, [R11,#0x968] | 107 | LDR R0, [R11,#0x968] |
108 | STR R0, [R11,#0x968] | 108 | STR R0, [R11,#0x968] |
109 | LDR R2, [R11,#0xB08] | 109 | LDR R2, [R11,#0xB08] |
110 | MOVS R2, R2 @ Event on OUT EP0 | 110 | MOVS R2, R2 @ Event on OUT EP0 |
111 | BEQ pms_noep0out | 111 | BEQ pms_noep0out |
112 | TST R2, #8 @ SETUP phase done | 112 | TST R2, #8 @ SETUP phase done |
113 | BEQ pms_controldone | 113 | BEQ pms_controldone |
114 | LDRB R0, [R14,#1] @ Get request type | 114 | LDRB R0, [R14,#1] @ Get request type |
115 | CMP R0, #0 | 115 | CMP R0, #0 |
116 | BEQ pms_GET_STATUS | 116 | BEQ pms_GET_STATUS |
117 | CMP R0, #1 | 117 | CMP R0, #1 |
118 | BEQ pms_CLEAR_FEATURE | 118 | BEQ pms_CLEAR_FEATURE |
119 | CMP R0, #3 | 119 | CMP R0, #3 |
120 | BEQ pms_SET_FEATURE | 120 | BEQ pms_SET_FEATURE |
121 | CMP R0, #5 | 121 | CMP R0, #5 |
122 | BEQ pms_SET_ADDRESS | 122 | BEQ pms_SET_ADDRESS |
123 | CMP R0, #6 | 123 | CMP R0, #6 |
124 | BEQ pms_GET_DESCRIPTOR | 124 | BEQ pms_GET_DESCRIPTOR |
125 | CMP R0, #8 | 125 | CMP R0, #8 |
126 | BEQ pms_GET_CONFIGURATION | 126 | BEQ pms_GET_CONFIGURATION |
127 | CMP R0, #9 | 127 | CMP R0, #9 |
128 | BEQ pms_SET_CONFIGURATION | 128 | BEQ pms_SET_CONFIGURATION |
129 | pms_ctrlstall: | 129 | pms_ctrlstall: |
130 | LDR R0, [R11,#0x900] | 130 | LDR R0, [R11,#0x900] |
131 | ORR R0, R0, #0x00200000 | 131 | ORR R0, R0, #0x00200000 |
132 | STR R0, [R11,#0x900] @ Stall IN EP0 | 132 | STR R0, [R11,#0x900] @ Stall IN EP0 |
133 | LDR R0, [R11,#0xB00] | 133 | LDR R0, [R11,#0xB00] |
134 | ORR R0, R0, #0x00200000 | 134 | ORR R0, R0, #0x00200000 |
135 | STR R0, [R11,#0xB00] @ Stall OUT EP0 | 135 | STR R0, [R11,#0xB00] @ Stall OUT EP0 |
136 | pms_controldone: | 136 | pms_controldone: |
137 | STR R10, [R11,#0xB10] @ OUT EP0: 64 Bytes, 1 Packet, 1 Setup Packet | 137 | STR R10, [R11,#0xB10] @ OUT EP0: 64 Bytes, 1 Packet, 1 Setup Packet |
138 | STR R14, [R11,#0xB14] @ OUT EP0: DMA address | 138 | STR R14, [R11,#0xB14] @ OUT EP0: DMA address |
139 | STR R6, [R11,#0xB00] @ OUT EP0: Enable ClearNAK | 139 | STR R6, [R11,#0xB00] @ OUT EP0: Enable ClearNAK |
140 | pms_noep0out: | 140 | pms_noep0out: |
141 | STR R2, [R11,#0xB08] @ ACK it, whatever it was... | 141 | STR R2, [R11,#0xB08] @ ACK it, whatever it was... |
142 | LDR R2, [R11,#0xB88] | 142 | LDR R2, [R11,#0xB88] |
143 | MOVS R2, R2 @ Event on OUT EP4 | 143 | MOVS R2, R2 @ Event on OUT EP4 |
144 | BEQ pms_noep1out | 144 | BEQ pms_noep1out |
145 | TST R2, #1 @ XFER complete | 145 | TST R2, #1 @ XFER complete |
146 | BEQ pms_datadone | 146 | BEQ pms_datadone |
147 | LDR R0, pms_000001FF | 147 | LDR R0, pms_000001FF |
148 | LDR R1, pms_recvbuf+4 | 148 | LDR R1, pms_recvbuf+4 |
149 | ADD R0, R0, R1 | 149 | ADD R0, R0, R1 |
150 | MOV R0, R0,LSR#9 | 150 | MOV R0, R0,LSR#9 |
151 | ORR R1, R1, R0,LSL#19 @ Number of packets | 151 | ORR R1, R1, R0,LSL#19 @ Number of packets |
152 | LDR R0, pms_recvbuf | 152 | LDR R0, pms_recvbuf |
153 | STR R1, [R11,#0x970] @ EP3 IN: Number of packets, size | 153 | STR R1, [R11,#0x970] @ EP3 IN: Number of packets, size |
154 | STR R0, [R11,#0x974] @ EP3 IN: DMA address | 154 | STR R0, [R11,#0x974] @ EP3 IN: DMA address |
155 | STR R5, [R11,#0x960] @ EP3 IN: Enable ClearNAK | 155 | STR R5, [R11,#0x960] @ EP3 IN: Enable ClearNAK |
156 | pms_datadone: | 156 | pms_datadone: |
157 | STR R7, [R11,#0xB90] @ OUT EP4: 512 Bytes, 1 Packet | 157 | STR R7, [R11,#0xB90] @ OUT EP4: 512 Bytes, 1 Packet |
158 | STR R9, [R11,#0xB94] @ Out EP4: DMA address | 158 | STR R9, [R11,#0xB94] @ Out EP4: DMA address |
159 | STR R5, [R11,#0xB80] @ Out EP4: Enable ClearNAK | 159 | STR R5, [R11,#0xB80] @ Out EP4: Enable ClearNAK |
160 | pms_noep1out: | 160 | pms_noep1out: |
161 | STR R2, [R11,#0xB88] @ ACK it, whatever it was... | 161 | STR R2, [R11,#0xB88] @ ACK it, whatever it was... |
162 | STR R3, [R11,#0x14] @ ACK global ints | 162 | STR R3, [R11,#0x14] @ ACK global ints |
163 | B pms_mainloop | 163 | B pms_mainloop |
164 | 164 | ||
165 | pms_CLEAR_FEATURE: | 165 | pms_CLEAR_FEATURE: |
166 | LDRB R0, [R14] | 166 | LDRB R0, [R14] |
167 | CMP R0, #2 | 167 | CMP R0, #2 |
168 | LDREQ R0, [R14,#2] | 168 | LDREQ R0, [R14,#2] |
169 | BICEQ R0, R0, #0x00800000 | 169 | BICEQ R0, R0, #0x00800000 |
170 | CMPEQ R0, #0x00010000 | 170 | CMPEQ R0, #0x00010000 |
171 | @ fallthrough | 171 | @ fallthrough |
172 | 172 | ||
173 | pms_SET_CONFIGURATION: | 173 | pms_SET_CONFIGURATION: |
174 | ORREQ R0, R8, #0x10000000 | 174 | ORREQ R0, R8, #0x10000000 |
175 | STREQ R0, [R11,#0x960] @ EP3 IN: Set DATA0 PID | 175 | STREQ R0, [R11,#0x960] @ EP3 IN: Set DATA0 PID |
176 | STREQ R4, [R11,#0xB80] @ EP4 OUT: Set DATA0 PID | 176 | STREQ R4, [R11,#0xB80] @ EP4 OUT: Set DATA0 PID |
177 | B pms_SET_FEATURE @ zero-length ACK | 177 | B pms_SET_FEATURE @ zero-length ACK |
178 | 178 | ||
179 | pms_GET_CONFIGURATION: | 179 | pms_GET_CONFIGURATION: |
180 | MOV R1, #1 | 180 | MOV R1, #1 |
181 | STR R1, [R14] | 181 | STR R1, [R14] |
182 | @ fallthrough | 182 | @ fallthrough |
183 | 183 | ||
184 | pms_ctrlsend: | 184 | pms_ctrlsend: |
185 | ORR R0, R1, #0x00080000 @ 1 Packet | 185 | ORR R0, R1, #0x00080000 @ 1 Packet |
186 | STR R0, [R11,#0x910] @ EP0 IN: 1 Packet, Size as in R1 | 186 | STR R0, [R11,#0x910] @ EP0 IN: 1 Packet, Size as in R1 |
187 | STR R14, [R11,#0x914] @ EP0 IN: DMA address | 187 | STR R14, [R11,#0x914] @ EP0 IN: DMA address |
188 | ORR R0, R6, #0x1800 | 188 | ORR R0, R6, #0x1800 |
189 | STR R0, [R11,#0x900] @ EP0 IN: Enable ClearNAK | 189 | STR R0, [R11,#0x900] @ EP0 IN: Enable ClearNAK |
190 | ADR R14, pms_ctrlbuf | 190 | ADR R14, pms_ctrlbuf |
191 | B pms_controldone | 191 | B pms_controldone |
192 | 192 | ||
193 | pms_GET_DESCRIPTOR: | 193 | pms_GET_DESCRIPTOR: |
194 | LDRB R0, [R14,#3] @ Descriptor type | 194 | LDRB R0, [R14,#3] @ Descriptor type |
195 | CMP R0, #1 | 195 | CMP R0, #1 |
196 | ADREQ R14, pms_devicedescriptor | 196 | ADREQ R14, pms_devicedescriptor |
197 | BEQ pms_senddescriptor | 197 | BEQ pms_senddescriptor |
198 | CMP R0, #2 | 198 | CMP R0, #2 |
199 | ADREQ R14, pms_configurationdescriptor | 199 | ADREQ R14, pms_configurationdescriptor |
200 | MOVEQ R1, #0x20 | 200 | MOVEQ R1, #0x20 |
201 | BEQ pms_senddescriptorcustomsize | 201 | BEQ pms_senddescriptorcustomsize |
202 | CMP R0, #3 | 202 | CMP R0, #3 |
203 | BNE pms_ctrlstall | 203 | BNE pms_ctrlstall |
204 | LDRB R0, [R14,#2] @ String descriptor index | 204 | LDRB R0, [R14,#2] @ String descriptor index |
205 | CMP R0, #0 | 205 | CMP R0, #0 |
206 | LDREQ R0, pms_langstringdescriptor | 206 | LDREQ R0, pms_langstringdescriptor |
207 | STREQ R0, [R14] | 207 | STREQ R0, [R14] |
208 | BEQ pms_senddescriptor | 208 | BEQ pms_senddescriptor |
209 | CMP R0, #1 | 209 | CMP R0, #1 |
210 | CMPNE R0, #2 | 210 | CMPNE R0, #2 |
211 | ADREQ R14, pms_devnamestringdescriptor | 211 | ADREQ R14, pms_devnamestringdescriptor |
212 | BNE pms_ctrlstall | 212 | BNE pms_ctrlstall |
213 | @ fallthrough | 213 | @ fallthrough |
214 | 214 | ||
215 | pms_senddescriptor: | 215 | pms_senddescriptor: |
216 | LDRB R1, [R14] @ Descriptor length | 216 | LDRB R1, [R14] @ Descriptor length |
217 | @ fallthrough | 217 | @ fallthrough |
218 | 218 | ||
219 | pms_senddescriptorcustomsize: | 219 | pms_senddescriptorcustomsize: |
220 | LDRH R0, pms_ctrlbuf+6 @ Requested length | 220 | LDRH R0, pms_ctrlbuf+6 @ Requested length |
221 | CMP R0, R1 | 221 | CMP R0, R1 |
222 | MOVLO R1, R0 | 222 | MOVLO R1, R0 |
223 | B pms_ctrlsend | 223 | B pms_ctrlsend |
224 | 224 | ||
225 | pms_SET_ADDRESS: | 225 | pms_SET_ADDRESS: |
226 | LDRH R1, [R14,#2] @ new address | 226 | LDRH R1, [R14,#2] @ new address |
227 | LDR R0, [R11,#0x800] | 227 | LDR R0, [R11,#0x800] |
228 | BIC R0, R0, #0x000007F0 | 228 | BIC R0, R0, #0x000007F0 |
229 | ORR R0, R0, R1,LSL#4 | 229 | ORR R0, R0, R1,LSL#4 |
230 | STR R0, [R11,#0x800] @ set new address | 230 | STR R0, [R11,#0x800] @ set new address |
231 | @ fallthrough | 231 | @ fallthrough |
232 | 232 | ||
233 | pms_SET_FEATURE: | 233 | pms_SET_FEATURE: |
234 | MOV R1, #0 @ zero-length ACK | 234 | MOV R1, #0 @ zero-length ACK |
235 | B pms_ctrlsend | 235 | B pms_ctrlsend |
236 | 236 | ||
237 | pms_20803180: | 237 | pms_20803180: |
238 | .word 0x20803180 | 238 | .word 0x20803180 |
239 | 239 | ||
240 | .ltorg | 240 | .ltorg |
241 | 241 | ||
242 | .align 4 | 242 | .align 4 |
243 | 243 | ||
244 | pms_configurationdescriptor: | 244 | pms_configurationdescriptor: |
245 | .word 0x00200209 | 245 | .word 0x00200209 |
246 | .word 0xC0000101 | 246 | .word 0xC0000101 |
247 | .word 0x00040932 | 247 | .word 0x00040932 |
248 | .word 0xFFFF0200 | 248 | .word 0xFFFF0200 |
249 | .word 0x050700FF | 249 | .word 0x050700FF |
250 | .word 0x02000204 | 250 | .word 0x02000204 |
251 | .word 0x83050701 | 251 | .word 0x83050701 |
252 | .word 0x01020002 | 252 | .word 0x01020002 |
253 | 253 | ||
254 | pms_devicedescriptor: | 254 | pms_devicedescriptor: |
255 | .word 0x02000112 | 255 | .word 0x02000112 |
256 | .word 0x40FFFFFF | 256 | .word 0x40FFFFFF |
257 | .word 0xA112FFFF | 257 | .word 0xA112FFFF |
258 | .word 0x02010001 | 258 | .word 0x02010001 |
259 | .word 0x00010100 | 259 | .word 0x00010100 |
260 | 260 | ||
261 | pms_00080200: | 261 | pms_00080200: |
262 | .word 0x00080200 | 262 | .word 0x00080200 |
263 | 263 | ||
264 | pms_20080040: | 264 | pms_20080040: |
265 | .word 0x20080040 | 265 | .word 0x20080040 |
266 | 266 | ||
267 | pms_000001FF: | 267 | pms_000001FF: |
268 | .word 0x000001FF | 268 | .word 0x000001FF |
269 | 269 | ||
270 | pms_devnamestringdescriptor: | 270 | pms_devnamestringdescriptor: |
271 | .word 0x0052030C | 271 | .word 0x0052030C |
272 | .word 0x00500042 | 272 | .word 0x00500042 |
273 | .word 0x0053004D | 273 | .word 0x0053004D |
274 | 274 | ||
275 | pms_langstringdescriptor: | 275 | pms_langstringdescriptor: |
276 | .word 0x04090304 | 276 | .word 0x04090304 |
277 | 277 | ||
278 | pms_ctrlbuf: | 278 | pms_ctrlbuf: |
279 | .word 0 | 279 | .word 0 |
280 | .word 0 | 280 | .word 0 |
281 | .word 0 | 281 | .word 0 |
282 | .word 0 | 282 | .word 0 |
283 | .word 0 | 283 | .word 0 |
284 | .word 0 | 284 | .word 0 |
285 | .word 0 | 285 | .word 0 |
286 | .word 0 | 286 | .word 0 |
287 | .word 0 | 287 | .word 0 |
288 | .word 0 | 288 | .word 0 |
289 | .word 0 | 289 | .word 0 |
290 | .word 0 | 290 | .word 0 |
291 | .word 0 | 291 | .word 0 |
292 | .word 0 | 292 | .word 0 |
293 | .word 0 | 293 | .word 0 |
294 | .word 0 | 294 | .word 0 |
295 | 295 | ||
296 | pms_recvbuf: | 296 | pms_recvbuf: |
297 | .word 0 | 297 | .word 0 |
298 | .word 0 | 298 | .word 0 |
299 | 299 | ||
300 | pms_GET_STATUS: | 300 | pms_GET_STATUS: |
301 | LDRB R0, [R14] | 301 | LDRB R0, [R14] |
302 | CMP R0, #0x80 | 302 | CMP R0, #0x80 |
303 | STREQ R12, [R14] | 303 | STREQ R12, [R14] |
304 | STRNE R13, [R14] | 304 | STRNE R13, [R14] |
305 | MOV R1, #2 | 305 | MOV R1, #2 |
306 | B pms_ctrlsend | 306 | B pms_ctrlsend |
307 | 307 | ||
308 | .size post_mortem_stub, .-post_mortem_stub | 308 | .size post_mortem_stub, .-post_mortem_stub |
diff --git a/firmware/target/arm/s5l8702/debug-s5l8702.c b/firmware/target/arm/s5l8702/debug-s5l8702.c index 5001d61f70..f49595aa00 100644 --- a/firmware/target/arm/s5l8702/debug-s5l8702.c +++ b/firmware/target/arm/s5l8702/debug-s5l8702.c | |||
@@ -1,166 +1,166 @@ | |||
1 | /*************************************************************************** | 1 | /*************************************************************************** |
2 | * __________ __ ___. | 2 | * __________ __ ___. |
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | 3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ |
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | 4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / |
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: debug-s5l8700.c 28719 2010-12-01 18:35:01Z Buschel $ | 8 | * $Id: debug-s5l8700.c 28719 2010-12-01 18:35:01Z Buschel $ |
9 | * | 9 | * |
10 | * Copyright © 2008 Rafaël Carré | 10 | * Copyright © 2008 Rafaël Carré |
11 | * | 11 | * |
12 | * This program is free software; you can redistribute it and/or | 12 | * This program is free software; you can redistribute it and/or |
13 | * modify it under the terms of the GNU General Public License | 13 | * modify it under the terms of the GNU General Public License |
14 | * as published by the Free Software Foundation; either version 2 | 14 | * as published by the Free Software Foundation; either version 2 |
15 | * of the License, or (at your option) any later version. | 15 | * of the License, or (at your option) any later version. |
16 | * | 16 | * |
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | 17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY |
18 | * KIND, either express or implied. | 18 | * KIND, either express or implied. |
19 | * | 19 | * |
20 | ****************************************************************************/ | 20 | ****************************************************************************/ |
21 | 21 | ||
22 | #include <stdbool.h> | 22 | #include <stdbool.h> |
23 | #include "config.h" | 23 | #include "config.h" |
24 | #include "kernel.h" | 24 | #include "kernel.h" |
25 | #include "debug-target.h" | 25 | #include "debug-target.h" |
26 | #include "button.h" | 26 | #include "button.h" |
27 | #include "lcd.h" | 27 | #include "lcd.h" |
28 | #include "font.h" | 28 | #include "font.h" |
29 | #include "storage.h" | 29 | #include "storage.h" |
30 | #include "power.h" | 30 | #include "power.h" |
31 | #include "pmu-target.h" | 31 | #include "pmu-target.h" |
32 | #include "pcm-target.h" | 32 | #include "pcm-target.h" |
33 | 33 | ||
34 | /* Skeleton for adding target specific debug info to the debug menu | 34 | /* Skeleton for adding target specific debug info to the debug menu |
35 | */ | 35 | */ |
36 | 36 | ||
37 | #define _DEBUG_PRINTF(a, varargs...) lcd_putsf(0, line++, (a), ##varargs); | 37 | #define _DEBUG_PRINTF(a, varargs...) lcd_putsf(0, line++, (a), ##varargs); |
38 | 38 | ||
39 | extern int lcd_type; | 39 | extern int lcd_type; |
40 | bool dbg_hw_info(void) | 40 | bool dbg_hw_info(void) |
41 | { | 41 | { |
42 | int line; | 42 | int line; |
43 | int i; | 43 | int i; |
44 | unsigned int state = 0; | 44 | unsigned int state = 0; |
45 | const unsigned int max_states=3; | 45 | const unsigned int max_states=3; |
46 | 46 | ||
47 | lcd_clear_display(); | 47 | lcd_clear_display(); |
48 | lcd_setfont(FONT_SYSFIXED); | 48 | lcd_setfont(FONT_SYSFIXED); |
49 | 49 | ||
50 | state=0; | 50 | state=0; |
51 | while(1) | 51 | while(1) |
52 | { | 52 | { |
53 | lcd_clear_display(); | 53 | lcd_clear_display(); |
54 | line = 0; | 54 | line = 0; |
55 | 55 | ||
56 | if(state == 0) | 56 | if(state == 0) |
57 | { | 57 | { |
58 | _DEBUG_PRINTF("CPU:"); | 58 | _DEBUG_PRINTF("CPU:"); |
59 | _DEBUG_PRINTF("current_tick: %d", (unsigned int)current_tick); | 59 | _DEBUG_PRINTF("current_tick: %d", (unsigned int)current_tick); |
60 | line++; | 60 | line++; |
61 | 61 | ||
62 | _DEBUG_PRINTF("LCD type: %d", lcd_type); | 62 | _DEBUG_PRINTF("LCD type: %d", lcd_type); |
63 | line++; | 63 | line++; |
64 | } | 64 | } |
65 | else if(state==1) | 65 | else if(state==1) |
66 | { | 66 | { |
67 | _DEBUG_PRINTF("PMU:"); | 67 | _DEBUG_PRINTF("PMU:"); |
68 | for(i=0;i<7;i++) | 68 | for(i=0;i<7;i++) |
69 | { | 69 | { |
70 | char *device[] = {"(unknown)", | 70 | char *device[] = {"(unknown)", |
71 | "(unknown)", | 71 | "(unknown)", |
72 | "(unknown)", | 72 | "(unknown)", |
73 | "(unknown)", | 73 | "(unknown)", |
74 | "(unknown)", | 74 | "(unknown)", |
75 | "(unknown)", | 75 | "(unknown)", |
76 | "(unknown)"}; | 76 | "(unknown)"}; |
77 | _DEBUG_PRINTF("ldo%d %s: %dmV %s",i, | 77 | _DEBUG_PRINTF("ldo%d %s: %dmV %s",i, |
78 | pmu_read(0x2e + (i << 1))?" on":"off", | 78 | pmu_read(0x2e + (i << 1))?" on":"off", |
79 | 900 + pmu_read(0x2d + (i << 1))*100, | 79 | 900 + pmu_read(0x2d + (i << 1))*100, |
80 | device[i]); | 80 | device[i]); |
81 | } | 81 | } |
82 | _DEBUG_PRINTF("cpu voltage: %dmV",625 + pmu_read(0x1e)*25); | 82 | _DEBUG_PRINTF("cpu voltage: %dmV",625 + pmu_read(0x1e)*25); |
83 | _DEBUG_PRINTF("memory voltage: %dmV",625 + pmu_read(0x22)*25); | 83 | _DEBUG_PRINTF("memory voltage: %dmV",625 + pmu_read(0x22)*25); |
84 | line++; | 84 | line++; |
85 | _DEBUG_PRINTF("charging: %s", charging_state() ? "true" : "false"); | 85 | _DEBUG_PRINTF("charging: %s", charging_state() ? "true" : "false"); |
86 | _DEBUG_PRINTF("backlight: %s", pmu_read(0x29) ? "on" : "off"); | 86 | _DEBUG_PRINTF("backlight: %s", pmu_read(0x29) ? "on" : "off"); |
87 | _DEBUG_PRINTF("brightness value: %d", pmu_read(0x28)); | 87 | _DEBUG_PRINTF("brightness value: %d", pmu_read(0x28)); |
88 | } | 88 | } |
89 | else if(state==2) | 89 | else if(state==2) |
90 | { | 90 | { |
91 | _DEBUG_PRINTF("Audio DMA:"); | 91 | _DEBUG_PRINTF("Audio DMA:"); |
92 | _DEBUG_PRINTF(">%08X %08X %08X %08X %08X", DMAC0C0CONFIG, DMAC0C0SRCADDR, | 92 | _DEBUG_PRINTF(">%08X %08X %08X %08X %08X", DMAC0C0CONFIG, DMAC0C0SRCADDR, |
93 | DMAC0C0DESTADDR, DMAC0C0NEXTLLI, DMAC0C0CONTROL); | 93 | DMAC0C0DESTADDR, DMAC0C0NEXTLLI, DMAC0C0CONTROL); |
94 | for(i = 0; i < PCM_LLICOUNT; i++) | 94 | for(i = 0; i < PCM_LLICOUNT; i++) |
95 | _DEBUG_PRINTF("%08X: %08X %08X %08X %08X", &pcm_lli[i], pcm_lli[i].srcaddr, | 95 | _DEBUG_PRINTF("%08X: %08X %08X %08X %08X", &pcm_lli[i], pcm_lli[i].srcaddr, |
96 | pcm_lli[i].dstaddr, pcm_lli[i].nextlli, pcm_lli[i].control); | 96 | pcm_lli[i].dstaddr, pcm_lli[i].nextlli, pcm_lli[i].control); |
97 | _DEBUG_PRINTF("chunk: %08X %08X", pcm_chunksize, pcm_remaining); | 97 | _DEBUG_PRINTF("chunk: %08X %08X", pcm_chunksize, pcm_remaining); |
98 | } | 98 | } |
99 | else | 99 | else |
100 | { | 100 | { |
101 | state=0; | 101 | state=0; |
102 | } | 102 | } |
103 | 103 | ||
104 | 104 | ||
105 | lcd_update(); | 105 | lcd_update(); |
106 | switch(button_get_w_tmo(HZ/20)) | 106 | switch(button_get_w_tmo(HZ/20)) |
107 | { | 107 | { |
108 | case BUTTON_SCROLL_BACK: | 108 | case BUTTON_SCROLL_BACK: |
109 | if(state!=0) state--; | 109 | if(state!=0) state--; |
110 | break; | 110 | break; |
111 | 111 | ||
112 | case BUTTON_SCROLL_FWD: | 112 | case BUTTON_SCROLL_FWD: |
113 | if(state!=max_states-1) | 113 | if(state!=max_states-1) |
114 | { | 114 | { |
115 | state++; | 115 | state++; |
116 | } | 116 | } |
117 | break; | 117 | break; |
118 | 118 | ||
119 | case DEBUG_CANCEL: | 119 | case DEBUG_CANCEL: |
120 | case BUTTON_REL: | 120 | case BUTTON_REL: |
121 | lcd_setfont(FONT_UI); | 121 | lcd_setfont(FONT_UI); |
122 | return false; | 122 | return false; |
123 | } | 123 | } |
124 | } | 124 | } |
125 | 125 | ||
126 | lcd_setfont(FONT_UI); | 126 | lcd_setfont(FONT_UI); |
127 | return false; | 127 | return false; |
128 | } | 128 | } |
129 | 129 | ||
130 | bool dbg_ports(void) | 130 | bool dbg_ports(void) |
131 | { | 131 | { |
132 | int line; | 132 | int line; |
133 | 133 | ||
134 | lcd_setfont(FONT_SYSFIXED); | 134 | lcd_setfont(FONT_SYSFIXED); |
135 | 135 | ||
136 | while(1) | 136 | while(1) |
137 | { | 137 | { |
138 | lcd_clear_display(); | 138 | lcd_clear_display(); |
139 | line = 0; | 139 | line = 0; |
140 | 140 | ||
141 | _DEBUG_PRINTF("GPIO 0: %08x",(unsigned int)PDAT(0)); | 141 | _DEBUG_PRINTF("GPIO 0: %08x",(unsigned int)PDAT(0)); |
142 | _DEBUG_PRINTF("GPIO 1: %08x",(unsigned int)PDAT(1)); | 142 | _DEBUG_PRINTF("GPIO 1: %08x",(unsigned int)PDAT(1)); |
143 | _DEBUG_PRINTF("GPIO 2: %08x",(unsigned int)PDAT(2)); | 143 | _DEBUG_PRINTF("GPIO 2: %08x",(unsigned int)PDAT(2)); |
144 | _DEBUG_PRINTF("GPIO 3: %08x",(unsigned int)PDAT(3)); | 144 | _DEBUG_PRINTF("GPIO 3: %08x",(unsigned int)PDAT(3)); |
145 | _DEBUG_PRINTF("GPIO 4: %08x",(unsigned int)PDAT(4)); | 145 | _DEBUG_PRINTF("GPIO 4: %08x",(unsigned int)PDAT(4)); |
146 | _DEBUG_PRINTF("GPIO 5: %08x",(unsigned int)PDAT(5)); | 146 | _DEBUG_PRINTF("GPIO 5: %08x",(unsigned int)PDAT(5)); |
147 | _DEBUG_PRINTF("GPIO 6: %08x",(unsigned int)PDAT(6)); | 147 | _DEBUG_PRINTF("GPIO 6: %08x",(unsigned int)PDAT(6)); |
148 | _DEBUG_PRINTF("GPIO 7: %08x",(unsigned int)PDAT(7)); | 148 | _DEBUG_PRINTF("GPIO 7: %08x",(unsigned int)PDAT(7)); |
149 | _DEBUG_PRINTF("GPIO 8: %08x",(unsigned int)PDAT(8)); | 149 | _DEBUG_PRINTF("GPIO 8: %08x",(unsigned int)PDAT(8)); |
150 | _DEBUG_PRINTF("GPIO 9: %08x",(unsigned int)PDAT(9)); | 150 | _DEBUG_PRINTF("GPIO 9: %08x",(unsigned int)PDAT(9)); |
151 | _DEBUG_PRINTF("GPIO 10: %08x",(unsigned int)PDAT(10)); | 151 | _DEBUG_PRINTF("GPIO 10: %08x",(unsigned int)PDAT(10)); |
152 | _DEBUG_PRINTF("GPIO 11: %08x",(unsigned int)PDAT(11)); | 152 | _DEBUG_PRINTF("GPIO 11: %08x",(unsigned int)PDAT(11)); |
153 | _DEBUG_PRINTF("GPIO 12: %08x",(unsigned int)PDAT(12)); | 153 | _DEBUG_PRINTF("GPIO 12: %08x",(unsigned int)PDAT(12)); |
154 | _DEBUG_PRINTF("GPIO 13: %08x",(unsigned int)PDAT(13)); | 154 | _DEBUG_PRINTF("GPIO 13: %08x",(unsigned int)PDAT(13)); |
155 | _DEBUG_PRINTF("GPIO 14: %08x",(unsigned int)PDAT(14)); | 155 | _DEBUG_PRINTF("GPIO 14: %08x",(unsigned int)PDAT(14)); |
156 | _DEBUG_PRINTF("GPIO 15: %08x",(unsigned int)PDAT(15)); | 156 | _DEBUG_PRINTF("GPIO 15: %08x",(unsigned int)PDAT(15)); |
157 | _DEBUG_PRINTF("USEC : %08x",(unsigned int)USEC_TIMER); | 157 | _DEBUG_PRINTF("USEC : %08x",(unsigned int)USEC_TIMER); |
158 | 158 | ||
159 | lcd_update(); | 159 | lcd_update(); |
160 | if (button_get_w_tmo(HZ/10) == (DEBUG_CANCEL|BUTTON_REL)) | 160 | if (button_get_w_tmo(HZ/10) == (DEBUG_CANCEL|BUTTON_REL)) |
161 | break; | 161 | break; |
162 | } | 162 | } |
163 | lcd_setfont(FONT_UI); | 163 | lcd_setfont(FONT_UI); |
164 | return false; | 164 | return false; |
165 | } | 165 | } |
166 | 166 | ||
diff --git a/firmware/target/arm/s5l8702/debug-target.h b/firmware/target/arm/s5l8702/debug-target.h index 55ea497f00..a493c0e3dd 100644 --- a/firmware/target/arm/s5l8702/debug-target.h +++ b/firmware/target/arm/s5l8702/debug-target.h | |||
@@ -1,33 +1,33 @@ | |||
1 | /*************************************************************************** | 1 | /*************************************************************************** |
2 | * __________ __ ___. | 2 | * __________ __ ___. |
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | 3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ |
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | 4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / |
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: debug-target.h 28522 2010-11-06 14:24:25Z wodz $ | 8 | * $Id: debug-target.h 28522 2010-11-06 14:24:25Z wodz $ |
9 | * | 9 | * |
10 | * Copyright (C) 2007 by Karl Kurbjun | 10 | * Copyright (C) 2007 by Karl Kurbjun |
11 | * | 11 | * |
12 | * This program is free software; you can redistribute it and/or | 12 | * This program is free software; you can redistribute it and/or |
13 | * modify it under the terms of the GNU General Public License | 13 | * modify it under the terms of the GNU General Public License |
14 | * as published by the Free Software Foundation; either version 2 | 14 | * as published by the Free Software Foundation; either version 2 |
15 | * of the License, or (at your option) any later version. | 15 | * of the License, or (at your option) any later version. |
16 | * | 16 | * |
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | 17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY |
18 | * KIND, either express or implied. | 18 | * KIND, either express or implied. |
19 | * | 19 | * |
20 | ****************************************************************************/ | 20 | ****************************************************************************/ |
21 | 21 | ||
22 | #ifndef _DEBUG_TARGET_H_ | 22 | #ifndef _DEBUG_TARGET_H_ |
23 | #define _DEBUG_TARGET_H_ | 23 | #define _DEBUG_TARGET_H_ |
24 | 24 | ||
25 | #include <stdbool.h> | 25 | #include <stdbool.h> |
26 | 26 | ||
27 | #define DEBUG_CANCEL BUTTON_MENU | 27 | #define DEBUG_CANCEL BUTTON_MENU |
28 | 28 | ||
29 | bool dbg_hw_info(void); | 29 | bool dbg_hw_info(void); |
30 | bool dbg_ports(void); | 30 | bool dbg_ports(void); |
31 | 31 | ||
32 | #endif /* _DEBUG_TARGET_H_ */ | 32 | #endif /* _DEBUG_TARGET_H_ */ |
33 | 33 | ||
diff --git a/firmware/target/arm/s5l8702/i2c-s5l8702.c b/firmware/target/arm/s5l8702/i2c-s5l8702.c index 294e5b58ce..4d0e4188ab 100644 --- a/firmware/target/arm/s5l8702/i2c-s5l8702.c +++ b/firmware/target/arm/s5l8702/i2c-s5l8702.c | |||
@@ -1,196 +1,196 @@ | |||
1 | /*************************************************************************** | 1 | /*************************************************************************** |
2 | * __________ __ ___. | 2 | * __________ __ ___. |
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | 3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ |
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | 4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / |
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: i2c-s5l8700.c 28589 2010-11-14 15:19:30Z theseven $ | 8 | * $Id: i2c-s5l8700.c 28589 2010-11-14 15:19:30Z theseven $ |
9 | * | 9 | * |
10 | * Copyright (C) 2009 by Bertrik Sikken | 10 | * Copyright (C) 2009 by Bertrik Sikken |
11 | * | 11 | * |
12 | * This program is free software; you can redistribute it and/or | 12 | * This program is free software; you can redistribute it and/or |
13 | * modify it under the terms of the GNU General Public License | 13 | * modify it under the terms of the GNU General Public License |
14 | * as published by the Free Software Foundation; either version 2 | 14 | * as published by the Free Software Foundation; either version 2 |
15 | * of the License, or (at your option) any later version. | 15 | * of the License, or (at your option) any later version. |
16 | * | 16 | * |
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | 17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY |
18 | * KIND, either express or implied. | 18 | * KIND, either express or implied. |
19 | * | 19 | * |
20 | ****************************************************************************/ | 20 | ****************************************************************************/ |
21 | 21 | ||
22 | #include "config.h" | 22 | #include "config.h" |
23 | #include "system.h" | 23 | #include "system.h" |
24 | #include "kernel.h" | 24 | #include "kernel.h" |
25 | #include "i2c-s5l8702.h" | 25 | #include "i2c-s5l8702.h" |
26 | 26 | ||
27 | /* Driver for the s5l8700 built-in I2C controller in master mode | 27 | /* Driver for the s5l8700 built-in I2C controller in master mode |
28 | 28 | ||
29 | Both the i2c_read and i2c_write function take the following arguments: | 29 | Both the i2c_read and i2c_write function take the following arguments: |
30 | * slave, the address of the i2c slave device to read from / write to | 30 | * slave, the address of the i2c slave device to read from / write to |
31 | * address, optional sub-address in the i2c slave (unused if -1) | 31 | * address, optional sub-address in the i2c slave (unused if -1) |
32 | * len, number of bytes to be transfered | 32 | * len, number of bytes to be transfered |
33 | * data, pointer to data to be transfered | 33 | * data, pointer to data to be transfered |
34 | A return value < 0 indicates an error. | 34 | A return value < 0 indicates an error. |
35 | 35 | ||
36 | Note: | 36 | Note: |
37 | * blocks the calling thread for the entire duraton of the i2c transfer but | 37 | * blocks the calling thread for the entire duraton of the i2c transfer but |
38 | uses wakeup_wait/wakeup_signal to allow other threads to run. | 38 | uses wakeup_wait/wakeup_signal to allow other threads to run. |
39 | * ACK from slave is not checked, so functions never return an error | 39 | * ACK from slave is not checked, so functions never return an error |
40 | */ | 40 | */ |
41 | 41 | ||
42 | static struct mutex i2c_mtx[2]; | 42 | static struct mutex i2c_mtx[2]; |
43 | 43 | ||
44 | static void i2c_on(int bus) | 44 | static void i2c_on(int bus) |
45 | { | 45 | { |
46 | /* enable I2C clock */ | 46 | /* enable I2C clock */ |
47 | PWRCON(1) &= ~(1 << 4); | 47 | PWRCON(1) &= ~(1 << 4); |
48 | 48 | ||
49 | IICCON(bus) = (1 << 7) | /* ACK_GEN */ | 49 | IICCON(bus) = (1 << 7) | /* ACK_GEN */ |
50 | (0 << 6) | /* CLKSEL = PCLK/16 */ | 50 | (0 << 6) | /* CLKSEL = PCLK/16 */ |
51 | (1 << 5) | /* INT_EN */ | 51 | (1 << 5) | /* INT_EN */ |
52 | (1 << 4) | /* IRQ clear */ | 52 | (1 << 4) | /* IRQ clear */ |
53 | (7 << 0); /* CK_REG */ | 53 | (7 << 0); /* CK_REG */ |
54 | 54 | ||
55 | /* serial output on */ | 55 | /* serial output on */ |
56 | IICSTAT(bus) = (1 << 4); | 56 | IICSTAT(bus) = (1 << 4); |
57 | } | 57 | } |
58 | 58 | ||
59 | static void i2c_off(int bus) | 59 | static void i2c_off(int bus) |
60 | { | 60 | { |
61 | /* serial output off */ | 61 | /* serial output off */ |
62 | IICSTAT(bus) = 0; | 62 | IICSTAT(bus) = 0; |
63 | 63 | ||
64 | /* disable I2C clock */ | 64 | /* disable I2C clock */ |
65 | PWRCON(1) |= (1 << 4); | 65 | PWRCON(1) |= (1 << 4); |
66 | } | 66 | } |
67 | 67 | ||
68 | void i2c_init() | 68 | void i2c_init() |
69 | { | 69 | { |
70 | mutex_init(&i2c_mtx[0]); | 70 | mutex_init(&i2c_mtx[0]); |
71 | mutex_init(&i2c_mtx[1]); | 71 | mutex_init(&i2c_mtx[1]); |
72 | } | 72 | } |
73 | 73 | ||
74 | int i2c_write(int bus, unsigned char slave, int address, int len, const unsigned char *data) | 74 | int i2c_write(int bus, unsigned char slave, int address, int len, const unsigned char *data) |
75 | { | 75 | { |
76 | mutex_lock(&i2c_mtx[bus]); | 76 | mutex_lock(&i2c_mtx[bus]); |
77 | i2c_on(bus); | 77 | i2c_on(bus); |
78 | long timeout = current_tick + HZ / 50; | 78 | long timeout = current_tick + HZ / 50; |
79 | 79 | ||
80 | /* START */ | 80 | /* START */ |
81 | IICDS(bus) = slave & ~1; | 81 | IICDS(bus) = slave & ~1; |
82 | IICSTAT(bus) = 0xF0; | 82 | IICSTAT(bus) = 0xF0; |
83 | IICCON(bus) = 0xB3; | 83 | IICCON(bus) = 0xB3; |
84 | while ((IICCON(bus) & 0x10) == 0) | 84 | while ((IICCON(bus) & 0x10) == 0) |
85 | if (TIME_AFTER(current_tick, timeout)) | 85 | if (TIME_AFTER(current_tick, timeout)) |
86 | { | 86 | { |
87 | mutex_unlock(&i2c_mtx[bus]); | 87 | mutex_unlock(&i2c_mtx[bus]); |
88 | return 1; | 88 | return 1; |
89 | } | 89 | } |
90 | 90 | ||
91 | 91 | ||
92 | if (address >= 0) { | 92 | if (address >= 0) { |
93 | /* write address */ | 93 | /* write address */ |
94 | IICDS(bus) = address; | 94 | IICDS(bus) = address; |
95 | IICCON(bus) = 0xB3; | 95 | IICCON(bus) = 0xB3; |
96 | while ((IICCON(bus) & 0x10) == 0) | 96 | while ((IICCON(bus) & 0x10) == 0) |
97 | if (TIME_AFTER(current_tick, timeout)) | 97 | if (TIME_AFTER(current_tick, timeout)) |
98 | { | 98 | { |
99 | mutex_unlock(&i2c_mtx[bus]); | 99 | mutex_unlock(&i2c_mtx[bus]); |
100 | return 2; | 100 | return 2; |
101 | } | 101 | } |
102 | } | 102 | } |
103 | 103 | ||
104 | /* write data */ | 104 | /* write data */ |
105 | while (len--) { | 105 | while (len--) { |
106 | IICDS(bus) = *data++; | 106 | IICDS(bus) = *data++; |
107 | IICCON(bus) = 0xB3; | 107 | IICCON(bus) = 0xB3; |
108 | while ((IICCON(bus) & 0x10) == 0) | 108 | while ((IICCON(bus) & 0x10) == 0) |
109 | if (TIME_AFTER(current_tick, timeout)) | 109 | if (TIME_AFTER(current_tick, timeout)) |
110 | { | 110 | { |
111 | mutex_unlock(&i2c_mtx[bus]); | 111 | mutex_unlock(&i2c_mtx[bus]); |
112 | return 4; | 112 | return 4; |
113 | } | 113 | } |
114 | } | 114 | } |
115 | 115 | ||
116 | /* STOP */ | 116 | /* STOP */ |
117 | IICSTAT(bus) = 0xD0; | 117 | IICSTAT(bus) = 0xD0; |
118 | IICCON(bus) = 0xB3; | 118 | IICCON(bus) = 0xB3; |
119 | while ((IICSTAT(bus) & (1 << 5)) != 0) | 119 | while ((IICSTAT(bus) & (1 << 5)) != 0) |
120 | if (TIME_AFTER(current_tick, timeout)) | 120 | if (TIME_AFTER(current_tick, timeout)) |
121 | { | 121 | { |
122 | mutex_unlock(&i2c_mtx[bus]); | 122 | mutex_unlock(&i2c_mtx[bus]); |
123 | return 5; | 123 | return 5; |
124 | } | 124 | } |
125 | 125 | ||
126 | i2c_off(bus); | 126 | i2c_off(bus); |
127 | mutex_unlock(&i2c_mtx[bus]); | 127 | mutex_unlock(&i2c_mtx[bus]); |
128 | return 0; | 128 | return 0; |
129 | } | 129 | } |
130 | 130 | ||
131 | int i2c_read(int bus, unsigned char slave, int address, int len, unsigned char *data) | 131 | int i2c_read(int bus, unsigned char slave, int address, int len, unsigned char *data) |
132 | { | 132 | { |
133 | mutex_lock(&i2c_mtx[bus]); | 133 | mutex_lock(&i2c_mtx[bus]); |
134 | i2c_on(bus); | 134 | i2c_on(bus); |
135 | long timeout = current_tick + HZ / 50; | 135 | long timeout = current_tick + HZ / 50; |
136 | 136 | ||
137 | if (address >= 0) { | 137 | if (address >= 0) { |
138 | /* START */ | 138 | /* START */ |
139 | IICDS(bus) = slave & ~1; | 139 | IICDS(bus) = slave & ~1; |
140 | IICSTAT(bus) = 0xF0; | 140 | IICSTAT(bus) = 0xF0; |
141 | IICCON(bus) = 0xB3; | 141 | IICCON(bus) = 0xB3; |
142 | while ((IICCON(bus) & 0x10) == 0) | 142 | while ((IICCON(bus) & 0x10) == 0) |
143 | if (TIME_AFTER(current_tick, timeout)) | 143 | if (TIME_AFTER(current_tick, timeout)) |
144 | { | 144 | { |
145 | mutex_unlock(&i2c_mtx[bus]); | 145 | mutex_unlock(&i2c_mtx[bus]); |
146 | return 1; | 146 | return 1; |
147 | } | 147 | } |
148 | 148 | ||
149 | /* write address */ | 149 | /* write address */ |
150 | IICDS(bus) = address; | 150 | IICDS(bus) = address; |
151 | IICCON(bus) = 0xB3; | 151 | IICCON(bus) = 0xB3; |
152 | while ((IICCON(bus) & 0x10) == 0) | 152 | while ((IICCON(bus) & 0x10) == 0) |
153 | if (TIME_AFTER(current_tick, timeout)) | 153 | if (TIME_AFTER(current_tick, timeout)) |
154 | { | 154 | { |
155 | mutex_unlock(&i2c_mtx[bus]); | 155 | mutex_unlock(&i2c_mtx[bus]); |
156 | return 2; | 156 | return 2; |
157 | } | 157 | } |
158 | } | 158 | } |
159 | 159 | ||
160 | /* (repeated) START */ | 160 | /* (repeated) START */ |
161 | IICDS(bus) = slave | 1; | 161 | IICDS(bus) = slave | 1; |
162 | IICSTAT(bus) = 0xB0; | 162 | IICSTAT(bus) = 0xB0; |
163 | IICCON(bus) = 0xB3; | 163 | IICCON(bus) = 0xB3; |
164 | while ((IICCON(bus) & 0x10) == 0) | 164 | while ((IICCON(bus) & 0x10) == 0) |
165 | if (TIME_AFTER(current_tick, timeout)) | 165 | if (TIME_AFTER(current_tick, timeout)) |
166 | { | 166 | { |
167 | mutex_unlock(&i2c_mtx[bus]); | 167 | mutex_unlock(&i2c_mtx[bus]); |
168 | return 3; | 168 | return 3; |
169 | } | 169 | } |
170 | 170 | ||
171 | while (len--) { | 171 | while (len--) { |
172 | IICCON(bus) = (len == 0) ? 0x33 : 0xB3; /* NAK or ACK */ | 172 | IICCON(bus) = (len == 0) ? 0x33 : 0xB3; /* NAK or ACK */ |
173 | while ((IICCON(bus) & 0x10) == 0) | 173 | while ((IICCON(bus) & 0x10) == 0) |
174 | if (TIME_AFTER(current_tick, timeout)) | 174 | if (TIME_AFTER(current_tick, timeout)) |
175 | { | 175 | { |
176 | mutex_unlock(&i2c_mtx[bus]); | 176 | mutex_unlock(&i2c_mtx[bus]); |
177 | return 4; | 177 | return 4; |
178 | } | 178 | } |
179 | *data++ = IICDS(bus); | 179 | *data++ = IICDS(bus); |
180 | } | 180 | } |
181 | 181 | ||
182 | /* STOP */ | 182 | /* STOP */ |
183 | IICSTAT(bus) = 0x90; | 183 | IICSTAT(bus) = 0x90; |
184 | IICCON(bus) = 0xB3; | 184 | IICCON(bus) = 0xB3; |
185 | while ((IICSTAT(bus) & (1 << 5)) != 0) | 185 | while ((IICSTAT(bus) & (1 << 5)) != 0) |
186 | if (TIME_AFTER(current_tick, timeout)) | 186 | if (TIME_AFTER(current_tick, timeout)) |
187 | { | 187 | { |
188 | mutex_unlock(&i2c_mtx[bus]); | 188 | mutex_unlock(&i2c_mtx[bus]); |
189 | return 5; | 189 | return 5; |
190 | } | 190 | } |
191 | 191 | ||
192 | i2c_off(bus); | 192 | i2c_off(bus); |
193 | mutex_unlock(&i2c_mtx[bus]); | 193 | mutex_unlock(&i2c_mtx[bus]); |
194 | return 0; | 194 | return 0; |
195 | } | 195 | } |
196 | 196 | ||
diff --git a/firmware/target/arm/s5l8702/kernel-s5l8702.c b/firmware/target/arm/s5l8702/kernel-s5l8702.c index 7c5a697043..af54e4dca4 100644 --- a/firmware/target/arm/s5l8702/kernel-s5l8702.c +++ b/firmware/target/arm/s5l8702/kernel-s5l8702.c | |||
@@ -1,56 +1,56 @@ | |||
1 | /*************************************************************************** | 1 | /*************************************************************************** |
2 | * __________ __ ___. | 2 | * __________ __ ___. |
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | 3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ |
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | 4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / |
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: kernel-s5l8700.c 28795 2010-12-11 17:52:52Z Buschel $ | 8 | * $Id: kernel-s5l8700.c 28795 2010-12-11 17:52:52Z Buschel $ |
9 | * | 9 | * |
10 | * Copyright © 2009 Bertrik Sikken | 10 | * Copyright © 2009 Bertrik Sikken |
11 | * | 11 | * |
12 | * This program is free software; you can redistribute it and/or | 12 | * This program is free software; you can redistribute it and/or |
13 | * modify it under the terms of the GNU General Public License | 13 | * modify it under the terms of the GNU General Public License |
14 | * as published by the Free Software Foundation; either version 2 | 14 | * as published by the Free Software Foundation; either version 2 |
15 | * of the License, or (at your option) any later version. | 15 | * of the License, or (at your option) any later version. |
16 | * | 16 | * |
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | 17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY |
18 | * KIND, either express or implied. | 18 | * KIND, either express or implied. |
19 | * | 19 | * |
20 | ****************************************************************************/ | 20 | ****************************************************************************/ |
21 | #include "config.h" | 21 | #include "config.h" |
22 | #include "system.h" | 22 | #include "system.h" |
23 | #include "kernel.h" | 23 | #include "kernel.h" |
24 | 24 | ||
25 | /* S5L8702 driver for the kernel timer | 25 | /* S5L8702 driver for the kernel timer |
26 | 26 | ||
27 | Timer B is configured as a 10 kHz timer | 27 | Timer B is configured as a 10 kHz timer |
28 | */ | 28 | */ |
29 | 29 | ||
30 | void INT_TIMERB(void) | 30 | void INT_TIMERB(void) |
31 | { | 31 | { |
32 | /* clear interrupt */ | 32 | /* clear interrupt */ |
33 | TBCON = TBCON; | 33 | TBCON = TBCON; |
34 | 34 | ||
35 | call_tick_tasks(); /* Run through the list of tick tasks */ | 35 | call_tick_tasks(); /* Run through the list of tick tasks */ |
36 | } | 36 | } |
37 | 37 | ||
38 | void tick_start(unsigned int interval_in_ms) | 38 | void tick_start(unsigned int interval_in_ms) |
39 | { | 39 | { |
40 | int cycles = 10 * interval_in_ms; | 40 | int cycles = 10 * interval_in_ms; |
41 | 41 | ||
42 | /* configure timer for 10 kHz */ | 42 | /* configure timer for 10 kHz */ |
43 | TBCMD = (1 << 1); /* TB_CLR */ | 43 | TBCMD = (1 << 1); /* TB_CLR */ |
44 | TBPRE = 337 - 1; /* prescaler */ | 44 | TBPRE = 337 - 1; /* prescaler */ |
45 | TBCON = (0 << 13) | /* TB_INT1_EN */ | 45 | TBCON = (0 << 13) | /* TB_INT1_EN */ |
46 | (1 << 12) | /* TB_INT0_EN */ | 46 | (1 << 12) | /* TB_INT0_EN */ |
47 | (0 << 11) | /* TB_START */ | 47 | (0 << 11) | /* TB_START */ |
48 | (2 << 8) | /* TB_CS = PCLK / 16 */ | 48 | (2 << 8) | /* TB_CS = PCLK / 16 */ |
49 | (0 << 4); /* TB_MODE_SEL = interval mode */ | 49 | (0 << 4); /* TB_MODE_SEL = interval mode */ |
50 | TBDATA0 = cycles; /* set interval period */ | 50 | TBDATA0 = cycles; /* set interval period */ |
51 | TBCMD = (1 << 0); /* TB_EN */ | 51 | TBCMD = (1 << 0); /* TB_EN */ |
52 | 52 | ||
53 | /* enable timer interrupt */ | 53 | /* enable timer interrupt */ |
54 | VIC0INTENABLE = 1 << IRQ_TIMER; | 54 | VIC0INTENABLE = 1 << IRQ_TIMER; |
55 | } | 55 | } |
56 | 56 | ||
diff --git a/firmware/target/arm/s5l8702/pcm-s5l8702.c b/firmware/target/arm/s5l8702/pcm-s5l8702.c index c3df77f14f..6461418744 100644 --- a/firmware/target/arm/s5l8702/pcm-s5l8702.c +++ b/firmware/target/arm/s5l8702/pcm-s5l8702.c | |||
@@ -1,228 +1,228 @@ | |||
1 | /*************************************************************************** | 1 | /*************************************************************************** |
2 | * __________ __ ___. | 2 | * __________ __ ___. |
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | 3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ |
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | 4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / |
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: pcm-s5l8700.c 28600 2010-11-14 19:49:20Z Buschel $ | 8 | * $Id: pcm-s5l8700.c 28600 2010-11-14 19:49:20Z Buschel $ |
9 | * | 9 | * |
10 | * Copyright © 2011 Michael Sparmann | 10 | * Copyright © 2011 Michael Sparmann |
11 | * | 11 | * |
12 | * This program is free software; you can redistribute it and/or | 12 | * This program is free software; you can redistribute it and/or |
13 | * modify it under the terms of the GNU General Public License | 13 | * modify it under the terms of the GNU General Public License |
14 | * as published by the Free Software Foundation; either version 2 | 14 | * as published by the Free Software Foundation; either version 2 |
15 | * of the License, or (at your option) any later version. | 15 | * of the License, or (at your option) any later version. |
16 | * | 16 | * |
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | 17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY |
18 | * KIND, either express or implied. | 18 | * KIND, either express or implied. |
19 | * | 19 | * |
20 | ****************************************************************************/ | 20 | ****************************************************************************/ |
21 | #include <string.h> | 21 | #include <string.h> |
22 | 22 | ||
23 | #include "config.h" | 23 | #include "config.h" |
24 | #include "system.h" | 24 | #include "system.h" |
25 | #include "audio.h" | 25 | #include "audio.h" |
26 | #include "s5l8702.h" | 26 | #include "s5l8702.h" |
27 | #include "panic.h" | 27 | #include "panic.h" |
28 | #include "audiohw.h" | 28 | #include "audiohw.h" |
29 | #include "pcm.h" | 29 | #include "pcm.h" |
30 | #include "pcm-internal.h" | 30 | #include "pcm-internal.h" |
31 | #include "pcm_sampr.h" | 31 | #include "pcm_sampr.h" |
32 | #include "mmu-arm.h" | 32 | #include "mmu-arm.h" |
33 | #include "pcm-target.h" | 33 | #include "pcm-target.h" |
34 | 34 | ||
35 | static volatile int locked = 0; | 35 | static volatile int locked = 0; |
36 | static const int zerosample = 0; | 36 | static const int zerosample = 0; |
37 | static unsigned char dblbuf[2][PCM_WATERMARK * 4]; | 37 | static unsigned char dblbuf[2][PCM_WATERMARK * 4]; |
38 | static int active_dblbuf; | 38 | static int active_dblbuf; |
39 | struct dma_lli pcm_lli[PCM_LLICOUNT] __attribute__((aligned(16))); | 39 | struct dma_lli pcm_lli[PCM_LLICOUNT] __attribute__((aligned(16))); |
40 | static struct dma_lli* lastlli; | 40 | static struct dma_lli* lastlli; |
41 | static const unsigned char* dataptr; | 41 | static const unsigned char* dataptr; |
42 | size_t pcm_remaining; | 42 | size_t pcm_remaining; |
43 | size_t pcm_chunksize; | 43 | size_t pcm_chunksize; |
44 | 44 | ||
45 | /* Mask the DMA interrupt */ | 45 | /* Mask the DMA interrupt */ |
46 | void pcm_play_lock(void) | 46 | void pcm_play_lock(void) |
47 | { | 47 | { |
48 | if (locked++ == 0) { | 48 | if (locked++ == 0) { |
49 | //TODO: Urgh, I don't like that at all... | 49 | //TODO: Urgh, I don't like that at all... |
50 | VIC0INTENCLEAR = 1 << IRQ_DMAC0; | 50 | VIC0INTENCLEAR = 1 << IRQ_DMAC0; |
51 | } | 51 | } |
52 | } | 52 | } |
53 | 53 | ||
54 | /* Unmask the DMA interrupt if enabled */ | 54 | /* Unmask the DMA interrupt if enabled */ |
55 | void pcm_play_unlock(void) | 55 | void pcm_play_unlock(void) |
56 | { | 56 | { |
57 | if (--locked == 0) { | 57 | if (--locked == 0) { |
58 | VIC0INTENABLE = 1 << IRQ_DMAC0; | 58 | VIC0INTENABLE = 1 << IRQ_DMAC0; |
59 | } | 59 | } |
60 | } | 60 | } |
61 | 61 | ||
62 | void INT_DMAC0C0(void) ICODE_ATTR; | 62 | void INT_DMAC0C0(void) ICODE_ATTR; |
63 | void INT_DMAC0C0(void) | 63 | void INT_DMAC0C0(void) |
64 | { | 64 | { |
65 | DMAC0INTTCCLR = 1; | 65 | DMAC0INTTCCLR = 1; |
66 | if (!pcm_remaining) | 66 | if (!pcm_remaining) |
67 | { | 67 | { |
68 | pcm_play_get_more_callback((void**)&dataptr, &pcm_remaining); | 68 | pcm_play_get_more_callback((void**)&dataptr, &pcm_remaining); |
69 | pcm_chunksize = pcm_remaining; | 69 | pcm_chunksize = pcm_remaining; |
70 | } | 70 | } |
71 | if (!pcm_remaining) | 71 | if (!pcm_remaining) |
72 | { | 72 | { |
73 | pcm_lli->nextlli = NULL; | 73 | pcm_lli->nextlli = NULL; |
74 | pcm_lli->control = 0x75249000; | 74 | pcm_lli->control = 0x75249000; |
75 | clean_dcache(); | 75 | clean_dcache(); |
76 | return; | 76 | return; |
77 | } | 77 | } |
78 | uint32_t lastsize = MIN(PCM_WATERMARK * 4, pcm_remaining / 2 + 1) & ~1; | 78 | uint32_t lastsize = MIN(PCM_WATERMARK * 4, pcm_remaining / 2 + 1) & ~1; |
79 | pcm_remaining -= lastsize; | 79 | pcm_remaining -= lastsize; |
80 | if (pcm_remaining) lastlli = &pcm_lli[ARRAYLEN(pcm_lli) - 1]; | 80 | if (pcm_remaining) lastlli = &pcm_lli[ARRAYLEN(pcm_lli) - 1]; |
81 | else lastlli = pcm_lli; | 81 | else lastlli = pcm_lli; |
82 | uint32_t chunksize = MIN(PCM_CHUNKSIZE * 4 - lastsize, pcm_remaining); | 82 | uint32_t chunksize = MIN(PCM_CHUNKSIZE * 4 - lastsize, pcm_remaining); |
83 | if (pcm_remaining > chunksize && chunksize > pcm_remaining - PCM_WATERMARK * 8) | 83 | if (pcm_remaining > chunksize && chunksize > pcm_remaining - PCM_WATERMARK * 8) |
84 | chunksize = pcm_remaining - PCM_WATERMARK * 8; | 84 | chunksize = pcm_remaining - PCM_WATERMARK * 8; |
85 | pcm_remaining -= chunksize; | 85 | pcm_remaining -= chunksize; |
86 | bool last = !chunksize; | 86 | bool last = !chunksize; |
87 | int i = 0; | 87 | int i = 0; |
88 | while (chunksize) | 88 | while (chunksize) |
89 | { | 89 | { |
90 | uint32_t thislli = MIN(PCM_LLIMAX * 4, chunksize); | 90 | uint32_t thislli = MIN(PCM_LLIMAX * 4, chunksize); |
91 | chunksize -= thislli; | 91 | chunksize -= thislli; |
92 | pcm_lli[i].srcaddr = (void*)dataptr; | 92 | pcm_lli[i].srcaddr = (void*)dataptr; |
93 | pcm_lli[i].dstaddr = (void*)((int)&I2STXDB0); | 93 | pcm_lli[i].dstaddr = (void*)((int)&I2STXDB0); |
94 | pcm_lli[i].nextlli = chunksize ? &pcm_lli[i + 1] : lastlli; | 94 | pcm_lli[i].nextlli = chunksize ? &pcm_lli[i + 1] : lastlli; |
95 | pcm_lli[i].control = (chunksize ? 0x75249000 : 0xf5249000) | (thislli / 2); | 95 | pcm_lli[i].control = (chunksize ? 0x75249000 : 0xf5249000) | (thislli / 2); |
96 | dataptr += thislli; | 96 | dataptr += thislli; |
97 | i++; | 97 | i++; |
98 | } | 98 | } |
99 | if (!pcm_remaining) | 99 | if (!pcm_remaining) |
100 | { | 100 | { |
101 | memcpy(dblbuf[active_dblbuf], dataptr, lastsize); | 101 | memcpy(dblbuf[active_dblbuf], dataptr, lastsize); |
102 | lastlli->srcaddr = dblbuf[active_dblbuf]; | 102 | lastlli->srcaddr = dblbuf[active_dblbuf]; |
103 | active_dblbuf ^= 1; | 103 | active_dblbuf ^= 1; |
104 | } | 104 | } |
105 | else lastlli->srcaddr = dataptr; | 105 | else lastlli->srcaddr = dataptr; |
106 | lastlli->dstaddr = (void*)((int)&I2STXDB0); | 106 | lastlli->dstaddr = (void*)((int)&I2STXDB0); |
107 | lastlli->nextlli = last ? NULL : pcm_lli; | 107 | lastlli->nextlli = last ? NULL : pcm_lli; |
108 | lastlli->control = (last ? 0xf5249000 : 0x75249000) | (lastsize / 2); | 108 | lastlli->control = (last ? 0xf5249000 : 0x75249000) | (lastsize / 2); |
109 | dataptr += lastsize; | 109 | dataptr += lastsize; |
110 | clean_dcache(); | 110 | clean_dcache(); |
111 | if (!(DMAC0C0CONFIG & 1) && (pcm_lli[0].control & 0xfff)) | 111 | if (!(DMAC0C0CONFIG & 1) && (pcm_lli[0].control & 0xfff)) |
112 | { | 112 | { |
113 | DMAC0C0LLI = pcm_lli[0]; | 113 | DMAC0C0LLI = pcm_lli[0]; |
114 | DMAC0C0CONFIG = 0x8a81; | 114 | DMAC0C0CONFIG = 0x8a81; |
115 | } | 115 | } |
116 | else DMAC0C0NEXTLLI = pcm_lli; | 116 | else DMAC0C0NEXTLLI = pcm_lli; |
117 | 117 | ||
118 | pcm_play_dma_started_callback(); | 118 | pcm_play_dma_started_callback(); |
119 | } | 119 | } |
120 | 120 | ||
121 | void pcm_play_dma_start(const void* addr, size_t size) | 121 | void pcm_play_dma_start(const void* addr, size_t size) |
122 | { | 122 | { |
123 | dataptr = (const unsigned char*)addr; | 123 | dataptr = (const unsigned char*)addr; |
124 | pcm_remaining = size; | 124 | pcm_remaining = size; |
125 | I2STXCOM = 0xe; | 125 | I2STXCOM = 0xe; |
126 | DMAC0CONFIG |= 4; | 126 | DMAC0CONFIG |= 4; |
127 | INT_DMAC0C0(); | 127 | INT_DMAC0C0(); |
128 | } | 128 | } |
129 | 129 | ||
130 | void pcm_play_dma_stop(void) | 130 | void pcm_play_dma_stop(void) |
131 | { | 131 | { |
132 | DMAC0C0CONFIG = 0x8a80; | 132 | DMAC0C0CONFIG = 0x8a80; |
133 | I2STXCOM = 0xa; | 133 | I2STXCOM = 0xa; |
134 | } | 134 | } |
135 | 135 | ||
136 | /* pause playback by disabling LRCK */ | 136 | /* pause playback by disabling LRCK */ |
137 | void pcm_play_dma_pause(bool pause) | 137 | void pcm_play_dma_pause(bool pause) |
138 | { | 138 | { |
139 | if (pause) I2STXCOM |= 1; | 139 | if (pause) I2STXCOM |= 1; |
140 | else I2STXCOM &= ~1; | 140 | else I2STXCOM &= ~1; |
141 | } | 141 | } |
142 | 142 | ||
143 | void pcm_play_dma_init(void) | 143 | void pcm_play_dma_init(void) |
144 | { | 144 | { |
145 | PWRCON(0) &= ~(1 << 4); | 145 | PWRCON(0) &= ~(1 << 4); |
146 | PWRCON(1) &= ~(1 << 7); | 146 | PWRCON(1) &= ~(1 << 7); |
147 | I2S40 = 0x110; | 147 | I2S40 = 0x110; |
148 | I2STXCON = 0xb100059; | 148 | I2STXCON = 0xb100059; |
149 | I2SCLKCON = 1; | 149 | I2SCLKCON = 1; |
150 | VIC0INTENABLE = 1 << IRQ_DMAC0; | 150 | VIC0INTENABLE = 1 << IRQ_DMAC0; |
151 | 151 | ||
152 | audiohw_preinit(); | 152 | audiohw_preinit(); |
153 | } | 153 | } |
154 | 154 | ||
155 | void pcm_play_dma_postinit(void) | 155 | void pcm_play_dma_postinit(void) |
156 | { | 156 | { |
157 | audiohw_postinit(); | 157 | audiohw_postinit(); |
158 | } | 158 | } |
159 | 159 | ||
160 | void pcm_dma_apply_settings(void) | 160 | void pcm_dma_apply_settings(void) |
161 | { | 161 | { |
162 | } | 162 | } |
163 | 163 | ||
164 | size_t pcm_get_bytes_waiting(void) | 164 | size_t pcm_get_bytes_waiting(void) |
165 | { | 165 | { |
166 | int bytes = pcm_remaining; | 166 | int bytes = pcm_remaining; |
167 | const struct dma_lli* lli = (const struct dma_lli*)((int)&DMAC0C0LLI); | 167 | const struct dma_lli* lli = (const struct dma_lli*)((int)&DMAC0C0LLI); |
168 | while (lli) | 168 | while (lli) |
169 | { | 169 | { |
170 | bytes += (lli->control & 0xfff) * 2; | 170 | bytes += (lli->control & 0xfff) * 2; |
171 | if (lli == lastlli) break; | 171 | if (lli == lastlli) break; |
172 | lli = lli->nextlli; | 172 | lli = lli->nextlli; |
173 | } | 173 | } |
174 | return bytes; | 174 | return bytes; |
175 | } | 175 | } |
176 | 176 | ||
177 | const void* pcm_play_dma_get_peak_buffer(int *count) | 177 | const void* pcm_play_dma_get_peak_buffer(int *count) |
178 | { | 178 | { |
179 | *count = (DMAC0C0LLI.control & 0xfff) * 2; | 179 | *count = (DMAC0C0LLI.control & 0xfff) * 2; |
180 | return (void*)(((uint32_t)DMAC0C0LLI.srcaddr) & ~3); | 180 | return (void*)(((uint32_t)DMAC0C0LLI.srcaddr) & ~3); |
181 | } | 181 | } |
182 | 182 | ||
183 | #ifdef HAVE_PCM_DMA_ADDRESS | 183 | #ifdef HAVE_PCM_DMA_ADDRESS |
184 | void * pcm_dma_addr(void *addr) | 184 | void * pcm_dma_addr(void *addr) |
185 | { | 185 | { |
186 | return addr; | 186 | return addr; |
187 | } | 187 | } |
188 | #endif | 188 | #endif |
189 | 189 | ||
190 | 190 | ||
191 | /**************************************************************************** | 191 | /**************************************************************************** |
192 | ** Recording DMA transfer | 192 | ** Recording DMA transfer |
193 | **/ | 193 | **/ |
194 | #ifdef HAVE_RECORDING | 194 | #ifdef HAVE_RECORDING |
195 | void pcm_rec_lock(void) | 195 | void pcm_rec_lock(void) |
196 | { | 196 | { |
197 | } | 197 | } |
198 | 198 | ||
199 | void pcm_rec_unlock(void) | 199 | void pcm_rec_unlock(void) |
200 | { | 200 | { |
201 | } | 201 | } |
202 | 202 | ||
203 | void pcm_rec_dma_stop(void) | 203 | void pcm_rec_dma_stop(void) |
204 | { | 204 | { |
205 | } | 205 | } |
206 | 206 | ||
207 | void pcm_rec_dma_start(void *addr, size_t size) | 207 | void pcm_rec_dma_start(void *addr, size_t size) |
208 | { | 208 | { |
209 | (void)addr; | 209 | (void)addr; |
210 | (void)size; | 210 | (void)size; |
211 | } | 211 | } |
212 | 212 | ||
213 | void pcm_rec_dma_close(void) | 213 | void pcm_rec_dma_close(void) |
214 | { | 214 | { |
215 | } | 215 | } |
216 | 216 | ||
217 | 217 | ||
218 | void pcm_rec_dma_init(void) | 218 | void pcm_rec_dma_init(void) |
219 | { | 219 | { |
220 | } | 220 | } |
221 | 221 | ||
222 | 222 | ||
223 | const void * pcm_rec_dma_get_peak_buffer(void) | 223 | const void * pcm_rec_dma_get_peak_buffer(void) |
224 | { | 224 | { |
225 | return NULL; | 225 | return NULL; |
226 | } | 226 | } |
227 | 227 | ||
228 | #endif /* HAVE_RECORDING */ | 228 | #endif /* HAVE_RECORDING */ |
diff --git a/firmware/target/arm/s5l8702/pcm-target.h b/firmware/target/arm/s5l8702/pcm-target.h index 1b149a6e0b..aefb64e328 100644 --- a/firmware/target/arm/s5l8702/pcm-target.h +++ b/firmware/target/arm/s5l8702/pcm-target.h | |||
@@ -1,40 +1,40 @@ | |||
1 | /*************************************************************************** | 1 | /*************************************************************************** |
2 | * __________ __ ___. | 2 | * __________ __ ___. |
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | 3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ |
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | 4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / |
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: system-target.h 28791 2010-12-11 09:39:33Z Buschel $ | 8 | * $Id: system-target.h 28791 2010-12-11 09:39:33Z Buschel $ |
9 | * | 9 | * |
10 | * Copyright (C) 2010 by Michael Sparmann | 10 | * Copyright (C) 2010 by Michael Sparmann |
11 | * | 11 | * |
12 | * This program is free software; you can redistribute it and/or | 12 | * This program is free software; you can redistribute it and/or |
13 | * modify it under the terms of the GNU General Public License | 13 | * modify it under the terms of the GNU General Public License |
14 | * as published by the Free Software Foundation; either version 2 | 14 | * as published by the Free Software Foundation; either version 2 |
15 | * of the License, or (at your option) any later version. | 15 | * of the License, or (at your option) any later version. |
16 | * | 16 | * |
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | 17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY |
18 | * KIND, either express or implied. | 18 | * KIND, either express or implied. |
19 | * | 19 | * |
20 | ****************************************************************************/ | 20 | ****************************************************************************/ |
21 | #ifndef __PCM_TARGET_H__ | 21 | #ifndef __PCM_TARGET_H__ |
22 | #define __PCM_TARGET_H__ | 22 | #define __PCM_TARGET_H__ |
23 | 23 | ||
24 | 24 | ||
25 | /* S5L8702 PCM driver tunables: */ | 25 | /* S5L8702 PCM driver tunables: */ |
26 | #define PCM_LLIMAX (2047) /* Maximum number of samples per LLI */ | 26 | #define PCM_LLIMAX (2047) /* Maximum number of samples per LLI */ |
27 | #define PCM_CHUNKSIZE (10747) /* Maximum number of samples to handle with one IRQ */ | 27 | #define PCM_CHUNKSIZE (10747) /* Maximum number of samples to handle with one IRQ */ |
28 | /* (bigger chunks will be segmented internally) */ | 28 | /* (bigger chunks will be segmented internally) */ |
29 | #define PCM_WATERMARK (512) /* Number of remaining samples to schedule IRQ at */ | 29 | #define PCM_WATERMARK (512) /* Number of remaining samples to schedule IRQ at */ |
30 | 30 | ||
31 | 31 | ||
32 | #define PCM_LLICOUNT ((PCM_CHUNKSIZE - PCM_WATERMARK + PCM_LLIMAX - 1) / PCM_LLIMAX + 1) | 32 | #define PCM_LLICOUNT ((PCM_CHUNKSIZE - PCM_WATERMARK + PCM_LLIMAX - 1) / PCM_LLIMAX + 1) |
33 | 33 | ||
34 | 34 | ||
35 | extern struct dma_lli pcm_lli[PCM_LLICOUNT]; | 35 | extern struct dma_lli pcm_lli[PCM_LLICOUNT]; |
36 | extern size_t pcm_remaining; | 36 | extern size_t pcm_remaining; |
37 | extern size_t pcm_chunksize; | 37 | extern size_t pcm_chunksize; |
38 | 38 | ||
39 | 39 | ||
40 | #endif /* __PCM_TARGET_H__ */ | 40 | #endif /* __PCM_TARGET_H__ */ |
diff --git a/firmware/target/arm/s5l8702/system-target.h b/firmware/target/arm/s5l8702/system-target.h index 30e53ad6ea..799efb7006 100644 --- a/firmware/target/arm/s5l8702/system-target.h +++ b/firmware/target/arm/s5l8702/system-target.h | |||
@@ -1,47 +1,47 @@ | |||
1 | /*************************************************************************** | 1 | /*************************************************************************** |
2 | * __________ __ ___. | 2 | * __________ __ ___. |
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | 3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ |
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | 4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / |
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: system-target.h 28791 2010-12-11 09:39:33Z Buschel $ | 8 | * $Id: system-target.h 28791 2010-12-11 09:39:33Z Buschel $ |
9 | * | 9 | * |
10 | * Copyright (C) 2007 by Dave Chapman | 10 | * Copyright (C) 2007 by Dave Chapman |
11 | * | 11 | * |
12 | * This program is free software; you can redistribute it and/or | 12 | * This program is free software; you can redistribute it and/or |
13 | * modify it under the terms of the GNU General Public License | 13 | * modify it under the terms of the GNU General Public License |
14 | * as published by the Free Software Foundation; either version 2 | 14 | * as published by the Free Software Foundation; either version 2 |
15 | * of the License, or (at your option) any later version. | 15 | * of the License, or (at your option) any later version. |
16 | * | 16 | * |
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | 17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY |
18 | * KIND, either express or implied. | 18 | * KIND, either express or implied. |
19 | * | 19 | * |
20 | ****************************************************************************/ | 20 | ****************************************************************************/ |
21 | #ifndef SYSTEM_TARGET_H | 21 | #ifndef SYSTEM_TARGET_H |
22 | #define SYSTEM_TARGET_H | 22 | #define SYSTEM_TARGET_H |
23 | 23 | ||
24 | #include "system-arm.h" | 24 | #include "system-arm.h" |
25 | #include "mmu-arm.h" | 25 | #include "mmu-arm.h" |
26 | 26 | ||
27 | #define CPUFREQ_SLEEP 32768 | 27 | #define CPUFREQ_SLEEP 32768 |
28 | #define CPUFREQ_MAX 216000000 | 28 | #define CPUFREQ_MAX 216000000 |
29 | #define CPUFREQ_DEFAULT 108000000 | 29 | #define CPUFREQ_DEFAULT 108000000 |
30 | #define CPUFREQ_NORMAL 108000000 | 30 | #define CPUFREQ_NORMAL 108000000 |
31 | 31 | ||
32 | #define STORAGE_WANTS_ALIGN | 32 | #define STORAGE_WANTS_ALIGN |
33 | 33 | ||
34 | #define inl(a) (*(volatile unsigned long *) (a)) | 34 | #define inl(a) (*(volatile unsigned long *) (a)) |
35 | #define outl(a,b) (*(volatile unsigned long *) (b) = (a)) | 35 | #define outl(a,b) (*(volatile unsigned long *) (b) = (a)) |
36 | #define inb(a) (*(volatile unsigned char *) (a)) | 36 | #define inb(a) (*(volatile unsigned char *) (a)) |
37 | #define outb(a,b) (*(volatile unsigned char *) (b) = (a)) | 37 | #define outb(a,b) (*(volatile unsigned char *) (b) = (a)) |
38 | #define inw(a) (*(volatile unsigned short*) (a)) | 38 | #define inw(a) (*(volatile unsigned short*) (a)) |
39 | #define outw(a,b) (*(volatile unsigned short*) (b) = (a)) | 39 | #define outw(a,b) (*(volatile unsigned short*) (b) = (a)) |
40 | 40 | ||
41 | static inline void udelay(unsigned usecs) | 41 | static inline void udelay(unsigned usecs) |
42 | { | 42 | { |
43 | unsigned stop = USEC_TIMER + usecs; | 43 | unsigned stop = USEC_TIMER + usecs; |
44 | while (TIME_BEFORE(USEC_TIMER, stop)); | 44 | while (TIME_BEFORE(USEC_TIMER, stop)); |
45 | } | 45 | } |
46 | 46 | ||
47 | #endif /* SYSTEM_TARGET_H */ | 47 | #endif /* SYSTEM_TARGET_H */ |
diff --git a/firmware/target/arm/s5l8702/timer-s5l8702.c b/firmware/target/arm/s5l8702/timer-s5l8702.c index fb56a9ffcf..61d4d590e4 100644 --- a/firmware/target/arm/s5l8702/timer-s5l8702.c +++ b/firmware/target/arm/s5l8702/timer-s5l8702.c | |||
@@ -1,94 +1,94 @@ | |||
1 | /*************************************************************************** | 1 | /*************************************************************************** |
2 | * __________ __ ___. | 2 | * __________ __ ___. |
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | 3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ |
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | 4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / |
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: timer-s5l8700.c 23103 2009-10-11 11:35:14Z theseven $ | 8 | * $Id: timer-s5l8700.c 23103 2009-10-11 11:35:14Z theseven $ |
9 | * | 9 | * |
10 | * Copyright (C) 2009 Bertrik Sikken | 10 | * Copyright (C) 2009 Bertrik Sikken |
11 | * | 11 | * |
12 | * This program is free software; you can redistribute it and/or | 12 | * This program is free software; you can redistribute it and/or |
13 | * modify it under the terms of the GNU General Public License | 13 | * modify it under the terms of the GNU General Public License |
14 | * as published by the Free Software Foundation; either version 2 | 14 | * as published by the Free Software Foundation; either version 2 |
15 | * of the License, or (at your option) any later version. | 15 | * of the License, or (at your option) any later version. |
16 | * | 16 | * |
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | 17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY |
18 | * KIND, either express or implied. | 18 | * KIND, either express or implied. |
19 | * | 19 | * |
20 | ****************************************************************************/ | 20 | ****************************************************************************/ |
21 | 21 | ||
22 | #include "config.h" | 22 | #include "config.h" |
23 | 23 | ||
24 | #include "inttypes.h" | 24 | #include "inttypes.h" |
25 | #include "s5l8702.h" | 25 | #include "s5l8702.h" |
26 | #include "system.h" | 26 | #include "system.h" |
27 | #include "timer.h" | 27 | #include "timer.h" |
28 | 28 | ||
29 | //TODO: This needs calibration once we figure out the clocking | 29 | //TODO: This needs calibration once we figure out the clocking |
30 | 30 | ||
31 | void INT_TIMERC(void) | 31 | void INT_TIMERC(void) |
32 | { | 32 | { |
33 | /* clear interrupt */ | 33 | /* clear interrupt */ |
34 | TCCON = TCCON; | 34 | TCCON = TCCON; |
35 | 35 | ||
36 | if (pfn_timer != NULL) { | 36 | if (pfn_timer != NULL) { |
37 | pfn_timer(); | 37 | pfn_timer(); |
38 | } | 38 | } |
39 | } | 39 | } |
40 | 40 | ||
41 | bool timer_set(long cycles, bool start) | 41 | bool timer_set(long cycles, bool start) |
42 | { | 42 | { |
43 | static const int cs_table[] = {1, 2, 4, 6}; | 43 | static const int cs_table[] = {1, 2, 4, 6}; |
44 | int prescale, cs; | 44 | int prescale, cs; |
45 | long count; | 45 | long count; |
46 | 46 | ||
47 | /* stop and clear timer */ | 47 | /* stop and clear timer */ |
48 | TCCMD = (1 << 1); /* TD_CLR */ | 48 | TCCMD = (1 << 1); /* TD_CLR */ |
49 | 49 | ||
50 | /* optionally unregister any previously registered timer user */ | 50 | /* optionally unregister any previously registered timer user */ |
51 | if (start) { | 51 | if (start) { |
52 | if (pfn_unregister != NULL) { | 52 | if (pfn_unregister != NULL) { |
53 | pfn_unregister(); | 53 | pfn_unregister(); |
54 | pfn_unregister = NULL; | 54 | pfn_unregister = NULL; |
55 | } | 55 | } |
56 | } | 56 | } |
57 | 57 | ||
58 | /* scale the count down with the clock select */ | 58 | /* scale the count down with the clock select */ |
59 | for (cs = 0; cs < 4; cs++) { | 59 | for (cs = 0; cs < 4; cs++) { |
60 | count = cycles >> cs_table[cs]; | 60 | count = cycles >> cs_table[cs]; |
61 | if ((count < 65536) || (cs == 3)) { | 61 | if ((count < 65536) || (cs == 3)) { |
62 | break; | 62 | break; |
63 | } | 63 | } |
64 | } | 64 | } |
65 | 65 | ||
66 | /* scale the count down with the prescaler */ | 66 | /* scale the count down with the prescaler */ |
67 | prescale = 1; | 67 | prescale = 1; |
68 | while (count >= 65536) { | 68 | while (count >= 65536) { |
69 | count >>= 1; | 69 | count >>= 1; |
70 | prescale <<= 1; | 70 | prescale <<= 1; |
71 | } | 71 | } |
72 | 72 | ||
73 | /* configure timer */ | 73 | /* configure timer */ |
74 | TCCON = (1 << 12) | /* TD_INT0_EN */ | 74 | TCCON = (1 << 12) | /* TD_INT0_EN */ |
75 | (cs << 8) | /* TS_CS */ | 75 | (cs << 8) | /* TS_CS */ |
76 | (0 << 4); /* TD_MODE_SEL, 0 = interval mode */ | 76 | (0 << 4); /* TD_MODE_SEL, 0 = interval mode */ |
77 | TCPRE = prescale - 1; | 77 | TCPRE = prescale - 1; |
78 | TCDATA0 = count; | 78 | TCDATA0 = count; |
79 | TCCMD = (1 << 0); /* TD_ENABLE */ | 79 | TCCMD = (1 << 0); /* TD_ENABLE */ |
80 | 80 | ||
81 | return true; | 81 | return true; |
82 | } | 82 | } |
83 | 83 | ||
84 | bool timer_start(void) | 84 | bool timer_start(void) |
85 | { | 85 | { |
86 | TCCMD = (1 << 0); /* TD_ENABLE */ | 86 | TCCMD = (1 << 0); /* TD_ENABLE */ |
87 | return true; | 87 | return true; |
88 | } | 88 | } |
89 | 89 | ||
90 | void timer_stop(void) | 90 | void timer_stop(void) |
91 | { | 91 | { |
92 | TCCMD = (0 << 0); /* TD_ENABLE */ | 92 | TCCMD = (0 << 0); /* TD_ENABLE */ |
93 | } | 93 | } |
94 | 94 | ||
diff --git a/firmware/target/sh/archos/mascodec-archos.c b/firmware/target/sh/archos/mascodec-archos.c index 3f932166eb..1eb6e1044d 100644 --- a/firmware/target/sh/archos/mascodec-archos.c +++ b/firmware/target/sh/archos/mascodec-archos.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: mas.c 18807 2008-10-14 11:12:20Z zagor $ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2002 by Linus Nielsen Feltzing | 10 | * Copyright (C) 2002 by Linus Nielsen Feltzing |
11 | * | 11 | * |