summaryrefslogtreecommitdiff
path: root/firmware/target
diff options
context:
space:
mode:
Diffstat (limited to 'firmware/target')
-rw-r--r--firmware/target/arm/tms320dm320/mrobe-500/adc-mr500.c7
-rw-r--r--firmware/target/arm/tms320dm320/mrobe-500/backlight-mr500.c11
-rw-r--r--firmware/target/arm/tms320dm320/spi-dm320.c38
-rw-r--r--firmware/target/arm/tms320dm320/spi-target.h1
4 files changed, 39 insertions, 18 deletions
diff --git a/firmware/target/arm/tms320dm320/mrobe-500/adc-mr500.c b/firmware/target/arm/tms320dm320/mrobe-500/adc-mr500.c
index e7e57a4f11..7d073f4fda 100644
--- a/firmware/target/arm/tms320dm320/mrobe-500/adc-mr500.c
+++ b/firmware/target/arm/tms320dm320/mrobe-500/adc-mr500.c
@@ -38,6 +38,9 @@ void adc_init(void)
38/* Touchscreen data available interupt */ 38/* Touchscreen data available interupt */
39void GIO14(void) 39void GIO14(void)
40{ 40{
41 /* Interrupts work properly when cleared first */
42 IO_INTC_IRQ2 = (1<<3); /* IRQ_GIO14 == 35 */
43
41 short tsadc = tsc2100_readreg(TSADC_PAGE, TSADC_ADDRESS); 44 short tsadc = tsc2100_readreg(TSADC_PAGE, TSADC_ADDRESS);
42 short adscm = (tsadc&TSADC_ADSCM_MASK)>>TSADC_ADSCM_SHIFT; 45 short adscm = (tsadc&TSADC_ADSCM_MASK)>>TSADC_ADSCM_SHIFT;
43 46
@@ -62,8 +65,6 @@ void GIO14(void)
62 case 0x0B: 65 case 0x0B:
63 tsc2100_set_mode(true, 0x01); 66 tsc2100_set_mode(true, 0x01);
64 break; 67 break;
65 } 68 }
66
67 IO_INTC_IRQ2 = (1<<3); /* IRQ_GIO14 == 35 */
68} 69}
69 70
diff --git a/firmware/target/arm/tms320dm320/mrobe-500/backlight-mr500.c b/firmware/target/arm/tms320dm320/mrobe-500/backlight-mr500.c
index 413790ae00..04778c8e50 100644
--- a/firmware/target/arm/tms320dm320/mrobe-500/backlight-mr500.c
+++ b/firmware/target/arm/tms320dm320/mrobe-500/backlight-mr500.c
@@ -29,10 +29,17 @@
29#include "spi-target.h" 29#include "spi-target.h"
30#include "lcd-target.h" 30#include "lcd-target.h"
31 31
32short read_brightness = 0x0;
33
32static void _backlight_write_brightness(int brightness) 34static void _backlight_write_brightness(int brightness)
33{ 35{
34 uint8_t bl_command[] = {0xa4, 0x00, brightness, 0xbb}; 36 uint8_t bl_command[] = {0xA4, 0x00, brightness, 0xA4};
35 spi_block_transfer(SPI_target_BACKLIGHT, false, bl_command, 4, 0, 0); 37
38 uint8_t bl_read[] = {0xA8, 0x00};
39
40 spi_block_transfer(SPI_target_BACKLIGHT, bl_read, 2, (char*)&read_brightness, 2);
41
42 spi_block_transfer(SPI_target_BACKLIGHT, bl_command, 4, 0, 0);
36} 43}
37 44
38void _backlight_on(void) 45void _backlight_on(void)
diff --git a/firmware/target/arm/tms320dm320/spi-dm320.c b/firmware/target/arm/tms320dm320/spi-dm320.c
index 2d5637b70e..262b0611ac 100644
--- a/firmware/target/arm/tms320dm320/spi-dm320.c
+++ b/firmware/target/arm/tms320dm320/spi-dm320.c
@@ -39,16 +39,24 @@ struct SPI_info {
39 volatile unsigned short *setreg; 39 volatile unsigned short *setreg;
40 volatile unsigned short *clrreg; 40 volatile unsigned short *clrreg;
41 int bit; 41 int bit;
42 bool idle_low;
43 char divider;
42}; 44};
43 45
44struct SPI_info spi_targets[] = 46struct SPI_info spi_targets[] =
45{ 47{
46#ifndef CREATIVE_ZVx 48#ifndef CREATIVE_ZVx
47 [SPI_target_TSC2100] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1, GIO_TS_ENABLE }, 49 [SPI_target_TSC2100] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1,
48 [SPI_target_RX5X348AB] = { &IO_GIO_BITSET0, &IO_GIO_BITCLR0, GIO_RTC_ENABLE}, 50 GIO_TS_ENABLE, true, 0x07},
49 [SPI_target_BACKLIGHT] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1, GIO_BL_ENABLE }, 51 /* RTC seems to have timing problems if the CLK idles low */
52 [SPI_target_RX5X348AB] = { &IO_GIO_BITSET0, &IO_GIO_BITCLR0,
53 GIO_RTC_ENABLE, false, 0x3F},
54 /* This appears to work properly idleing low, idling high is very glitchy */
55 [SPI_target_BACKLIGHT] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1,
56 GIO_BL_ENABLE, true, 0x07},
50#else 57#else
51 [SPI_target_LTV250QV] = { &IO_GIO_BITCLR2, &IO_GIO_BITSET2, GIO_LCD_ENABLE}, 58 [SPI_target_LTV250QV] = { &IO_GIO_BITCLR2, &IO_GIO_BITSET2,
59 GIO_LCD_ENABLE, true, 0x07},
52#endif 60#endif
53}; 61};
54 62
@@ -65,22 +73,27 @@ static void spi_disable_all_targets(void)
65} 73}
66 74
67int spi_block_transfer(enum SPI_target target, 75int spi_block_transfer(enum SPI_target target,
68 const bool spi_msb_first,
69 const uint8_t *tx_bytes, unsigned int tx_size, 76 const uint8_t *tx_bytes, unsigned int tx_size,
70 uint8_t *rx_bytes, unsigned int rx_size) 77 uint8_t *rx_bytes, unsigned int rx_size)
71{ 78{
72 mutex_lock(&spi_mtx); 79 mutex_lock(&spi_mtx);
73 80
74 IO_SERIAL0_MODE = (IO_SERIAL0_MODE& ~(spi_msb_first<<9))|(spi_msb_first<<9); 81 IO_SERIAL0_MODE &= ~(1<<10);
82 IO_SERIAL0_MODE |= (spi_targets[target].idle_low << 10);
83
84 IO_SERIAL0_MODE &= ~(0xFF);
85 IO_SERIAL0_MODE |= spi_targets[target].divider;
75 86
76 /* Activate the slave select pin */ 87 /* Activate the slave select pin */
77 *spi_targets[target].setreg = spi_targets[target].bit; 88 if(tx_size) {
89 IO_SERIAL0_TX_ENABLE = 0x0001;
90 *spi_targets[target].setreg = spi_targets[target].bit;
91 }
78 92
79 while (tx_size--) 93 while (tx_size--)
80 { 94 {
81 /* Send one byte */ 95 /* Send one byte */
82 IO_SERIAL0_TX_DATA = *tx_bytes++; 96 IO_SERIAL0_TX_DATA = *tx_bytes++;
83
84 /* Wait until transfer finished */ 97 /* Wait until transfer finished */
85 while (IO_SERIAL0_RX_DATA & IO_SERIAL0_XMIT); 98 while (IO_SERIAL0_RX_DATA & IO_SERIAL0_XMIT);
86 } 99 }
@@ -106,8 +119,8 @@ int spi_block_transfer(enum SPI_target target,
106void spi_init(void) 119void spi_init(void)
107{ 120{
108 mutex_init(&spi_mtx); 121 mutex_init(&spi_mtx);
109 122
110 IO_SERIAL0_MODE = 0x3607; 123 IO_SERIAL0_MODE = 0x2200 | 0x3F;
111 /* Enable TX */ 124 /* Enable TX */
112 IO_SERIAL0_TX_ENABLE = 0x0001; 125 IO_SERIAL0_TX_ENABLE = 0x0001;
113#ifndef CREATIVE_ZVx 126#ifndef CREATIVE_ZVx
@@ -115,7 +128,8 @@ void spi_init(void)
115 IO_GIO_DIR1 &= ~GIO_TS_ENABLE; 128 IO_GIO_DIR1 &= ~GIO_TS_ENABLE;
116 /* Set GIO 12 to output for rtc slave enable */ 129 /* Set GIO 12 to output for rtc slave enable */
117 IO_GIO_DIR0 &= ~GIO_RTC_ENABLE; 130 IO_GIO_DIR0 &= ~GIO_RTC_ENABLE;
118#endif 131#endif
119 spi_disable_all_targets(); /* make sure only one is ever enabled at a time */ 132 /* make sure only one is ever enabled at a time */
133 spi_disable_all_targets();
120 134
121} 135}
diff --git a/firmware/target/arm/tms320dm320/spi-target.h b/firmware/target/arm/tms320dm320/spi-target.h
index 7fc0b72a28..013737b291 100644
--- a/firmware/target/arm/tms320dm320/spi-target.h
+++ b/firmware/target/arm/tms320dm320/spi-target.h
@@ -38,7 +38,6 @@ enum SPI_target {
38 38
39void spi_init(void); 39void spi_init(void);
40int spi_block_transfer(enum SPI_target target, 40int spi_block_transfer(enum SPI_target target,
41 const bool spi_msb_first,
42 const uint8_t *tx_bytes, unsigned int tx_size, 41 const uint8_t *tx_bytes, unsigned int tx_size,
43 uint8_t *rx_bytes, unsigned int rx_size); 42 uint8_t *rx_bytes, unsigned int rx_size);
44 43