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-rw-r--r--firmware/target/arm/as3525/sansa-e200v2/lcd-e200v2.c2
-rw-r--r--firmware/target/arm/as3525/sansa-fuze/lcd-fuze.c3
-rw-r--r--firmware/target/arm/as3525/system-as3525.c16
-rw-r--r--firmware/target/arm/as3525/system-target.h6
-rw-r--r--firmware/target/arm/lcd-ssd1815.c4
5 files changed, 12 insertions, 19 deletions
diff --git a/firmware/target/arm/as3525/sansa-e200v2/lcd-e200v2.c b/firmware/target/arm/as3525/sansa-e200v2/lcd-e200v2.c
index f26381859f..6bdee395c0 100644
--- a/firmware/target/arm/as3525/sansa-e200v2/lcd-e200v2.c
+++ b/firmware/target/arm/as3525/sansa-e200v2/lcd-e200v2.c
@@ -94,7 +94,7 @@ static void lcd_delay(int x)
94/* DBOP initialisation, do what OF does */ 94/* DBOP initialisation, do what OF does */
95static void ams3525_dbop_init(void) 95static void ams3525_dbop_init(void)
96{ 96{
97 CGU_DBOP = (1<<3) | (4-1); 97 CGU_DBOP = (1<<3) | (3-1);
98 98
99 DBOP_TIMPOL_01 = 0xe167e167; 99 DBOP_TIMPOL_01 = 0xe167e167;
100 DBOP_TIMPOL_23 = 0xe167006e; 100 DBOP_TIMPOL_23 = 0xe167006e;
diff --git a/firmware/target/arm/as3525/sansa-fuze/lcd-fuze.c b/firmware/target/arm/as3525/sansa-fuze/lcd-fuze.c
index af57041140..cc61a82c6f 100644
--- a/firmware/target/arm/as3525/sansa-fuze/lcd-fuze.c
+++ b/firmware/target/arm/as3525/sansa-fuze/lcd-fuze.c
@@ -49,8 +49,7 @@ static void lcd_delay(int x)
49 49
50static void as3525_dbop_init(void) 50static void as3525_dbop_init(void)
51{ 51{
52 CGU_DBOP = (1<<3) | (4-1); 52 CGU_DBOP = (1<<3);
53
54 DBOP_TIMPOL_01 = 0xe167e167; 53 DBOP_TIMPOL_01 = 0xe167e167;
55 DBOP_TIMPOL_23 = 0xe167006e; 54 DBOP_TIMPOL_23 = 0xe167006e;
56 DBOP_CTRL = 0x41008; 55 DBOP_CTRL = 0x41008;
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c
index 24149948b8..0451cb36d2 100644
--- a/firmware/target/arm/as3525/system-as3525.c
+++ b/firmware/target/arm/as3525/system-as3525.c
@@ -215,15 +215,10 @@ void system_init(void)
215 "mcr p15, 0, r0, c1, c0 \n" 215 "mcr p15, 0, r0, c1, c0 \n"
216 : : : "r0" ); 216 : : : "r0" );
217 217
218 CGU_PLLA = 0x4330; /* PLLA 384 MHz */ 218 CGU_PLLA = 0x261F; /* PLLA 248 MHz */
219 while(!(CGU_INTCTRL & (1<<0))); /* wait until PLLA is locked */ 219 while(!(CGU_INTCTRL & (1<<0))); /* wait until PLLA is locked */
220 220
221 CGU_PROC = (3<<2)|0x01; /* fclk = PLLA*5/8 = 240 MHz */ 221 CGU_PROC = 1; /* fclk = PLLA = 248 MHz */
222#ifndef BOOTLOADER
223#ifdef HAVE_ADJUSTABLE_CPU_FREQ
224 set_cpu_frequency(CPUFREQ_DEFAULT);
225#endif
226#endif
227 222
228 asm volatile( 223 asm volatile(
229 "mov r0, #0 \n" 224 "mov r0, #0 \n"
@@ -243,16 +238,17 @@ void system_init(void)
243 VIC_INT_ENABLE = 0; /* disable all interrupt lines */ 238 VIC_INT_ENABLE = 0; /* disable all interrupt lines */
244 CGU_PERI |= CGU_VIC_CLOCK_ENABLE; 239 CGU_PERI |= CGU_VIC_CLOCK_ENABLE;
245 VIC_INT_SELECT = 0; /* only IRQ, no FIQ */ 240 VIC_INT_SELECT = 0; /* only IRQ, no FIQ */
246
247 enable_irq();
248#else 241#else
249 /* Disable fast hardware power-off, to use power button normally 242 /* Disable fast hardware power-off, to use power button normally
250 * We don't need the power button in the bootloader. */ 243 * We don't need the power button in the bootloader. */
251 ascodec_init(); 244 ascodec_init();
252 ascodec_write(AS3514_CVDD_DCDC3, ascodec_read(AS3514_CVDD_DCDC3) & (1<<2)); 245 ascodec_write(AS3514_CVDD_DCDC3, ascodec_read(AS3514_CVDD_DCDC3) & (1<<2));
253
254#endif /* BOOTLOADER */ 246#endif /* BOOTLOADER */
255 247
248#ifdef HAVE_ADJUSTABLE_CPU_FREQ
249 set_cpu_frequency(CPUFREQ_DEFAULT);
250#endif
251
256 dma_init(); 252 dma_init();
257} 253}
258 254
diff --git a/firmware/target/arm/as3525/system-target.h b/firmware/target/arm/as3525/system-target.h
index 2309b9790f..53bd4cb1b4 100644
--- a/firmware/target/arm/as3525/system-target.h
+++ b/firmware/target/arm/as3525/system-target.h
@@ -23,8 +23,8 @@
23 23
24#include "system-arm.h" 24#include "system-arm.h"
25 25
26#define CPUFREQ_MAX 240000000 26#define CPUFREQ_MAX 248000000
27#define CPUFREQ_DEFAULT 24000000 27#define CPUFREQ_DEFAULT 24800000
28#define CPUFREQ_NORMAL 30000000 28#define CPUFREQ_NORMAL 31000000
29 29
30#endif /* SYSTEM_TARGET_H */ 30#endif /* SYSTEM_TARGET_H */
diff --git a/firmware/target/arm/lcd-ssd1815.c b/firmware/target/arm/lcd-ssd1815.c
index e9b6bff579..6bbad19ff8 100644
--- a/firmware/target/arm/lcd-ssd1815.c
+++ b/firmware/target/arm/lcd-ssd1815.c
@@ -102,9 +102,7 @@ void lcd_write_data(const fb_data* p_bytes, int count)
102 102
103static inline void ams3525_dbop_init(void) 103static inline void ams3525_dbop_init(void)
104{ 104{
105 int clkdiv = 4 - 1; 105 CGU_DBOP |= (1<<3) /* clk enable */ | (3 - 1) /* clkdiv: 3 bits */ ;
106
107 CGU_DBOP |= (1<<3) /* clk enable */ | clkdiv /* clkdiv: 3 bits */ ;
108 106
109 GPIOB_AFSEL = 0x0f; /* DBOP on pin 3:0 */ 107 GPIOB_AFSEL = 0x0f; /* DBOP on pin 3:0 */
110 GPIOC_AFSEL = 0xff; /* DBOP on pins 7:0 */ 108 GPIOC_AFSEL = 0xff; /* DBOP on pins 7:0 */