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diff --git a/firmware/target/sh/archos/player/lcd-as-player.S b/firmware/target/sh/archos/player/lcd-as-player.S
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1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2004 by Jens Arnold
11 * Based on the work of Alan Korr and Jörg Hohensohn
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
17 *
18 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
19 * KIND, either express or implied.
20 *
21 ****************************************************************************/
22
23#include "config.h"
24#include "cpu.h"
25
26#define LCDR (PBDR_ADDR+1)
27
28#define LCD_DS 1 /* PB0 = 1 --- 0001 --- LCD-DS */
29#define LCD_CS 2 /* PB1 = 1 --- 0010 --- /LCD-CS */
30#define LCD_SD 4 /* PB2 = 1 --- 0100 --- LCD-SD */
31#define LCD_SC 8 /* PB3 = 1 --- 1000 --- LCD-SC */
32
33/*
34 * About /CS,DS,SC,SD
35 * ------------------
36 *
37 * LCD on JBP and JBR uses a SPI protocol to receive orders (SDA and SCK lines)
38 *
39 * - /CS -> Chip Selection line :
40 * 0 : LCD chipset is activated.
41 * - DS -> Data Selection line, latched at the rising edge
42 * of the 8th serial clock (*) :
43 * 0 : instruction register,
44 * 1 : data register;
45 * - SC -> Serial Clock line (SDA).
46 * - SD -> Serial Data line (SCK), latched at the rising edge
47 * of each serial clock (*).
48 *
49 * _ _
50 * /CS \ /
51 * \______________________________________________________/
52 * _____ ____ ____ ____ ____ ____ ____ ____ ____ _____
53 * SD \/ D7 \/ D6 \/ D5 \/ D4 \/ D3 \/ D2 \/ D1 \/ D0 \/
54 * _____/\____/\____/\____/\____/\____/\____/\____/\____/\_____
55 *
56 * _____ _ _ _ _ _ _ _ ________
57 * SC \ * \ * \ * \ * \ * \ * \ * \ *
58 * \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/
59 * _ _________________________________________________________
60 * DS \/
61 * _/\_________________________________________________________
62 *
63 */
64
65 .section .icode,"ax",@progbits
66
67 .align 2
68 .global _lcd_write_command
69 .type _lcd_write_command,@function
70
71/* Write a command byte to the lcd controller
72 *
73 * Arguments:
74 * r4 - command byte (int)
75 *
76 * Register usage:
77 * r0 - scratch
78 * r1 - command byte (copied)
79 * r2 - precalculated port value (CS, DS and SC low, SD high)
80 * r3 - lcd port address
81 * r5 - 1 (byte count for reuse of the loop in _lcd_write_data)
82 */
83
84_lcd_write_command:
85 mov.l .lcdr, r3 /* put lcd data port address in r3 */
86 mov r4, r1 /* copy data byte to r1 */
87 mov #0, r5 /* fake end address - stop after first iteration */
88
89 /* This code will fail if an interrupt changes the contents of PBDRL.
90 * If so, we must disable the interrupt here. */
91
92 mov.b @r3, r0 /* r0 = PBDRL */
93 or #(LCD_SD), r0 /* r0 |= LCD_SD */
94 and #(~(LCD_CS|LCD_DS|LCD_SC)),r0 /* r0 &= ~(LCD_CS|LCD_DS|LCD_SC) */
95
96 bra .single_transfer /* jump into the transfer loop */
97 mov r0, r2
98
99
100 .align 2
101 .global _lcd_write_command_e
102 .type _lcd_write_command_e,@function
103
104/* Write a command byte and a data byte to the lcd controller
105 *
106 * Arguments:
107 * r4 - command byte
108 * r5 - data byte
109 *
110 * Register usage:
111 * r0 - scratch
112 * r1 - command/data byte (copied)
113 * r2 - precalculated port value (CS, DS and SC low, SD high)
114 * r3 - lcd port address
115 * r5 - fake end address
116 * r6 - data byte (saved)
117 * r7 - saved pr
118 */
119
120_lcd_write_command_e:
121 mov.l .lcdr, r3 /* put lcd data port address in r3 */
122 mov r4, r1 /* copy data byte to r1 */
123 mov r5, r6
124 mov #0, r5 /* fake end address - stop after first iteration */
125
126 /* This code will fail if an interrupt changes the contents of PBDRL.
127 * If so, we must disable the interrupt here. */
128
129 mov.b @r3, r0 /* r0 = PBDRL */
130 or #(LCD_SD), r0 /* r0 |= LCD_SD */
131 and #(~(LCD_CS|LCD_DS|LCD_SC)),r0 /* r0 &= ~(LCD_CS|LCD_DS|LCD_SC) */
132
133 sts pr, r7
134 bsr .single_transfer /* jump into the transfer loop */
135 mov r0, r2
136
137 lds r7, pr
138 mov r6, r1
139 or #(LCD_DS|LCD_SD), r0 /* r0 |= LCD_DS|LCD_SD */
140 and #(~(LCD_CS|LCD_SC)), r0 /* r0 &= ~(LCD_CS|LCD_SC) */
141 bra .single_transfer /* jump into the transfer loop */
142 mov r0, r2
143
144
145 .align 2
146 .global _lcd_write_data
147 .type _lcd_write_data,@function
148
149
150/* A high performance function to write data to the display,
151 * one or multiple bytes.
152 *
153 * Arguments:
154 * r4 - data address
155 * r5 - byte count
156 *
157 * Register usage:
158 * r0 - scratch
159 * r1 - current data byte
160 * r2 - precalculated port value (CS and SC low, DS and SD high)
161 * r3 - lcd port address
162 * r4 - current address
163 * r5 - end address
164 */
165
166_lcd_write_data:
167 mov.l .lcdr, r3 /* put lcd data port address in r3 */
168 add r4, r5 /* end address */
169
170 /* This code will fail if an interrupt changes the contents of PBDRL.
171 * If so, we must disable the interrupt here. If disabling interrupts
172 * for a long time (~9200 clks = ~830 µs for transferring 112 bytes on
173 * recorders)is undesirable, the loop has to be rewritten to
174 * disable/precalculate/transfer/enable for each iteration. However,
175 * this would significantly decrease performance. */
176
177 mov.b @r3, r0 /* r0 = PBDRL */
178 or #(LCD_DS|LCD_SD), r0 /* r0 |= LCD_DS|LCD_SD */
179 and #(~(LCD_CS|LCD_SC)), r0 /* r0 &= ~(LCD_CS|LCD_SC) */
180 mov r0, r2
181
182 .align 2
183.multi_transfer:
184 mov.b @r4+, r1 /* load data byte from memory */
185
186.single_transfer:
187 shll16 r1 /* shift data to most significant byte */
188 shll8 r1
189
190 shll r1 /* shift the msb into carry */
191 mov r2, r0 /* copy precalculated port value */
192 bt 1f /* data bit = 1? */
193 and #(~LCD_SD), r0 /* no: r0 &= ~LCD_SD */
1941:
195 shll r1 /* next shift here for alignment */
196 mov.b r0, @r3 /* set data to port */
197 or #(LCD_SC), r0 /* rise SC (independent of SD level) */
198 mov.b r0, @r3 /* set to port */
199
200 mov r2, r0
201 bt 1f
202 and #(~LCD_SD), r0
2031:
204 mov.b r0, @r3
205 or #(LCD_SC), r0
206 mov.b r0, @r3
207
208 shll r1
209 mov r2, r0
210 bt 1f
211 and #(~LCD_SD), r0
2121:
213 shll r1
214 mov.b r0, @r3
215 or #(LCD_SC), r0
216 mov.b r0, @r3
217
218 mov r2, r0
219 bt 1f
220 and #(~LCD_SD), r0
2211:
222 mov.b r0, @r3
223 or #(LCD_SC), r0
224 mov.b r0, @r3
225
226 shll r1
227 mov r2, r0
228 bt 1f
229 and #(~LCD_SD), r0
2301:
231 shll r1
232 mov.b r0, @r3
233 or #(LCD_SC), r0
234 mov.b r0, @r3
235
236 mov r2, r0
237 bt 1f
238 and #(~LCD_SD), r0
2391:
240 mov.b r0, @r3
241 or #(LCD_SC), r0
242 mov.b r0, @r3
243
244 shll r1
245 mov r2, r0
246 bt 1f
247 and #(~LCD_SD), r0
2481:
249 shll r1
250 mov.b r0, @r3
251 or #(LCD_SC), r0
252 mov.b r0, @r3
253
254 mov r2, r0
255 bt 1f
256 and #(~LCD_SD), r0
2571:
258 mov.b r0, @r3
259 or #(LCD_SC), r0
260 mov.b r0, @r3
261
262 cmp/hi r4, r5 /* some blocks left? */
263 bt .multi_transfer
264
265 or #(LCD_CS|LCD_DS|LCD_SD|LCD_SC),r0 /* restore port */
266 rts
267 mov.b r0, @r3
268
269 /* This is the place to reenable the interrupts, if we have disabled
270 * them. See above. */
271
272 .align 2
273.lcdr:
274 .long LCDR
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