5 files changed, 83 insertions, 29 deletions

diff --git a/firmware/target/mips/ingenic_jz47xx/app.lds b/firmware/target/mips/ingenic_jz47xx/app.lds
index dd539b0d41..37999c1050 100644
--- a/firmware/target/mips/ingenic_jz47xx/app.lds
+++ b/firmware/target/mips/ingenic_jz47xx/app.lds
@@ -12,10 +12,7 @@ STARTUP(target/mips/ingenic_jz47xx/crt0.o)
 #define STUBOFFSET 0
 #endif
 
-#define PLUGINSIZE    PLUGIN_BUFFER_SIZE
-#define CODECSIZE     CODEC_SIZE
-
-#define DRAMSIZE      ((MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGINSIZE - CODECSIZE)
+#define DRAMSIZE      (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE
 
 #define DRAMORIG      0x80004000
 #define IRAMORIG      0x80000000
@@ -25,7 +22,7 @@ STARTUP(target/mips/ingenic_jz47xx/crt0.o)
 #define ENDAUDIOADDR  (DRAMORIG + DRAMSIZE)
 
 /* Where the codec buffer ends, and the plugin buffer starts */
-#define ENDADDR       (ENDAUDIOADDR + CODECSIZE)
+#define ENDADDR       (ENDAUDIOADDR + CODEC_SIZE)
 
 MEMORY
 {
diff --git a/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c b/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c
index c76c63dd78..0b187be1cc 100644
--- a/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/codec-jz4740.c
@@ -77,7 +77,7 @@ static void i2s_codec_init(void)
     i2s_codec_reset();
     
     //REG_ICDC_CDCCR2 = (ICDC_CDCCR2_AINVOL(ICDC_CDCCR2_AINVOL_DB(0)) | ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_48)
-    REG_ICDC_CDCCR2 = ( ICDC_CDCCR2_AINVOL(23) | ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_48)
+    REG_ICDC_CDCCR2 = ( ICDC_CDCCR2_AINVOL(23) | ICDC_CDCCR2_SMPR(ICDC_CDCCR2_SMPR_44)
                       | ICDC_CDCCR2_HPVOL(ICDC_CDCCR2_HPVOL_6));
     
     REG_ICDC_CDCCR1 &= ~(ICDC_CDCCR1_SUSPD | ICDC_CDCCR1_RST);
@@ -98,7 +98,7 @@ static void i2s_codec_init(void)
     
     REG_ICDC_CDCCR2 |= 3;
     
-    HP_on_off_flag = 0; /* HP is off */
+    HP_on_off_flag = 1; /* HP is on */
 }
 
 static void i2s_codec_set_mic(unsigned short v) /* 0 <= v <= 100 */
@@ -208,37 +208,36 @@ static void i2s_codec_set_samplerate(unsigned short rate)
     switch (rate)
     {
         case 8000:
-            speed = 0;
+            speed = 0 << 8;
             break;
         case 11025:
-            speed = 1;
+            speed = 1 << 8;
             break;
         case 12000:
-            speed = 2;
+            speed = 2 << 8;
             break;
         case 16000:
-            speed = 3;
+            speed = 3 << 8;
             break;
         case 22050:
-            speed = 4;
+            speed = 4 << 8;
             break;
         case 24000:
-            speed = 5;
+            speed = 5 << 8;
             break;
         case 32000:
-            speed = 6;
+            speed = 6 << 8;
             break;
         case 44100:
-            speed = 7;
+            speed = 7 << 8;
             break;
         case 48000:
-            speed = 8;
+            speed = 8 << 8;
             break;
         default:
             break;
     }
     REG_ICDC_CDCCR2 |= 0x00000f00;
-    speed = speed << 8;
 
     speed |= 0xfffff0ff;
     REG_ICDC_CDCCR2 &= speed;
@@ -327,3 +326,8 @@ void audiohw_init(void)
 {
     i2s_codec_init();
 }
+
+void audiohw_set_frequency(int freq)
+{
+    i2s_codec_set_samplerate(freq);
+}
diff --git a/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c b/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c
index b649311d13..c06c22e9c4 100644
--- a/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c
@@ -32,13 +32,17 @@
  ** Playback DMA transfer
  **/
 
+static bool playback_started = false;
+static void* playback_address;
 void pcm_postinit(void)
 {
     audiohw_postinit();
     
-    /* playback sample:16 bits, burst:16 bytes */
-    __i2s_set_transmit_trigger(4);
+    /* playback sample: 16 bits burst: 16 bytes */
+    __i2s_set_iss_sample_size(16);
     __i2s_set_oss_sample_size(16);
+    __i2s_set_transmit_trigger(16 - 4);
+    __i2s_set_receive_trigger(4);
 }
 
 void pcm_play_dma_init(void)
@@ -54,15 +58,24 @@ void pcm_play_dma_init(void)
 void pcm_dma_apply_settings(void)
 {
     /* TODO */
+    audiohw_set_frequency(pcm_fsel);
 }
 
 static void play_start_pcm(void)
 {
+    /* Prefill FIFO */
+    REG_AIC_DR = 0;
+    REG_AIC_DR = 0;
+    REG_AIC_DR = 0;
+    REG_AIC_DR = 0;
+    
     __i2s_enable_transmit_dma();
     __i2s_enable_replay();
     
     REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) |= DMAC_DCCSR_EN;
     REG_DMAC_DCMD(DMA_AIC_TX_CHANNEL)  |= DMAC_DCMD_TIE;
+    
+    playback_started = true;
 }
 
 static void play_stop_pcm(void)
@@ -73,22 +86,52 @@ static void play_stop_pcm(void)
     
     __i2s_disable_transmit_dma();
     __i2s_disable_replay();
+    
+    playback_started = false;
 }
 
 void pcm_play_dma_start(const void *addr, size_t size)
 {
     dma_enable();
-    
+
+    __dcache_writeback_all();
     REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) = DMAC_DCCSR_NDES;
     REG_DMAC_DSAR(DMA_AIC_TX_CHANNEL)  = PHYSADDR((unsigned long)addr);
     REG_DMAC_DTAR(DMA_AIC_TX_CHANNEL)  = PHYSADDR((unsigned long)AIC_DR);
     REG_DMAC_DTCR(DMA_AIC_TX_CHANNEL)  = size;
     REG_DMAC_DRSR(DMA_AIC_TX_CHANNEL)  = DMAC_DRSR_RS_AICOUT;
-    REG_DMAC_DCMD(DMA_AIC_TX_CHANNEL)  = (DMAC_DCMD_SAI| DMAC_DCMD_SWDH_32 | DMAC_DCMD_DS_32BIT | DMAC_DCMD_DWDH_32);
+    REG_DMAC_DCMD(DMA_AIC_TX_CHANNEL)  = (DMAC_DCMD_SAI | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DS_32BIT | DMAC_DCMD_DWDH_16);
 
+    playback_address = (void*)addr;
     play_start_pcm();
 }
 
+
+static void play_dma_callback(void)
+{
+    unsigned char *start;
+    size_t size = 0;
+
+    pcm_callback_for_more(&start, &size);
+    if(size != 0)
+    {
+        __dcache_writeback_all();
+        REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) = DMAC_DCCSR_NDES;
+        REG_DMAC_DSAR(DMA_AIC_TX_CHANNEL)  = PHYSADDR((unsigned long)start);
+        REG_DMAC_DTAR(DMA_AIC_TX_CHANNEL)  = PHYSADDR((unsigned long)AIC_DR);
+        REG_DMAC_DTCR(DMA_AIC_TX_CHANNEL)  = size;
+        REG_DMAC_DRSR(DMA_AIC_TX_CHANNEL)  = DMAC_DRSR_RS_AICOUT;
+        REG_DMAC_DCMD(DMA_AIC_TX_CHANNEL)  = (DMAC_DCMD_SAI | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DS_32BIT | DMAC_DCMD_DWDH_16);
+        REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) |= DMAC_DCCSR_EN;
+        REG_DMAC_DCMD(DMA_AIC_TX_CHANNEL)  |= DMAC_DCMD_TIE;
+        return;
+    }
+
+    /* Error, callback missing or no more DMA to do */
+    pcm_play_dma_stop();
+    pcm_play_dma_stopped_callback();
+}
+
 void DMA_CALLBACK(DMA_AIC_TX_CHANNEL)(void)
 {
     if (REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) & DMAC_DCCSR_AR)
@@ -101,21 +144,31 @@ void DMA_CALLBACK(DMA_AIC_TX_CHANNEL)(void)
     {
         REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) &= ~(DMAC_DCCSR_TT | DMAC_DCCSR_HLT);
         REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) &= ~DMAC_DCCSR_EN;
-        __aic_disable_transmit_dma();
+        play_dma_callback();
     }
 }
 
 size_t pcm_get_bytes_waiting(void)
 {
-    return REG_DMAC_DTCR(DMA_AIC_TX_CHANNEL);
+    if(playback_started)
+        return REG_DMAC_DTCR(DMA_AIC_TX_CHANNEL) & ~3;
+    else
+        return 0;
 }
 
 const void * pcm_play_dma_get_peak_buffer(int *count)
 {
     /* TODO */
-    //*count = REG_DMAC_DTCR(DMA_AIC_TX_CHANNEL)>>2;
-    *count = 0;
-    return NULL;
+    if(playback_started)
+    {
+        *count = REG_DMAC_DTCR(DMA_AIC_TX_CHANNEL);
+        return (void*)(playback_address + ((REG_DMAC_DTCR(DMA_AIC_TX_CHANNEL) + 2) & ~3));
+    }
+    else
+    {
+        *count = 0;
+        return NULL;
+    }
 }
 
 void pcm_play_dma_stop(void)
diff --git a/firmware/target/mips/ingenic_jz47xx/system-jz4740.c b/firmware/target/mips/ingenic_jz47xx/system-jz4740.c
index f78f3592e5..291716a309 100644
--- a/firmware/target/mips/ingenic_jz47xx/system-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/system-jz4740.c
@@ -281,7 +281,7 @@ void dma_enable(void)
         REG_DMAC_DCCSR(4) = 0;
         REG_DMAC_DCCSR(5) = 0;
         
-        REG_DMAC_DMACR = (DMAC_DMACR_PR_012345 | DMAC_DMACR_DMAE);
+        REG_DMAC_DMACR = (DMAC_DMACR_PR_RR | DMAC_DMACR_DMAE);
     }
 }
 
diff --git a/firmware/target/mips/ingenic_jz47xx/usb-jz4740.c b/firmware/target/mips/ingenic_jz47xx/usb-jz4740.c
index 2dd73c01a4..14656eed5f 100644
--- a/firmware/target/mips/ingenic_jz47xx/usb-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/usb-jz4740.c
@@ -730,7 +730,7 @@ int usb_drv_send_nonblocking(int endpoint, void* ptr, int length)
         {
             //dma_cache_wback_inv((unsigned long)ptr, length);
             __dcache_writeback_all();
-            REG_USB_REG_ADDR1 = (unsigned long)ptr & 0x7fffffff;
+            REG_USB_REG_ADDR1 = PHYSADDR((unsigned long)ptr);
             REG_USB_REG_COUNT1 = length;
             REG_USB_REG_CNTL1 = (USB_CNTL_INTR_EN | USB_CNTL_MODE_1 |
                                  USB_CNTL_DIR_IN  | USB_CNTL_ENA |
@@ -780,7 +780,7 @@ int usb_drv_recv(int endpoint, void* ptr, int length)
         {
             //dma_cache_wback_inv((unsigned long)ptr, length);
             __dcache_writeback_all();
-            REG_USB_REG_ADDR2 = (unsigned long)ptr & 0x7fffffff;
+            REG_USB_REG_ADDR2 = PHYSADDR((unsigned long)ptr);
             REG_USB_REG_COUNT2 = length;
             REG_USB_REG_CNTL2 = (USB_CNTL_INTR_EN | USB_CNTL_MODE_1 |
                                  USB_CNTL_ENA | USB_CNTL_EP(endpoint) |