diff options
Diffstat (limited to 'firmware/target/mips/ingenic_x1000')
-rw-r--r-- | firmware/target/mips/ingenic_x1000/app.lds | 22 | ||||
-rw-r--r-- | firmware/target/mips/ingenic_x1000/crt0.S | 9 | ||||
-rw-r--r-- | firmware/target/mips/ingenic_x1000/spl.lds | 1 |
3 files changed, 32 insertions, 0 deletions
diff --git a/firmware/target/mips/ingenic_x1000/app.lds b/firmware/target/mips/ingenic_x1000/app.lds index 270055c18f..fe06e1cd8d 100644 --- a/firmware/target/mips/ingenic_x1000/app.lds +++ b/firmware/target/mips/ingenic_x1000/app.lds | |||
@@ -13,6 +13,10 @@ INPUT(target/mips/system-mips.o) | |||
13 | # undef CODEC_SIZE | 13 | # undef CODEC_SIZE |
14 | # define PLUGIN_BUFFER_SIZE 0 | 14 | # define PLUGIN_BUFFER_SIZE 0 |
15 | # define CODEC_SIZE 0 | 15 | # define CODEC_SIZE 0 |
16 | # if defined(HAVE_INIT_ATTR) | ||
17 | /* This needs to be fixed for the bootloader */ | ||
18 | # error "bootloader does not support INIT_ATTR" | ||
19 | # endif | ||
16 | #endif | 20 | #endif |
17 | 21 | ||
18 | /* End of the audio buffer, where the codec buffer starts */ | 22 | /* End of the audio buffer, where the codec buffer starts */ |
@@ -21,11 +25,16 @@ INPUT(target/mips/system-mips.o) | |||
21 | /* Where the codec buffer ends, and the plugin buffer starts */ | 25 | /* Where the codec buffer ends, and the plugin buffer starts */ |
22 | #define ENDCODECADDR (ENDAUDIOADDR + CODEC_SIZE) | 26 | #define ENDCODECADDR (ENDAUDIOADDR + CODEC_SIZE) |
23 | 27 | ||
28 | /* Place init code in the codec buffer */ | ||
29 | #define INIT_BASE ENDAUDIOADDR | ||
30 | #define INIT_SIZE CODEC_SIZE | ||
31 | |||
24 | MEMORY | 32 | MEMORY |
25 | { | 33 | { |
26 | IRAM : ORIGIN = X1000_IRAM_BASE, LENGTH = X1000_IRAM_SIZE | 34 | IRAM : ORIGIN = X1000_IRAM_BASE, LENGTH = X1000_IRAM_SIZE |
27 | DRAM : ORIGIN = X1000_DRAM_BASE, LENGTH = X1000_DRAM_SIZE | 35 | DRAM : ORIGIN = X1000_DRAM_BASE, LENGTH = X1000_DRAM_SIZE |
28 | TCSM : ORIGIN = X1000_TCSM_BASE, LENGTH = X1000_TCSM_SIZE | 36 | TCSM : ORIGIN = X1000_TCSM_BASE, LENGTH = X1000_TCSM_SIZE |
37 | INIT : ORIGIN = INIT_BASE, LENGTH = INIT_SIZE | ||
29 | } | 38 | } |
30 | 39 | ||
31 | SECTIONS | 40 | SECTIONS |
@@ -40,6 +49,9 @@ SECTIONS | |||
40 | .text : | 49 | .text : |
41 | { | 50 | { |
42 | *(.text*); | 51 | *(.text*); |
52 | #ifndef HAVE_INIT_ATTR | ||
53 | *(.init*); | ||
54 | #endif | ||
43 | } > DRAM | 55 | } > DRAM |
44 | 56 | ||
45 | . = ALIGN(4); | 57 | . = ALIGN(4); |
@@ -89,6 +101,16 @@ SECTIONS | |||
89 | } > TCSM AT> DRAM | 101 | } > TCSM AT> DRAM |
90 | _tcsmcopy = LOADADDR(.tcsm); | 102 | _tcsmcopy = LOADADDR(.tcsm); |
91 | 103 | ||
104 | #ifdef HAVE_INIT_ATTR | ||
105 | .init : | ||
106 | { | ||
107 | _initstart = .; | ||
108 | *(.init*); | ||
109 | _initend = .; | ||
110 | } > INIT AT> DRAM | ||
111 | _initcopy = LOADADDR(.init); | ||
112 | #endif | ||
113 | |||
92 | /* Sections below have no data. */ | 114 | /* Sections below have no data. */ |
93 | 115 | ||
94 | . = ALIGN(4); | 116 | . = ALIGN(4); |
diff --git a/firmware/target/mips/ingenic_x1000/crt0.S b/firmware/target/mips/ingenic_x1000/crt0.S index 494f3722aa..6c0942b0db 100644 --- a/firmware/target/mips/ingenic_x1000/crt0.S +++ b/firmware/target/mips/ingenic_x1000/crt0.S | |||
@@ -75,6 +75,15 @@ _realstart: | |||
75 | bal _copy | 75 | bal _copy |
76 | nop | 76 | nop |
77 | 77 | ||
78 | #ifdef HAVE_INIT_ATTR | ||
79 | /* Copy init code */ | ||
80 | la a0, _initcopy | ||
81 | la a1, _initstart | ||
82 | la a2, _initend | ||
83 | bal _copy | ||
84 | nop | ||
85 | #endif | ||
86 | |||
78 | /* Clear the BSS segment (needed to zero-initialize C static values) */ | 87 | /* Clear the BSS segment (needed to zero-initialize C static values) */ |
79 | la a0, _bssbegin | 88 | la a0, _bssbegin |
80 | la a1, _bssend | 89 | la a1, _bssend |
diff --git a/firmware/target/mips/ingenic_x1000/spl.lds b/firmware/target/mips/ingenic_x1000/spl.lds index b6c982bd80..b3e508e9c3 100644 --- a/firmware/target/mips/ingenic_x1000/spl.lds +++ b/firmware/target/mips/ingenic_x1000/spl.lds | |||
@@ -18,6 +18,7 @@ SECTIONS | |||
18 | *(.startup.spl); | 18 | *(.startup.spl); |
19 | *(.text*); | 19 | *(.text*); |
20 | *(.icode*); | 20 | *(.icode*); |
21 | *(.init*); | ||
21 | } > TCSM | 22 | } > TCSM |
22 | 23 | ||
23 | . = ALIGN(4); | 24 | . = ALIGN(4); |