diff options
Diffstat (limited to 'firmware/target/mips/ingenic_x1000/x1000/efuse.h')
-rw-r--r-- | firmware/target/mips/ingenic_x1000/x1000/efuse.h | 173 |
1 files changed, 173 insertions, 0 deletions
diff --git a/firmware/target/mips/ingenic_x1000/x1000/efuse.h b/firmware/target/mips/ingenic_x1000/x1000/efuse.h new file mode 100644 index 0000000000..8628cfd08b --- /dev/null +++ b/firmware/target/mips/ingenic_x1000/x1000/efuse.h | |||
@@ -0,0 +1,173 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * This file was automatically generated by headergen, DO NOT EDIT it. | ||
9 | * headergen version: 3.0.0 | ||
10 | * x1000 version: 1.0 | ||
11 | * x1000 authors: Aidan MacDonald | ||
12 | * | ||
13 | * Copyright (C) 2015 by the authors | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or | ||
16 | * modify it under the terms of the GNU General Public License | ||
17 | * as published by the Free Software Foundation; either version 2 | ||
18 | * of the License, or (at your option) any later version. | ||
19 | * | ||
20 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
21 | * KIND, either express or implied. | ||
22 | * | ||
23 | ****************************************************************************/ | ||
24 | #ifndef __HEADERGEN_EFUSE_H__ | ||
25 | #define __HEADERGEN_EFUSE_H__ | ||
26 | |||
27 | #include "macro.h" | ||
28 | |||
29 | #define REG_EFUSE_CTRL jz_reg(EFUSE_CTRL) | ||
30 | #define JA_EFUSE_CTRL (0xb3540000 + 0x0) | ||
31 | #define JT_EFUSE_CTRL JIO_32_RW | ||
32 | #define JN_EFUSE_CTRL EFUSE_CTRL | ||
33 | #define JI_EFUSE_CTRL | ||
34 | #define BP_EFUSE_CTRL_ADDR 21 | ||
35 | #define BM_EFUSE_CTRL_ADDR 0xfe00000 | ||
36 | #define BF_EFUSE_CTRL_ADDR(v) (((v) & 0x7f) << 21) | ||
37 | #define BFM_EFUSE_CTRL_ADDR(v) BM_EFUSE_CTRL_ADDR | ||
38 | #define BF_EFUSE_CTRL_ADDR_V(e) BF_EFUSE_CTRL_ADDR(BV_EFUSE_CTRL_ADDR__##e) | ||
39 | #define BFM_EFUSE_CTRL_ADDR_V(v) BM_EFUSE_CTRL_ADDR | ||
40 | #define BP_EFUSE_CTRL_LENGTH 16 | ||
41 | #define BM_EFUSE_CTRL_LENGTH 0x1f0000 | ||
42 | #define BF_EFUSE_CTRL_LENGTH(v) (((v) & 0x1f) << 16) | ||
43 | #define BFM_EFUSE_CTRL_LENGTH(v) BM_EFUSE_CTRL_LENGTH | ||
44 | #define BF_EFUSE_CTRL_LENGTH_V(e) BF_EFUSE_CTRL_LENGTH(BV_EFUSE_CTRL_LENGTH__##e) | ||
45 | #define BFM_EFUSE_CTRL_LENGTH_V(v) BM_EFUSE_CTRL_LENGTH | ||
46 | #define BP_EFUSE_CTRL_PG_EN 15 | ||
47 | #define BM_EFUSE_CTRL_PG_EN 0x8000 | ||
48 | #define BF_EFUSE_CTRL_PG_EN(v) (((v) & 0x1) << 15) | ||
49 | #define BFM_EFUSE_CTRL_PG_EN(v) BM_EFUSE_CTRL_PG_EN | ||
50 | #define BF_EFUSE_CTRL_PG_EN_V(e) BF_EFUSE_CTRL_PG_EN(BV_EFUSE_CTRL_PG_EN__##e) | ||
51 | #define BFM_EFUSE_CTRL_PG_EN_V(v) BM_EFUSE_CTRL_PG_EN | ||
52 | #define BP_EFUSE_CTRL_WR_EN 1 | ||
53 | #define BM_EFUSE_CTRL_WR_EN 0x2 | ||
54 | #define BF_EFUSE_CTRL_WR_EN(v) (((v) & 0x1) << 1) | ||
55 | #define BFM_EFUSE_CTRL_WR_EN(v) BM_EFUSE_CTRL_WR_EN | ||
56 | #define BF_EFUSE_CTRL_WR_EN_V(e) BF_EFUSE_CTRL_WR_EN(BV_EFUSE_CTRL_WR_EN__##e) | ||
57 | #define BFM_EFUSE_CTRL_WR_EN_V(v) BM_EFUSE_CTRL_WR_EN | ||
58 | #define BP_EFUSE_CTRL_RD_EN 0 | ||
59 | #define BM_EFUSE_CTRL_RD_EN 0x1 | ||
60 | #define BF_EFUSE_CTRL_RD_EN(v) (((v) & 0x1) << 0) | ||
61 | #define BFM_EFUSE_CTRL_RD_EN(v) BM_EFUSE_CTRL_RD_EN | ||
62 | #define BF_EFUSE_CTRL_RD_EN_V(e) BF_EFUSE_CTRL_RD_EN(BV_EFUSE_CTRL_RD_EN__##e) | ||
63 | #define BFM_EFUSE_CTRL_RD_EN_V(v) BM_EFUSE_CTRL_RD_EN | ||
64 | |||
65 | #define REG_EFUSE_CFG jz_reg(EFUSE_CFG) | ||
66 | #define JA_EFUSE_CFG (0xb3540000 + 0x4) | ||
67 | #define JT_EFUSE_CFG JIO_32_RW | ||
68 | #define JN_EFUSE_CFG EFUSE_CFG | ||
69 | #define JI_EFUSE_CFG | ||
70 | #define BP_EFUSE_CFG_RD_AJD 20 | ||
71 | #define BM_EFUSE_CFG_RD_AJD 0x300000 | ||
72 | #define BF_EFUSE_CFG_RD_AJD(v) (((v) & 0x3) << 20) | ||
73 | #define BFM_EFUSE_CFG_RD_AJD(v) BM_EFUSE_CFG_RD_AJD | ||
74 | #define BF_EFUSE_CFG_RD_AJD_V(e) BF_EFUSE_CFG_RD_AJD(BV_EFUSE_CFG_RD_AJD__##e) | ||
75 | #define BFM_EFUSE_CFG_RD_AJD_V(v) BM_EFUSE_CFG_RD_AJD | ||
76 | #define BP_EFUSE_CFG_RD_STROBE 16 | ||
77 | #define BM_EFUSE_CFG_RD_STROBE 0x70000 | ||
78 | #define BF_EFUSE_CFG_RD_STROBE(v) (((v) & 0x7) << 16) | ||
79 | #define BFM_EFUSE_CFG_RD_STROBE(v) BM_EFUSE_CFG_RD_STROBE | ||
80 | #define BF_EFUSE_CFG_RD_STROBE_V(e) BF_EFUSE_CFG_RD_STROBE(BV_EFUSE_CFG_RD_STROBE__##e) | ||
81 | #define BFM_EFUSE_CFG_RD_STROBE_V(v) BM_EFUSE_CFG_RD_STROBE | ||
82 | #define BP_EFUSE_CFG_WR_ADJ 12 | ||
83 | #define BM_EFUSE_CFG_WR_ADJ 0x3000 | ||
84 | #define BF_EFUSE_CFG_WR_ADJ(v) (((v) & 0x3) << 12) | ||
85 | #define BFM_EFUSE_CFG_WR_ADJ(v) BM_EFUSE_CFG_WR_ADJ | ||
86 | #define BF_EFUSE_CFG_WR_ADJ_V(e) BF_EFUSE_CFG_WR_ADJ(BV_EFUSE_CFG_WR_ADJ__##e) | ||
87 | #define BFM_EFUSE_CFG_WR_ADJ_V(v) BM_EFUSE_CFG_WR_ADJ | ||
88 | #define BP_EFUSE_CFG_WR_STROBE 0 | ||
89 | #define BM_EFUSE_CFG_WR_STROBE 0x1ff | ||
90 | #define BF_EFUSE_CFG_WR_STROBE(v) (((v) & 0x1ff) << 0) | ||
91 | #define BFM_EFUSE_CFG_WR_STROBE(v) BM_EFUSE_CFG_WR_STROBE | ||
92 | #define BF_EFUSE_CFG_WR_STROBE_V(e) BF_EFUSE_CFG_WR_STROBE(BV_EFUSE_CFG_WR_STROBE__##e) | ||
93 | #define BFM_EFUSE_CFG_WR_STROBE_V(v) BM_EFUSE_CFG_WR_STROBE | ||
94 | #define BP_EFUSE_CFG_INT_EN 31 | ||
95 | #define BM_EFUSE_CFG_INT_EN 0x80000000 | ||
96 | #define BF_EFUSE_CFG_INT_EN(v) (((v) & 0x1) << 31) | ||
97 | #define BFM_EFUSE_CFG_INT_EN(v) BM_EFUSE_CFG_INT_EN | ||
98 | #define BF_EFUSE_CFG_INT_EN_V(e) BF_EFUSE_CFG_INT_EN(BV_EFUSE_CFG_INT_EN__##e) | ||
99 | #define BFM_EFUSE_CFG_INT_EN_V(v) BM_EFUSE_CFG_INT_EN | ||
100 | |||
101 | #define REG_EFUSE_STATE jz_reg(EFUSE_STATE) | ||
102 | #define JA_EFUSE_STATE (0xb3540000 + 0x8) | ||
103 | #define JT_EFUSE_STATE JIO_32_RW | ||
104 | #define JN_EFUSE_STATE EFUSE_STATE | ||
105 | #define JI_EFUSE_STATE | ||
106 | #define BP_EFUSE_STATE_UK_PRT 23 | ||
107 | #define BM_EFUSE_STATE_UK_PRT 0x800000 | ||
108 | #define BF_EFUSE_STATE_UK_PRT(v) (((v) & 0x1) << 23) | ||
109 | #define BFM_EFUSE_STATE_UK_PRT(v) BM_EFUSE_STATE_UK_PRT | ||
110 | #define BF_EFUSE_STATE_UK_PRT_V(e) BF_EFUSE_STATE_UK_PRT(BV_EFUSE_STATE_UK_PRT__##e) | ||
111 | #define BFM_EFUSE_STATE_UK_PRT_V(v) BM_EFUSE_STATE_UK_PRT | ||
112 | #define BP_EFUSE_STATE_NKU_PRT 22 | ||
113 | #define BM_EFUSE_STATE_NKU_PRT 0x400000 | ||
114 | #define BF_EFUSE_STATE_NKU_PRT(v) (((v) & 0x1) << 22) | ||
115 | #define BFM_EFUSE_STATE_NKU_PRT(v) BM_EFUSE_STATE_NKU_PRT | ||
116 | #define BF_EFUSE_STATE_NKU_PRT_V(e) BF_EFUSE_STATE_NKU_PRT(BV_EFUSE_STATE_NKU_PRT__##e) | ||
117 | #define BFM_EFUSE_STATE_NKU_PRT_V(v) BM_EFUSE_STATE_NKU_PRT | ||
118 | #define BP_EFUSE_STATE_EXKEY_EN 21 | ||
119 | #define BM_EFUSE_STATE_EXKEY_EN 0x200000 | ||
120 | #define BF_EFUSE_STATE_EXKEY_EN(v) (((v) & 0x1) << 21) | ||
121 | #define BFM_EFUSE_STATE_EXKEY_EN(v) BM_EFUSE_STATE_EXKEY_EN | ||
122 | #define BF_EFUSE_STATE_EXKEY_EN_V(e) BF_EFUSE_STATE_EXKEY_EN(BV_EFUSE_STATE_EXKEY_EN__##e) | ||
123 | #define BFM_EFUSE_STATE_EXKEY_EN_V(v) BM_EFUSE_STATE_EXKEY_EN | ||
124 | #define BP_EFUSE_STATE_CUSTID_PRT 15 | ||
125 | #define BM_EFUSE_STATE_CUSTID_PRT 0x8000 | ||
126 | #define BF_EFUSE_STATE_CUSTID_PRT(v) (((v) & 0x1) << 15) | ||
127 | #define BFM_EFUSE_STATE_CUSTID_PRT(v) BM_EFUSE_STATE_CUSTID_PRT | ||
128 | #define BF_EFUSE_STATE_CUSTID_PRT_V(e) BF_EFUSE_STATE_CUSTID_PRT(BV_EFUSE_STATE_CUSTID_PRT__##e) | ||
129 | #define BFM_EFUSE_STATE_CUSTID_PRT_V(v) BM_EFUSE_STATE_CUSTID_PRT | ||
130 | #define BP_EFUSE_STATE_CHIPID_PRT 14 | ||
131 | #define BM_EFUSE_STATE_CHIPID_PRT 0x4000 | ||
132 | #define BF_EFUSE_STATE_CHIPID_PRT(v) (((v) & 0x1) << 14) | ||
133 | #define BFM_EFUSE_STATE_CHIPID_PRT(v) BM_EFUSE_STATE_CHIPID_PRT | ||
134 | #define BF_EFUSE_STATE_CHIPID_PRT_V(e) BF_EFUSE_STATE_CHIPID_PRT(BV_EFUSE_STATE_CHIPID_PRT__##e) | ||
135 | #define BFM_EFUSE_STATE_CHIPID_PRT_V(v) BM_EFUSE_STATE_CHIPID_PRT | ||
136 | #define BP_EFUSE_STATE_SECBOOT_PRT 12 | ||
137 | #define BM_EFUSE_STATE_SECBOOT_PRT 0x1000 | ||
138 | #define BF_EFUSE_STATE_SECBOOT_PRT(v) (((v) & 0x1) << 12) | ||
139 | #define BFM_EFUSE_STATE_SECBOOT_PRT(v) BM_EFUSE_STATE_SECBOOT_PRT | ||
140 | #define BF_EFUSE_STATE_SECBOOT_PRT_V(e) BF_EFUSE_STATE_SECBOOT_PRT(BV_EFUSE_STATE_SECBOOT_PRT__##e) | ||
141 | #define BFM_EFUSE_STATE_SECBOOT_PRT_V(v) BM_EFUSE_STATE_SECBOOT_PRT | ||
142 | #define BP_EFUSE_STATE_DIS_JTAG 11 | ||
143 | #define BM_EFUSE_STATE_DIS_JTAG 0x800 | ||
144 | #define BF_EFUSE_STATE_DIS_JTAG(v) (((v) & 0x1) << 11) | ||
145 | #define BFM_EFUSE_STATE_DIS_JTAG(v) BM_EFUSE_STATE_DIS_JTAG | ||
146 | #define BF_EFUSE_STATE_DIS_JTAG_V(e) BF_EFUSE_STATE_DIS_JTAG(BV_EFUSE_STATE_DIS_JTAG__##e) | ||
147 | #define BFM_EFUSE_STATE_DIS_JTAG_V(v) BM_EFUSE_STATE_DIS_JTAG | ||
148 | #define BP_EFUSE_STATE_SECBOOT_EN 8 | ||
149 | #define BM_EFUSE_STATE_SECBOOT_EN 0x100 | ||
150 | #define BF_EFUSE_STATE_SECBOOT_EN(v) (((v) & 0x1) << 8) | ||
151 | #define BFM_EFUSE_STATE_SECBOOT_EN(v) BM_EFUSE_STATE_SECBOOT_EN | ||
152 | #define BF_EFUSE_STATE_SECBOOT_EN_V(e) BF_EFUSE_STATE_SECBOOT_EN(BV_EFUSE_STATE_SECBOOT_EN__##e) | ||
153 | #define BFM_EFUSE_STATE_SECBOOT_EN_V(v) BM_EFUSE_STATE_SECBOOT_EN | ||
154 | #define BP_EFUSE_STATE_WR_DONE 1 | ||
155 | #define BM_EFUSE_STATE_WR_DONE 0x2 | ||
156 | #define BF_EFUSE_STATE_WR_DONE(v) (((v) & 0x1) << 1) | ||
157 | #define BFM_EFUSE_STATE_WR_DONE(v) BM_EFUSE_STATE_WR_DONE | ||
158 | #define BF_EFUSE_STATE_WR_DONE_V(e) BF_EFUSE_STATE_WR_DONE(BV_EFUSE_STATE_WR_DONE__##e) | ||
159 | #define BFM_EFUSE_STATE_WR_DONE_V(v) BM_EFUSE_STATE_WR_DONE | ||
160 | #define BP_EFUSE_STATE_RD_DONE 0 | ||
161 | #define BM_EFUSE_STATE_RD_DONE 0x1 | ||
162 | #define BF_EFUSE_STATE_RD_DONE(v) (((v) & 0x1) << 0) | ||
163 | #define BFM_EFUSE_STATE_RD_DONE(v) BM_EFUSE_STATE_RD_DONE | ||
164 | #define BF_EFUSE_STATE_RD_DONE_V(e) BF_EFUSE_STATE_RD_DONE(BV_EFUSE_STATE_RD_DONE__##e) | ||
165 | #define BFM_EFUSE_STATE_RD_DONE_V(v) BM_EFUSE_STATE_RD_DONE | ||
166 | |||
167 | #define REG_EFUSE_DATA(_n1) jz_reg(EFUSE_DATA(_n1)) | ||
168 | #define JA_EFUSE_DATA(_n1) (0xb3540000 + 0xc + (_n1) * 0x4) | ||
169 | #define JT_EFUSE_DATA(_n1) JIO_32_RW | ||
170 | #define JN_EFUSE_DATA(_n1) EFUSE_DATA | ||
171 | #define JI_EFUSE_DATA(_n1) (_n1) | ||
172 | |||
173 | #endif /* __HEADERGEN_EFUSE_H__*/ | ||