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Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/system-target.h')
-rwxr-xr-xfirmware/target/mips/ingenic_jz47xx/system-target.h103
1 files changed, 103 insertions, 0 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/system-target.h b/firmware/target/mips/ingenic_jz47xx/system-target.h
new file mode 100755
index 0000000000..2fff6423b9
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+++ b/firmware/target/mips/ingenic_jz47xx/system-target.h
@@ -0,0 +1,103 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2008 by Maurus Cuelenaere
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#include "config.h"
23#include "jz4740.h"
24#include "mipsregs.h"
25
26/* Core-level interrupt masking */
27
28/* This one returns the old status */
29#define HIGHEST_IRQ_LEVEL 0
30
31#define set_irq_level(status) \
32 set_interrupt_status((status), ST0_IE)
33#define set_fiq_status(status) \
34 set_interrupt_status((status), ST0_IE)
35
36static inline int set_interrupt_status(int status, int mask)
37{
38 unsigned int res, oldstatus;
39
40 res = oldstatus = read_c0_status();
41 res &= ~mask;
42 res |= (status & mask);
43 write_c0_status(res);
44
45 return oldstatus;
46}
47
48static inline void enable_interrupt(void)
49{
50 /* Set IE bit */
51 set_c0_status(ST0_IE);
52}
53
54static inline void disable_interrupt(void)
55{
56 /* Clear IE bit */
57 clear_c0_status(ST0_IE);
58}
59
60#define disable_irq() \
61 disable_interrupt()
62
63#define enable_irq() \
64 enable_interrupt()
65
66#define disable_fiq() \
67 disable_interrupt()
68
69#define enable_fiq() \
70 enable_interrupt()
71
72static inline int disable_interrupt_save(int mask)
73{
74 unsigned int oldstatus;
75
76 oldstatus = read_c0_status();
77 write_c0_status(oldstatus | mask);
78
79 return oldstatus;
80}
81
82#define disable_irq_save() \
83 disable_interrupt_save(ST0_IE)
84
85#define disable_fiq_save() \
86 disable_interrupt_save(ST0_IE)
87
88static inline void restore_interrupt(int status)
89{
90 write_c0_status(status);
91}
92
93#define restore_irq(cpsr) \
94 restore_interrupt(cpsr)
95
96#define restore_fiq(cpsr) \
97 restore_interrupt(cpsr)
98
99#define swap16(x) (((x) & 0xff) << 8 | ((x) >> 8) & 0xff)
100#define swap32(x) (((x) & 0xff) << 24 | ((x) & 0xff00) << 8 | ((x) & 0xff0000) >> 8 | ((x) >> 24) & 0xff)
101
102void sti(void);
103void cli(void);