diff options
Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/system-jz4760.c')
-rw-r--r-- | firmware/target/mips/ingenic_jz47xx/system-jz4760.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/system-jz4760.c b/firmware/target/mips/ingenic_jz47xx/system-jz4760.c index eb20985b97..899b346b54 100644 --- a/firmware/target/mips/ingenic_jz47xx/system-jz4760.c +++ b/firmware/target/mips/ingenic_jz47xx/system-jz4760.c | |||
@@ -338,11 +338,11 @@ void tlb_refill_handler(void) | |||
338 | } | 338 | } |
339 | 339 | ||
340 | #ifdef USE_HW_UDELAY | 340 | #ifdef USE_HW_UDELAY |
341 | /* This enables the HW timer, set to EXT_XTAL / 16 (so @ 12MHz, 1 us = 750 ticks) */ | 341 | /* This enables the HW timer, set to EXT_XTAL / 4 (so @ 12/4 = 3MHz, 1 us = 3 ticks) */ |
342 | static void init_delaytimer(void) | 342 | static void init_delaytimer(void) |
343 | { | 343 | { |
344 | __tcu_disable_ost(); | 344 | __tcu_disable_ost(); |
345 | REG_OST_OSTCSR = OSTCSR_EXT_EN | OSTCSR_PRESCALE16 | OSTCSR_CNT_MD; | 345 | REG_OST_OSTCSR = OSTCSR_EXT_EN | OSTCSR_PRESCALE4 | OSTCSR_CNT_MD; |
346 | REG_OST_OSTCNT = 0; | 346 | REG_OST_OSTCNT = 0; |
347 | REG_OST_OSTDR = 0; | 347 | REG_OST_OSTDR = 0; |
348 | __tcu_enable_ost(); | 348 | __tcu_enable_ost(); |
@@ -353,10 +353,12 @@ void udelay(unsigned int usec) | |||
353 | if (!__tcu_ost_enabled()) | 353 | if (!__tcu_ost_enabled()) |
354 | init_delaytimer(); | 354 | init_delaytimer(); |
355 | 355 | ||
356 | unsigned int now = REG_OST_OSTCNT; | ||
357 | |||
356 | /* Figure out how many ticks we need */ | 358 | /* Figure out how many ticks we need */ |
357 | usec = (CFG_EXTAL / 16 / 1000) * (usec + 1); | 359 | usec = (CFG_EXTAL / (4 * 1000 * 1000)) * (usec + 1); |
358 | 360 | ||
359 | while (usec < REG_OST_OSTCNT) { } | 361 | while (REG_OST_OSTCNT - now < usec) { } |
360 | } | 362 | } |
361 | #else | 363 | #else |
362 | void udelay(unsigned int usec) | 364 | void udelay(unsigned int usec) |