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path: root/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c
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Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c')
-rw-r--r--firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c25
1 files changed, 11 insertions, 14 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c b/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c
index 5549ce4dbf..e4d9127c21 100644
--- a/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c
@@ -35,6 +35,11 @@
35void pcm_postinit(void) 35void pcm_postinit(void)
36{ 36{
37 audiohw_postinit(); 37 audiohw_postinit();
38
39 /* playback sample:16 bits, burst:16 bytes */
40 __i2s_set_transmit_trigger(4);
41 __i2s_set_oss_sample_size(16);
42
38 pcm_apply_settings(); 43 pcm_apply_settings();
39} 44}
40 45
@@ -53,11 +58,6 @@ void pcm_play_dma_init(void)
53 audiohw_init(); 58 audiohw_init();
54} 59}
55 60
56void pcm_apply_settings(void)
57{
58 /* TODO */
59}
60
61void pcm_set_frequency(unsigned int frequency) 61void pcm_set_frequency(unsigned int frequency)
62{ 62{
63 (void) frequency; 63 (void) frequency;
@@ -71,10 +71,8 @@ void pcm_set_frequency(unsigned int frequency)
71 71
72static void play_start_pcm(void) 72static void play_start_pcm(void)
73{ 73{
74 pcm_apply_settings(); 74 __i2s_enable_transmit_dma();
75 75 __i2s_enable_replay();
76 __aic_enable_transmit_dma();
77 __aic_enable_replay();
78 76
79 REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) |= DMAC_DCCSR_EN; 77 REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) |= DMAC_DCCSR_EN;
80} 78}
@@ -83,18 +81,18 @@ static void play_stop_pcm(void)
83{ 81{
84 REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) = (REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) | DMAC_DCCSR_HLT) & ~DMAC_DCCSR_EN; 82 REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) = (REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) | DMAC_DCCSR_HLT) & ~DMAC_DCCSR_EN;
85 83
86 __aic_disable_transmit_dma(); 84 __i2s_disable_transmit_dma();
87 __aic_disable_replay(); 85 __i2s_disable_replay();
88} 86}
89 87
90void pcm_play_dma_start(const void *addr, size_t size) 88void pcm_play_dma_start(const void *addr, size_t size)
91{ 89{
92 REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) = 0; 90 REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) = DMAC_DCCSR_NDES;
93 REG_DMAC_DSAR(DMA_AIC_TX_CHANNEL) = PHYSADDR((unsigned long)addr); 91 REG_DMAC_DSAR(DMA_AIC_TX_CHANNEL) = PHYSADDR((unsigned long)addr);
94 REG_DMAC_DTAR(DMA_AIC_TX_CHANNEL) = PHYSADDR((unsigned long)AIC_DR); 92 REG_DMAC_DTAR(DMA_AIC_TX_CHANNEL) = PHYSADDR((unsigned long)AIC_DR);
95 REG_DMAC_DTCR(DMA_AIC_TX_CHANNEL) = size; 93 REG_DMAC_DTCR(DMA_AIC_TX_CHANNEL) = size;
96 REG_DMAC_DRSR(DMA_AIC_TX_CHANNEL) = DMAC_DRSR_RS_AICOUT; 94 REG_DMAC_DRSR(DMA_AIC_TX_CHANNEL) = DMAC_DRSR_RS_AICOUT;
97 REG_DMAC_DCMD(DMA_AIC_TX_CHANNEL) = ( DMAC_DCMD_SAI| DMAC_DCMD_DAI | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DS_32BIT | DMAC_DCMD_DWDH_32 95 REG_DMAC_DCMD(DMA_AIC_TX_CHANNEL) = ( DMAC_DCMD_SAI| DMAC_DCMD_SWDH_32 | DMAC_DCMD_DS_32BIT | DMAC_DCMD_DWDH_32
98 | DMAC_DCMD_TIE); 96 | DMAC_DCMD_TIE);
99 97
100 play_start_pcm(); 98 play_start_pcm();
@@ -134,7 +132,6 @@ void pcm_play_dma_pause(bool pause)
134 play_stop_pcm(); 132 play_stop_pcm();
135 else 133 else
136 play_start_pcm(); 134 play_start_pcm();
137
138} 135}
139 136
140#ifdef HAVE_RECORDING 137#ifdef HAVE_RECORDING