diff options
Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c')
-rw-r--r-- | firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c b/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c index 7a937bf7cf..979a9067d3 100644 --- a/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c +++ b/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include "nand_id.h" | 26 | #include "nand_id.h" |
27 | #include "system.h" | 27 | #include "system.h" |
28 | #include "panic.h" | 28 | #include "panic.h" |
29 | #include "kernel.h" | ||
29 | 30 | ||
30 | /* | 31 | /* |
31 | * Standard NAND flash commands | 32 | * Standard NAND flash commands |
@@ -104,6 +105,7 @@ struct nand_param | |||
104 | 105 | ||
105 | static struct nand_info* chip_info = NULL; | 106 | static struct nand_info* chip_info = NULL; |
106 | static struct nand_param internal_param; | 107 | static struct nand_param internal_param; |
108 | static struct mutex nand_mtx; | ||
107 | 109 | ||
108 | static inline void jz_nand_wait_ready(void) | 110 | static inline void jz_nand_wait_ready(void) |
109 | { | 111 | { |
@@ -132,6 +134,8 @@ static inline void jz_nand_read_buf8(void *buf, int count) | |||
132 | 134 | ||
133 | static void jz_nand_write_dma(void *source, unsigned int len, int bw) | 135 | static void jz_nand_write_dma(void *source, unsigned int len, int bw) |
134 | { | 136 | { |
137 | mutex_lock(&nand_mtx); | ||
138 | |||
135 | if(((unsigned int)source < 0xa0000000) && len) | 139 | if(((unsigned int)source < 0xa0000000) && len) |
136 | dma_cache_wback_inv((unsigned long)source, len); | 140 | dma_cache_wback_inv((unsigned long)source, len); |
137 | 141 | ||
@@ -146,10 +150,14 @@ static void jz_nand_write_dma(void *source, unsigned int len, int bw) | |||
146 | REG_DMAC_DCCSR(DMA_NAND_CHANNEL) = (DMAC_DCCSR_EN | DMAC_DCCSR_NDES); | 150 | REG_DMAC_DCCSR(DMA_NAND_CHANNEL) = (DMAC_DCCSR_EN | DMAC_DCCSR_NDES); |
147 | while( REG_DMAC_DTCR(DMA_NAND_CHANNEL) ) | 151 | while( REG_DMAC_DTCR(DMA_NAND_CHANNEL) ) |
148 | yield(); | 152 | yield(); |
153 | |||
154 | mutex_unlock(&nand_mtx); | ||
149 | } | 155 | } |
150 | 156 | ||
151 | static void jz_nand_read_dma(void *target, unsigned int len, int bw) | 157 | static void jz_nand_read_dma(void *target, unsigned int len, int bw) |
152 | { | 158 | { |
159 | mutex_lock(&nand_mtx); | ||
160 | |||
153 | if(((unsigned int)target < 0xa0000000) && len) | 161 | if(((unsigned int)target < 0xa0000000) && len) |
154 | dma_cache_wback_inv((unsigned long)target, len); | 162 | dma_cache_wback_inv((unsigned long)target, len); |
155 | 163 | ||
@@ -163,6 +171,8 @@ static void jz_nand_read_dma(void *target, unsigned int len, int bw) | |||
163 | REG_DMAC_DCCSR(DMA_NAND_CHANNEL) = (DMAC_DCCSR_EN | DMAC_DCCSR_NDES); | 171 | REG_DMAC_DCCSR(DMA_NAND_CHANNEL) = (DMAC_DCCSR_EN | DMAC_DCCSR_NDES); |
164 | while( REG_DMAC_DTCR(DMA_NAND_CHANNEL) ) | 172 | while( REG_DMAC_DTCR(DMA_NAND_CHANNEL) ) |
165 | yield(); | 173 | yield(); |
174 | |||
175 | mutex_unlock(&nand_mtx); | ||
166 | } | 176 | } |
167 | 177 | ||
168 | static inline void jz_nand_read_buf(void *buf, int count, int bw) | 178 | static inline void jz_nand_read_buf(void *buf, int count, int bw) |
@@ -433,6 +443,8 @@ static int jz_nand_init(void) | |||
433 | internal_param.oob_size = chip_info->page_size/32; | 443 | internal_param.oob_size = chip_info->page_size/32; |
434 | internal_param.page_per_block = chip_info->pages_per_block; | 444 | internal_param.page_per_block = chip_info->pages_per_block; |
435 | 445 | ||
446 | mutex_init(&nand_mtx); | ||
447 | |||
436 | return 0; | 448 | return 0; |
437 | } | 449 | } |
438 | 450 | ||