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Diffstat (limited to 'firmware/target/hosted/samsungypr/gpio-ypr.h')
-rw-r--r--firmware/target/hosted/samsungypr/gpio-ypr.h201
1 files changed, 201 insertions, 0 deletions
diff --git a/firmware/target/hosted/samsungypr/gpio-ypr.h b/firmware/target/hosted/samsungypr/gpio-ypr.h
new file mode 100644
index 0000000000..c10991e20c
--- /dev/null
+++ b/firmware/target/hosted/samsungypr/gpio-ypr.h
@@ -0,0 +1,201 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 *
9 * Copyright (C) 2013 Lorenzo Miori
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version 2
14 * of the License, or (at your option) any later version.
15 *
16 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
17 * KIND, either express or implied.
18 *
19 ****************************************************************************/
20
21#ifndef __DEV_GPIO_IOCTL_H__
22#define __DEV_GPIO_IOCTL_H__
23
24/* Specifies device name and ioctl magic */
25#include "gpio-target.h"
26#include "sys/ioctl.h"
27
28struct gpio_info {
29 int num;
30 int mode;
31 int val;
32} __attribute__((packed));
33
34#define E_IOCTL_GPIO_SET_MUX 0
35#define E_IOCTL_GPIO_UNSET_MUX 1
36#define E_IOCTL_GPIO_SET_TYPE 2
37#define E_IOCTL_GPIO_SET_OUTPUT 3
38#define E_IOCTL_GPIO_SET_INPUT 4
39#define E_IOCTL_GPIO_SET_HIGH 5
40#define E_IOCTL_GPIO_SET_LOW 6
41#define E_IOCTL_GPIO_GET_VAL 7
42#define E_IOCTL_GPIO_IS_HIGH 8
43#define E_IOCTL_GPIO_MAX_NR 9
44
45#define DEV_CTRL_GPIO_SET_MUX _IOW(GPIO_IOCTL_MAGIC, 0, struct gpio_info)
46#define DEV_CTRL_GPIO_UNSET_MUX _IOW(GPIO_IOCTL_MAGIC, 1, struct gpio_info)
47#define DEV_CTRL_GPIO_SET_TYPE _IOW(GPIO_IOCTL_MAGIC, 2, struct gpio_info)
48#define DEV_CTRL_GPIO_SET_OUTPUT _IOW(GPIO_IOCTL_MAGIC, 3, struct gpio_info)
49#define DEV_CTRL_GPIO_SET_INPUT _IOW(GPIO_IOCTL_MAGIC, 4, struct gpio_info)
50#define DEV_CTRL_GPIO_SET_HIGH _IOW(GPIO_IOCTL_MAGIC, 5, struct gpio_info)
51#define DEV_CTRL_GPIO_SET_LOW _IOW(GPIO_IOCTL_MAGIC, 6, struct gpio_info)
52#define DEV_CTRL_GPIO_GET_VAL _IOW(GPIO_IOCTL_MAGIC, 7, struct gpio_info)
53#define DEV_CTRL_GPIO_IS_HIGH _IOW(GPIO_IOCTL_MAGIC, 8, struct gpio_info)
54
55enum
56{
57 GPIO1_0 = 0, /* GPIO group 1 start */
58 GPIO1_1,
59 GPIO1_2,
60 GPIO1_3,
61 GPIO1_4,
62 GPIO1_5,
63 GPIO1_6,
64 GPIO1_7,
65 GPIO1_8,
66 GPIO1_9,
67 GPIO1_10,
68 GPIO1_11,
69 GPIO1_12,
70 GPIO1_13,
71 GPIO1_14,
72 GPIO1_15,
73 GPIO1_16,
74 GPIO1_17,
75 GPIO1_18,
76 GPIO1_19,
77 GPIO1_20,
78 GPIO1_21,
79 GPIO1_22,
80 GPIO1_23,
81 GPIO1_24,
82 GPIO1_25,
83 GPIO1_26,
84 GPIO1_27,
85 GPIO1_28,
86 GPIO1_29,
87 GPIO1_30,
88 GPIO1_31,
89 GPIO2_0, /* GPIO group 2 start */
90 GPIO2_1,
91 GPIO2_2,
92 GPIO2_3,
93 GPIO2_4,
94 GPIO2_5,
95 GPIO2_6,
96 GPIO2_7,
97 GPIO2_8,
98 GPIO2_9,
99 GPIO2_10,
100 GPIO2_11,
101 GPIO2_12,
102 GPIO2_13,
103 GPIO2_14,
104 GPIO2_15,
105 GPIO2_16,
106 GPIO2_17,
107 GPIO2_18,
108 GPIO2_19,
109 GPIO2_20,
110 GPIO2_21,
111 GPIO2_22,
112 GPIO2_23,
113 GPIO2_24,
114 GPIO2_25,
115 GPIO2_26,
116 GPIO2_27,
117 GPIO2_28,
118 GPIO2_29,
119 GPIO2_30,
120 GPIO2_31,
121 GPIO3_0, /* GPIO group 3 start */
122 GPIO3_1,
123 GPIO3_2,
124 GPIO3_3,
125 GPIO3_4,
126 GPIO3_5,
127 GPIO3_6,
128 GPIO3_7,
129 GPIO3_8,
130 GPIO3_9,
131 GPIO3_10,
132 GPIO3_11,
133 GPIO3_12,
134 GPIO3_13,
135 GPIO3_14,
136 GPIO3_15,
137 GPIO3_16,
138 GPIO3_17,
139 GPIO3_18,
140 GPIO3_19,
141 GPIO3_20,
142 GPIO3_21,
143 GPIO3_22,
144 GPIO3_23,
145 GPIO3_24,
146 GPIO3_25,
147 GPIO3_26,
148 GPIO3_27,
149 GPIO3_28,
150 GPIO3_29,
151 GPIO3_30,
152 GPIO3_31,
153};
154
155enum
156{
157 CONFIG_ALT0,
158 CONFIG_ALT1,
159 CONFIG_ALT2,
160 CONFIG_ALT3,
161 CONFIG_ALT4,
162 CONFIG_ALT5,
163 CONFIG_ALT6,
164 CONFIG_ALT7,
165 CONFIG_GPIO,
166 CONFIG_SION = 0x01 << 4,
167 CONFIG_DEFAULT
168};
169
170enum
171{
172 PAD_CTL_SRE_SLOW = 0x0 << 0,
173 PAD_CTL_SRE_FAST = 0x1 << 0,
174 PAD_CTL_DRV_LOW = 0x0 << 1,
175 PAD_CTL_DRV_MEDIUM = 0x1 << 1,
176 PAD_CTL_DRV_HIGH = 0x2 << 1,
177 PAD_CTL_DRV_MAX = 0x3 << 1,
178 PAD_CTL_ODE_OPENDRAIN_NONE = 0x0 << 3,
179 PAD_CTL_ODE_OPENDRAIN_ENABLE = 0x1 << 3,
180 PAD_CTL_100K_PD = 0x0 << 4,
181 PAD_CTL_47K_PU = 0x1 << 4,
182 PAD_CTL_100K_PU = 0x2 << 4,
183 PAD_CTL_22K_PU = 0x3 << 4,
184 PAD_CTL_PUE_KEEPER = 0x0 << 6,
185 PAD_CTL_PUE_PULL = 0x1 << 6,
186 PAD_CTL_PKE_NONE = 0x0 << 7,
187 PAD_CTL_PKE_ENABLE = 0x1 << 7,
188 PAD_CTL_HYS_NONE = 0x0 << 8,
189 PAD_CTL_HYS_ENABLE = 0x1 << 8,
190 PAD_CTL_DDR_INPUT_CMOS = 0x0 << 9,
191 PAD_CTL_DDR_INPUT_DDR = 0x1 << 9,
192 PAD_CTL_DRV_VOT_LOW = 0x0 << 13,
193 PAD_CTL_DRV_VOT_HIGH = 0x1 << 13,
194};
195
196void gpio_init(void);
197void gpio_close(void);
198int gpio_control_struct(int request, struct gpio_info pin);
199int gpio_control(int request, int num, int mode, int val);
200
201#endif
generated by cgit v1.2.3 (git 2.39.1) at 2024-09-20 00:42:51 +0000