diff options
Diffstat (limited to 'firmware/target/coldfire')
-rw-r--r-- | firmware/target/coldfire/timer-coldfire.c | 6 | ||||
-rw-r--r-- | firmware/target/coldfire/timer-target.h | 13 |
2 files changed, 3 insertions, 16 deletions
diff --git a/firmware/target/coldfire/timer-coldfire.c b/firmware/target/coldfire/timer-coldfire.c index ef9fd9ea7a..0916ebedf7 100644 --- a/firmware/target/coldfire/timer-coldfire.c +++ b/firmware/target/coldfire/timer-coldfire.c | |||
@@ -37,7 +37,7 @@ void TIMER1(void) | |||
37 | TER1 = 0xff; /* clear all events */ | 37 | TER1 = 0xff; /* clear all events */ |
38 | } | 38 | } |
39 | 39 | ||
40 | bool __timer_set(long cycles, bool start) | 40 | bool timer_set(long cycles, bool start) |
41 | { | 41 | { |
42 | int phi = 0; /* bits for the prescaler */ | 42 | int phi = 0; /* bits for the prescaler */ |
43 | int prescale = 1; | 43 | int prescale = 1; |
@@ -87,7 +87,7 @@ bool __timer_set(long cycles, bool start) | |||
87 | return true; | 87 | return true; |
88 | } | 88 | } |
89 | 89 | ||
90 | bool __timer_start(void) | 90 | bool timer_start(void) |
91 | { | 91 | { |
92 | ICR2 = 0x90; /* interrupt on level 4.0 */ | 92 | ICR2 = 0x90; /* interrupt on level 4.0 */ |
93 | and_l(~(1<<10), &IMR); | 93 | and_l(~(1<<10), &IMR); |
@@ -95,7 +95,7 @@ bool __timer_start(void) | |||
95 | return true; | 95 | return true; |
96 | } | 96 | } |
97 | 97 | ||
98 | void __timer_stop(void) | 98 | void timer_stop(void) |
99 | { | 99 | { |
100 | TMR1 = 0; /* disable timer 1 */ | 100 | TMR1 = 0; /* disable timer 1 */ |
101 | or_l((1<<10), &IMR); /* disable interrupt */ | 101 | or_l((1<<10), &IMR); /* disable interrupt */ |
diff --git a/firmware/target/coldfire/timer-target.h b/firmware/target/coldfire/timer-target.h index 29488887e8..3aff57de9e 100644 --- a/firmware/target/coldfire/timer-target.h +++ b/firmware/target/coldfire/timer-target.h | |||
@@ -21,20 +21,7 @@ | |||
21 | #ifndef TIMER_TARGET_H | 21 | #ifndef TIMER_TARGET_H |
22 | #define TIMER_TARGET_H | 22 | #define TIMER_TARGET_H |
23 | 23 | ||
24 | bool __timer_set(long cycles, bool start); | ||
25 | bool __timer_start(void); | ||
26 | void __timer_stop(void); | ||
27 | |||
28 | /* timer is based on busclk == cpuclk/2 */ | 24 | /* timer is based on busclk == cpuclk/2 */ |
29 | #define TIMER_FREQ (CPU_FREQ/2) | 25 | #define TIMER_FREQ (CPU_FREQ/2) |
30 | 26 | ||
31 | #define __TIMER_SET(cycles, set) \ | ||
32 | __timer_set(cycles, set) | ||
33 | |||
34 | #define __TIMER_START() \ | ||
35 | __timer_start() | ||
36 | |||
37 | #define __TIMER_STOP(...) \ | ||
38 | __timer_stop() | ||
39 | |||
40 | #endif /* TIMER_TARGET_H */ | 27 | #endif /* TIMER_TARGET_H */ |