diff options
Diffstat (limited to 'firmware/target/coldfire/crt0.S')
-rw-r--r-- | firmware/target/coldfire/crt0.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/firmware/target/coldfire/crt0.S b/firmware/target/coldfire/crt0.S index 7734970ff0..e6717710b1 100644 --- a/firmware/target/coldfire/crt0.S +++ b/firmware/target/coldfire/crt0.S | |||
@@ -138,7 +138,7 @@ start: | |||
138 | 138 | ||
139 | /* Set up the DRAM controller. The refresh is based on the 11.2896MHz | 139 | /* Set up the DRAM controller. The refresh is based on the 11.2896MHz |
140 | clock (5.6448MHz bus frequency). We haven't yet started the PLL */ | 140 | clock (5.6448MHz bus frequency). We haven't yet started the PLL */ |
141 | #if MEM < 32 | 141 | #if MEMORYSIZE < 32 |
142 | move.w #0x8004,%d0 /* DCR - Synchronous, 80 cycle refresh */ | 142 | move.w #0x8004,%d0 /* DCR - Synchronous, 80 cycle refresh */ |
143 | #else | 143 | #else |
144 | move.w #0x8001,%d0 /* DCR - Synchronous, 32 cycle refresh */ | 144 | move.w #0x8001,%d0 /* DCR - Synchronous, 32 cycle refresh */ |
@@ -153,7 +153,7 @@ start: | |||
153 | In our case this means that we set the base address 16M ahead and | 153 | In our case this means that we set the base address 16M ahead and |
154 | use a 64M mask. | 154 | use a 64M mask. |
155 | */ | 155 | */ |
156 | #if MEM < 32 | 156 | #if MEMORYSIZE < 32 |
157 | move.l #0x31002324,%d0 /* DACR0 - Base 0x31000000, Banks on 21 and up, | 157 | move.l #0x31002324,%d0 /* DACR0 - Base 0x31000000, Banks on 21 and up, |
158 | CAS latency 2, Page mode, No refresh yet */ | 158 | CAS latency 2, Page mode, No refresh yet */ |
159 | move.l %d0,(0x108,%a0) | 159 | move.l %d0,(0x108,%a0) |