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-rw-r--r--firmware/target/arm/as3525/pcm-as3525.c11
-rw-r--r--firmware/target/arm/audio-pp.c18
-rw-r--r--firmware/target/arm/i2s-pp.c14
-rw-r--r--firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c75
-rw-r--r--firmware/target/arm/pcm-pp.c56
-rw-r--r--firmware/target/arm/pcm-telechips.c13
-rw-r--r--firmware/target/arm/pnx0101/pcm-pnx0101.c13
-rw-r--r--firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c59
-rw-r--r--firmware/target/arm/tms320dm320/creative-zvm/pcm-creativezvm.c33
-rw-r--r--[-rwxr-xr-x]firmware/target/arm/tms320dm320/mrobe-500/pcm-mr500.c8
10 files changed, 49 insertions, 251 deletions
diff --git a/firmware/target/arm/as3525/pcm-as3525.c b/firmware/target/arm/as3525/pcm-as3525.c
index d47f80ae77..fe694e0967 100644
--- a/firmware/target/arm/as3525/pcm-as3525.c
+++ b/firmware/target/arm/as3525/pcm-as3525.c
@@ -138,8 +138,10 @@ void pcm_postinit(void)
138 pcm_apply_settings(); 138 pcm_apply_settings();
139} 139}
140 140
141void pcm_set_frequency(unsigned int frequency) 141void pcm_dma_apply_settings(void)
142{ 142{
143 unsigned long frequency = pcm_sampr;
144
143 const int divider = (((AS3525_PLLA_FREQ/128) + (frequency/2)) / frequency) - 1; 145 const int divider = (((AS3525_PLLA_FREQ/128) + (frequency/2)) / frequency) - 1;
144 if(divider < 0 || divider > 511) 146 if(divider < 0 || divider > 511)
145 panicf("unsupported frequency %d", frequency); 147 panicf("unsupported frequency %d", frequency);
@@ -147,13 +149,6 @@ void pcm_set_frequency(unsigned int frequency)
147 CGU_AUDIO &= ~(((511 ^ divider) << 2) /* I2SOUT */ 149 CGU_AUDIO &= ~(((511 ^ divider) << 2) /* I2SOUT */
148 /*| ((511 ^ divider) << 14) */ /* I2SIN */ 150 /*| ((511 ^ divider) << 14) */ /* I2SIN */
149 ); 151 );
150
151 pcm_curr_sampr = frequency;
152}
153
154void pcm_apply_settings(void)
155{
156 pcm_set_frequency(HW_SAMPR_DEFAULT);
157} 152}
158 153
159size_t pcm_get_bytes_waiting(void) 154size_t pcm_get_bytes_waiting(void)
diff --git a/firmware/target/arm/audio-pp.c b/firmware/target/arm/audio-pp.c
index ba52118e0f..b170518af4 100644
--- a/firmware/target/arm/audio-pp.c
+++ b/firmware/target/arm/audio-pp.c
@@ -40,6 +40,23 @@ void audio_input_mux(int source, unsigned flags)
40 static bool last_recording = false; 40 static bool last_recording = false;
41#endif 41#endif
42 42
43#if defined(IPOD_COLOR) || defined (IPOD_4G)
44 /* The usual magic from IPL - I'm guessing this configures the headphone
45 socket to be input or output. */
46 if (recording && source != AUDIO_SRC_PLAYBACK)
47 {
48 /* input */
49 GPIO_CLEAR_BITWISE(GPIOI_OUTPUT_VAL, 0x40);
50 GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_VAL, 0x04);
51 }
52 else
53 {
54 /* output */
55 GPIO_SET_BITWISE(GPIOI_OUTPUT_VAL, 0x40);
56 GPIO_SET_BITWISE(GPIOA_OUTPUT_VAL, 0x04);
57 }
58#endif /* IPOD_COLOR || IPOD_4G */
59
43 switch (source) 60 switch (source)
44 { 61 {
45 default: /* playback - no recording */ 62 default: /* playback - no recording */
@@ -109,4 +126,3 @@ void audio_input_mux(int source, unsigned flags)
109 last_source = source; 126 last_source = source;
110} /* audio_input_mux */ 127} /* audio_input_mux */
111#endif /* INPUT_SRC_CAPS != 0 */ 128#endif /* INPUT_SRC_CAPS != 0 */
112
diff --git a/firmware/target/arm/i2s-pp.c b/firmware/target/arm/i2s-pp.c
index c96a559a8a..81c1fa1265 100644
--- a/firmware/target/arm/i2s-pp.c
+++ b/firmware/target/arm/i2s-pp.c
@@ -25,28 +25,22 @@
25 * KIND, either express or implied. 25 * KIND, either express or implied.
26 * 26 *
27 ****************************************************************************/ 27 ****************************************************************************/
28
29#include "system.h" 28#include "system.h"
30#include "cpu.h" 29#include "cpu.h"
31#include "i2s.h" 30#include "i2s.h"
32 31
33/* TODO: Add in PP5002 defs */
34#if CONFIG_CPU == PP5002 32#if CONFIG_CPU == PP5002
35void i2s_reset(void) 33void i2s_reset(void)
36{ 34{
37 /* I2S device reset */ 35 /* I2S device reset */
38 DEV_RS |= 0x80; 36 DEV_RS |= DEV_I2S;
39 DEV_RS &= ~0x80; 37 DEV_RS &= ~DEV_I2S;
40 38
41 /* I2S controller enable */ 39 /* I2S controller enable */
42 IISCONFIG |= 1; 40 IISCONFIG |= IIS_ENABLE;
43
44 /* BIT.FORMAT [11:10] = I2S (default) */
45 /* BIT.SIZE [9:8] = 24bit */
46 /* FIFO.FORMAT = 24 bit LSB */
47 41
48 /* reset DAC and ADC fifo */ 42 /* reset DAC and ADC fifo */
49 IISFIFO_CFG |= 0x30000; 43 IISFIFO_CFG |= IIS_RXCLR | IIS_TXCLR;
50} 44}
51#else /* PP502X */ 45#else /* PP502X */
52 46
diff --git a/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c b/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c
index 99aa66a781..48f7f608d9 100644
--- a/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c
+++ b/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c
@@ -37,9 +37,6 @@ struct dma_data
37 int state; 37 int state;
38}; 38};
39 39
40static unsigned long pcm_freq; /* 44.1 is default */
41static int sr_ctrl;
42
43static struct dma_data dma_play_data = 40static struct dma_data dma_play_data =
44{ 41{
45 /* Initialize to a locked, stopped state */ 42 /* Initialize to a locked, stopped state */
@@ -67,15 +64,6 @@ void pcm_play_unlock(void)
67 } 64 }
68} 65}
69 66
70static void _pcm_apply_settings(void)
71{
72 if (pcm_freq != pcm_curr_sampr)
73 {
74 pcm_curr_sampr = pcm_freq;
75 audiohw_set_frequency(sr_ctrl);
76 }
77}
78
79static void __attribute__((interrupt("IRQ"))) SSI1_HANDLER(void) 67static void __attribute__((interrupt("IRQ"))) SSI1_HANDLER(void)
80{ 68{
81 register pcm_more_callback_type get_more; 69 register pcm_more_callback_type get_more;
@@ -109,19 +97,9 @@ static void __attribute__((interrupt("IRQ"))) SSI1_HANDLER(void)
109 pcm_play_dma_stopped_callback(); 97 pcm_play_dma_stopped_callback();
110} 98}
111 99
112void pcm_apply_settings(void) 100void pcm_dma_apply_settings(void)
113{ 101{
114 pcm_play_lock(); 102 audiohw_set_frequency(pcm_fsel);
115#ifdef HAVE_RECORDING
116 pcm_rec_lock();
117#endif
118
119 _pcm_apply_settings();
120
121#ifdef HAVE_RECORDING
122 pcm_rec_unlock();
123#endif
124 pcm_play_unlock();
125} 103}
126 104
127void pcm_play_dma_init(void) 105void pcm_play_dma_init(void)
@@ -214,7 +192,6 @@ void pcm_play_dma_init(void)
214 /* Enable SSI2 (codec clock) */ 192 /* Enable SSI2 (codec clock) */
215 SSI_SCR2 |= SSI_SCR_SSIEN; 193 SSI_SCR2 |= SSI_SCR_SSIEN;
216 194
217 pcm_set_frequency(HW_SAMPR_DEFAULT);
218 audiohw_init(); 195 audiohw_init();
219} 196}
220 197
@@ -230,7 +207,7 @@ static void play_start_pcm(void)
230 SSI_SCR1 &= ~SSI_SCR_TE; 207 SSI_SCR1 &= ~SSI_SCR_TE;
231 208
232 /* Apply new settings */ 209 /* Apply new settings */
233 _pcm_apply_settings(); 210 pcm_apply_settings();
234 211
235 /* Enable interrupt on unlock */ 212 /* Enable interrupt on unlock */
236 dma_play_data.state = 1; 213 dma_play_data.state = 1;
@@ -296,52 +273,6 @@ void pcm_play_dma_pause(bool pause)
296 } 273 }
297} 274}
298 275
299/* Set the pcm frequency hardware will use when play is next started or
300 when pcm_apply_settings is called. Do not apply the setting to the
301 hardware here but simply cache it. */
302void pcm_set_frequency(unsigned int frequency)
303{
304 int index;
305
306 switch (frequency)
307 {
308 case SAMPR_48:
309 index = HW_FREQ_48;
310 break;
311 case SAMPR_44:
312 index = HW_FREQ_44;
313 break;
314 case SAMPR_32:
315 index = HW_FREQ_32;
316 break;
317 case SAMPR_24:
318 index = HW_FREQ_24;
319 break;
320 case SAMPR_22:
321 index = HW_FREQ_22;
322 break;
323 case SAMPR_16:
324 index = HW_FREQ_16;
325 break;
326 case SAMPR_12:
327 index = HW_FREQ_12;
328 break;
329 case SAMPR_11:
330 index = HW_FREQ_11;
331 break;
332 case SAMPR_8:
333 index = HW_FREQ_8;
334 break;
335 default:
336 /* Invalid = default */
337 frequency = HW_SAMPR_DEFAULT;
338 index = HW_FREQ_DEFAULT;
339 }
340
341 pcm_freq = frequency;
342 sr_ctrl = index;
343}
344
345/* Return the number of bytes waiting - full L-R sample pairs only */ 276/* Return the number of bytes waiting - full L-R sample pairs only */
346size_t pcm_get_bytes_waiting(void) 277size_t pcm_get_bytes_waiting(void)
347{ 278{
diff --git a/firmware/target/arm/pcm-pp.c b/firmware/target/arm/pcm-pp.c
index deaa20b6be..e00b1d7e75 100644
--- a/firmware/target/arm/pcm-pp.c
+++ b/firmware/target/arm/pcm-pp.c
@@ -25,10 +25,7 @@
25#include "audio.h" 25#include "audio.h"
26#include "sound.h" 26#include "sound.h"
27#include "pcm.h" 27#include "pcm.h"
28 28#include "pcm_sampr.h"
29#ifdef HAVE_WM8751
30#define MROBE100_44100HZ (0x40|(0x11 << 1)|1)
31#endif
32 29
33/** DMA **/ 30/** DMA **/
34 31
@@ -87,36 +84,9 @@ static struct dma_data dma_play_data SHAREDBSS_ATTR =
87 .state = 0 84 .state = 0
88}; 85};
89 86
90static unsigned long pcm_freq SHAREDDATA_ATTR = HW_SAMPR_DEFAULT; /* 44.1 is default */ 87void pcm_dma_apply_settings(void)
91#ifdef HAVE_WM8751
92/* Samplerate control for audio codec */
93static int sr_ctrl = MROBE100_44100HZ;
94#endif
95
96void pcm_set_frequency(unsigned int frequency)
97{
98#if defined(HAVE_WM8731) || defined(HAVE_WM8721)
99 pcm_freq = frequency;
100#else
101 (void)frequency;
102 pcm_freq = HW_SAMPR_DEFAULT;
103#endif
104#ifdef HAVE_WM8751
105 sr_ctrl = MROBE100_44100HZ;
106#endif
107}
108
109void pcm_apply_settings(void)
110{ 88{
111#ifdef HAVE_WM8751 89 audiohw_set_frequency(pcm_fsel);
112 audiohw_set_frequency(sr_ctrl);
113#endif
114
115#if defined(HAVE_WM8711) || defined(HAVE_WM8721) \
116 || defined(HAVE_WM8731)
117 audiohw_set_sample_rate(pcm_freq);
118#endif
119 pcm_curr_sampr = pcm_freq;
120} 90}
121 91
122/* ASM optimised FIQ handler. Checks for the minimum allowed loop cycles by 92/* ASM optimised FIQ handler. Checks for the minimum allowed loop cycles by
@@ -330,9 +300,7 @@ static void play_stop_pcm(void)
330 IIS_IRQTX_REG &= ~IIS_IRQTX; 300 IIS_IRQTX_REG &= ~IIS_IRQTX;
331 301
332 /* Wait for FIFO to empty */ 302 /* Wait for FIFO to empty */
333#ifdef CPU_PP502x 303 while (!IIS_TX_IS_EMPTY);
334 while (IIS_TX_FREE_COUNT < 16);
335#endif
336 304
337 dma_play_data.state = 0; 305 dma_play_data.state = 0;
338} 306}
@@ -397,8 +365,6 @@ void pcm_play_dma_init(void)
397 : [iiscfg]"r"(iiscfg), [dmapd]"r"(dmapd) 365 : [iiscfg]"r"(iiscfg), [dmapd]"r"(dmapd)
398 : "r2"); 366 : "r2");
399 367
400 pcm_set_frequency(SAMPR_44);
401
402 /* Initialize default register values. */ 368 /* Initialize default register values. */
403 audiohw_init(); 369 audiohw_init();
404 370
@@ -620,24 +586,10 @@ void pcm_rec_dma_start(void *addr, size_t size)
620void pcm_rec_dma_close(void) 586void pcm_rec_dma_close(void)
621{ 587{
622 pcm_rec_dma_stop(); 588 pcm_rec_dma_stop();
623
624#if defined(IPOD_COLOR) || defined (IPOD_4G)
625 /* The usual magic from IPL - I'm guessing this configures the headphone
626 socket to be input or output - in this case, output. */
627 GPIO_SET_BITWISE(GPIOI_OUTPUT_VAL, 0x40);
628 GPIO_SET_BITWISE(GPIOA_OUTPUT_VAL, 0x04);
629#endif
630} /* pcm_close_recording */ 589} /* pcm_close_recording */
631 590
632void pcm_rec_dma_init(void) 591void pcm_rec_dma_init(void)
633{ 592{
634#if defined(IPOD_COLOR) || defined (IPOD_4G)
635 /* The usual magic from IPL - I'm guessing this configures the headphone
636 socket to be input or output - in this case, input. */
637 GPIO_CLEAR_BITWISE(GPIOI_OUTPUT_VAL, 0x40);
638 GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_VAL, 0x04);
639#endif
640
641 pcm_rec_dma_stop(); 593 pcm_rec_dma_stop();
642} /* pcm_init */ 594} /* pcm_init */
643 595
diff --git a/firmware/target/arm/pcm-telechips.c b/firmware/target/arm/pcm-telechips.c
index affad01c76..a4dc63fc56 100644
--- a/firmware/target/arm/pcm-telechips.c
+++ b/firmware/target/arm/pcm-telechips.c
@@ -58,7 +58,7 @@ struct dma_data dma_play_data SHAREDBSS_ATTR =
58 .state = 0 58 .state = 0
59}; 59};
60 60
61static unsigned long pcm_freq SHAREDDATA_ATTR = HW_SAMPR_DEFAULT; /* 44.1 is default */ 61static unsigned long pcm_sampr SHAREDDATA_ATTR = HW_SAMPR_DEFAULT; /* 44.1 is default */
62 62
63void pcm_postinit(void) 63void pcm_postinit(void)
64{ 64{
@@ -102,8 +102,6 @@ void pcm_play_dma_init(void)
102 /* Set DAI interrupts as FIQs */ 102 /* Set DAI interrupts as FIQs */
103 IRQSEL = ~(DAI_RX_IRQ_MASK | DAI_TX_IRQ_MASK); 103 IRQSEL = ~(DAI_RX_IRQ_MASK | DAI_TX_IRQ_MASK);
104 104
105 pcm_set_frequency(SAMPR_44);
106
107 /* Initialize default register values. */ 105 /* Initialize default register values. */
108 audiohw_init(); 106 audiohw_init();
109 107
@@ -113,15 +111,8 @@ void pcm_play_dma_init(void)
113#endif 111#endif
114} 112}
115 113
116void pcm_apply_settings(void) 114void pcm_dma_apply_settings(void)
117{
118 pcm_curr_sampr = pcm_freq;
119}
120
121void pcm_set_frequency(unsigned int frequency)
122{ 115{
123 (void) frequency;
124 pcm_freq = HW_SAMPR_DEFAULT;
125} 116}
126 117
127static void play_start_pcm(void) 118static void play_start_pcm(void)
diff --git a/firmware/target/arm/pnx0101/pcm-pnx0101.c b/firmware/target/arm/pnx0101/pcm-pnx0101.c
index 4f90c5f829..20fca48039 100644
--- a/firmware/target/arm/pnx0101/pcm-pnx0101.c
+++ b/firmware/target/arm/pnx0101/pcm-pnx0101.c
@@ -27,7 +27,7 @@
27short __attribute__((section(".dmabuf"))) dma_buf_left[DMA_BUF_SAMPLES]; 27short __attribute__((section(".dmabuf"))) dma_buf_left[DMA_BUF_SAMPLES];
28short __attribute__((section(".dmabuf"))) dma_buf_right[DMA_BUF_SAMPLES]; 28short __attribute__((section(".dmabuf"))) dma_buf_right[DMA_BUF_SAMPLES];
29 29
30static int pcm_freq = HW_SAMPR_DEFAULT; /* 44.1 is default */ 30static int pcm_sampr = HW_SAMPR_DEFAULT; /* 44.1 is default */
31 31
32unsigned short* p IBSS_ATTR; 32unsigned short* p IBSS_ATTR;
33size_t p_size IBSS_ATTR; 33size_t p_size IBSS_ATTR;
@@ -147,8 +147,6 @@ void pcm_init(void)
147{ 147{
148 int i; 148 int i;
149 149
150 pcm_set_frequency(HW_SAMPR_DEFAULT);
151
152 memset(dma_buf_left, 0, sizeof(dma_buf_left)); 150 memset(dma_buf_left, 0, sizeof(dma_buf_left));
153 memset(dma_buf_right, 0, sizeof(dma_buf_right)); 151 memset(dma_buf_right, 0, sizeof(dma_buf_right));
154 152
@@ -193,15 +191,8 @@ void pcm_postinit(void)
193 pcm_apply_settings(); 191 pcm_apply_settings();
194} 192}
195 193
196void pcm_set_frequency(unsigned int frequency) 194void pcm_dma_apply_settings(void)
197{
198 (void)frequency;
199 pcm_freq = HW_SAMPR_DEFAULT;
200}
201
202void pcm_apply_settings(void)
203{ 195{
204 pcm_curr_sampr = pcm_freq;
205} 196}
206 197
207size_t pcm_get_bytes_waiting(void) 198size_t pcm_get_bytes_waiting(void)
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c
index 14fbcd5cfe..315fc3bf0f 100644
--- a/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c
+++ b/firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c
@@ -26,12 +26,6 @@
26#include "sound.h" 26#include "sound.h"
27#include "file.h" 27#include "file.h"
28 28
29/* All exact rates for 16.9344MHz clock */
30#define GIGABEAT_11025HZ (0x19 << 1)
31#define GIGABEAT_22050HZ (0x1b << 1)
32#define GIGABEAT_44100HZ (0x11 << 1)
33#define GIGABEAT_88200HZ (0x1f << 1)
34
35/* PCM interrupt routine lockout */ 29/* PCM interrupt routine lockout */
36static struct 30static struct
37{ 31{
@@ -43,11 +37,6 @@ static struct
43 .state = 0, 37 .state = 0,
44}; 38};
45 39
46/* Last samplerate set by pcm_set_frequency */
47static unsigned long pcm_freq = 0; /* 44.1 is default */
48/* Samplerate control for audio codec */
49static int sr_ctrl = 0;
50
51#define FIFO_COUNT ((IISFCON >> 6) & 0x3F) 40#define FIFO_COUNT ((IISFCON >> 6) & 0x3F)
52 41
53/* Setup for the DMA controller */ 42/* Setup for the DMA controller */
@@ -57,22 +46,6 @@ static int sr_ctrl = 0;
57/* Get more data from the callback and top off the FIFO */ 46/* Get more data from the callback and top off the FIFO */
58void fiq_handler(void) __attribute__((interrupt ("FIQ"))); 47void fiq_handler(void) __attribute__((interrupt ("FIQ")));
59 48
60static void _pcm_apply_settings(void)
61{
62 if (pcm_freq != pcm_curr_sampr)
63 {
64 pcm_curr_sampr = pcm_freq;
65 audiohw_set_frequency(sr_ctrl);
66 }
67}
68
69void pcm_apply_settings(void)
70{
71 int status = disable_fiq_save();
72 _pcm_apply_settings();
73 restore_fiq(status);
74}
75
76/* Mask the DMA interrupt */ 49/* Mask the DMA interrupt */
77void pcm_play_lock(void) 50void pcm_play_lock(void)
78{ 51{
@@ -89,8 +62,6 @@ void pcm_play_unlock(void)
89 62
90void pcm_play_dma_init(void) 63void pcm_play_dma_init(void)
91{ 64{
92 pcm_set_frequency(SAMPR_44);
93
94 /* There seem to be problems when changing the IIS interface configuration 65 /* There seem to be problems when changing the IIS interface configuration
95 * when a clock is not present. 66 * when a clock is not present.
96 */ 67 */
@@ -128,13 +99,18 @@ void pcm_postinit(void)
128 pcm_apply_settings(); 99 pcm_apply_settings();
129} 100}
130 101
102void pcm_dma_apply_settings(void)
103{
104 audiohw_set_frequency(pcm_fsel);
105}
106
131/* Connect the DMA and start filling the FIFO */ 107/* Connect the DMA and start filling the FIFO */
132static void play_start_pcm(void) 108static void play_start_pcm(void)
133{ 109{
134 /* clear pending DMA interrupt */ 110 /* clear pending DMA interrupt */
135 SRCPND = DMA2_MASK; 111 SRCPND = DMA2_MASK;
136 112
137 _pcm_apply_settings(); 113 pcm_apply_settings();
138 114
139 /* Flush any pending writes */ 115 /* Flush any pending writes */
140 clean_dcache_range((void*)DISRC2, (DCON2 & 0xFFFFF) * 2); 116 clean_dcache_range((void*)DISRC2, (DCON2 & 0xFFFFF) * 2);
@@ -272,29 +248,6 @@ void fiq_handler(void)
272 } 248 }
273} 249}
274 250
275void pcm_set_frequency(unsigned int frequency)
276{
277 switch(frequency)
278 {
279 case SAMPR_11:
280 sr_ctrl = GIGABEAT_11025HZ;
281 break;
282 case SAMPR_22:
283 sr_ctrl = GIGABEAT_22050HZ;
284 break;
285 default:
286 frequency = SAMPR_44;
287 case SAMPR_44:
288 sr_ctrl = GIGABEAT_44100HZ;
289 break;
290 case SAMPR_88:
291 sr_ctrl = GIGABEAT_88200HZ;
292 break;
293 }
294
295 pcm_freq = frequency;
296}
297
298size_t pcm_get_bytes_waiting(void) 251size_t pcm_get_bytes_waiting(void)
299{ 252{
300 /* lie a little and only return full pairs */ 253 /* lie a little and only return full pairs */
diff --git a/firmware/target/arm/tms320dm320/creative-zvm/pcm-creativezvm.c b/firmware/target/arm/tms320dm320/creative-zvm/pcm-creativezvm.c
index 34425fa63d..d8c953bbce 100644
--- a/firmware/target/arm/tms320dm320/creative-zvm/pcm-creativezvm.c
+++ b/firmware/target/arm/tms320dm320/creative-zvm/pcm-creativezvm.c
@@ -28,6 +28,8 @@
28#include "audiohw.h" 28#include "audiohw.h"
29#include "dsp-target.h" 29#include "dsp-target.h"
30 30
31static int pcm_fsel = HW_FREQ_DEFAULT;
32
31void pcm_play_dma_init(void) 33void pcm_play_dma_init(void)
32{ 34{
33 IO_CLK_O1DIV = 3; 35 IO_CLK_O1DIV = 3;
@@ -37,7 +39,7 @@ void pcm_play_dma_init(void)
37 39
38 audiohw_init(); 40 audiohw_init();
39 41
40 audiohw_set_frequency(1); 42 audiohw_set_frequency(HW_FREQ_DEFAULT);
41 43
42 /* init DSP */ 44 /* init DSP */
43 dsp_init(); 45 dsp_init();
@@ -46,42 +48,21 @@ void pcm_play_dma_init(void)
46void pcm_postinit(void) 48void pcm_postinit(void)
47{ 49{
48 audiohw_postinit(); 50 audiohw_postinit();
51 pcm_apply_settings();
52
49 /* wake DSP */ 53 /* wake DSP */
50 dsp_wake(); 54 dsp_wake();
51} 55}
52 56
53/* set frequency used by the audio hardware */
54void pcm_set_frequency(unsigned int frequency)
55{
56 int index;
57
58 switch(frequency)
59 {
60 case SAMPR_11:
61 case SAMPR_22:
62 index = 0;
63 break;
64 default:
65 case SAMPR_44:
66 index = 1;
67 break;
68 case SAMPR_88:
69 index = 2;
70 break;
71 }
72
73 audiohw_set_frequency(index);
74} /* pcm_set_frequency */
75
76const void * pcm_play_dma_get_peak_buffer(int *count) 57const void * pcm_play_dma_get_peak_buffer(int *count)
77{ 58{
78 (void) count; 59 (void) count;
79 return 0; 60 return 0;
80} 61}
81 62
82void pcm_apply_settings(void) 63void pcm_dma_apply_settings(void)
83{ 64{
84 65 audiohw_set_frequency(pcm_fsel);
85} 66}
86 67
87void pcm_play_dma_start(const void *addr, size_t size) 68void pcm_play_dma_start(const void *addr, size_t size)
diff --git a/firmware/target/arm/tms320dm320/mrobe-500/pcm-mr500.c b/firmware/target/arm/tms320dm320/mrobe-500/pcm-mr500.c
index 2f0e40757b..4c9cc337a5 100755..100644
--- a/firmware/target/arm/tms320dm320/mrobe-500/pcm-mr500.c
+++ b/firmware/target/arm/tms320dm320/mrobe-500/pcm-mr500.c
@@ -41,14 +41,8 @@ void pcm_play_dma_init(void)
41 41
42} 42}
43 43
44void pcm_apply_settings(void) 44void pcm_dma_apply_settings(void)
45{ 45{
46
47}
48
49void pcm_set_frequency(unsigned int frequency)
50{
51 (void) frequency;
52} 46}
53 47
54void pcm_play_dma_start(const void *addr, size_t size) 48void pcm_play_dma_start(const void *addr, size_t size)