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-rw-r--r--firmware/target/arm/system-pp502x.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/firmware/target/arm/system-pp502x.c b/firmware/target/arm/system-pp502x.c
index 4542913d53..4fca84600b 100644
--- a/firmware/target/arm/system-pp502x.c
+++ b/firmware/target/arm/system-pp502x.c
@@ -175,7 +175,7 @@ void set_cpu_frequency(long frequency)
175 outl((inl(0x60006020) & 0x0ffffff0) | 0x10000002, 0x60006020); 175 outl((inl(0x60006020) & 0x0ffffff0) | 0x10000002, 0x60006020);
176 176
177 outl(unknown2 & 0x3fffffff, 0x600060a0); 177 outl(unknown2 & 0x3fffffff, 0x600060a0);
178 178
179 unknown1 = (138 * postmult + 255) >> 8; 179 unknown1 = (138 * postmult + 255) >> 8;
180 if (unknown1 > 15) 180 if (unknown1 > 15)
181 unknown1 = 15; 181 unknown1 = 15;
@@ -189,9 +189,10 @@ void set_cpu_frequency(long frequency)
189 outl(pll_control, 0x60006034); 189 outl(pll_control, 0x60006034);
190 udelay(500); /* wait for relock */ 190 udelay(500); /* wait for relock */
191# else /* PP5022, PP5024 */ 191# else /* PP5022, PP5024 */
192 udelay(250);
192 while (!(inl(0x6000603c) & 0x80000000)); /* wait for relock */ 193 while (!(inl(0x6000603c) & 0x80000000)); /* wait for relock */
193# endif 194# endif
194 195
195 /* Select PLL as clock source? */ 196 /* Select PLL as clock source? */
196 outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020); 197 outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020);
197 198