diff options
Diffstat (limited to 'firmware/target/arm')
-rw-r--r-- | firmware/target/arm/imx31/uart-imx31.c | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/firmware/target/arm/imx31/uart-imx31.c b/firmware/target/arm/imx31/uart-imx31.c new file mode 100644 index 0000000000..c54ac0c0ce --- /dev/null +++ b/firmware/target/arm/imx31/uart-imx31.c | |||
@@ -0,0 +1,72 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2002 by Alan Korr & Nick Robinson | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | #include <stdio.h> | ||
22 | #include <stdlib.h> | ||
23 | #include <stdarg.h> | ||
24 | |||
25 | #include "config.h" | ||
26 | #include "button.h" | ||
27 | #include "cpu.h" | ||
28 | #include "system.h" | ||
29 | #include "kernel.h" | ||
30 | #include "serial.h" | ||
31 | |||
32 | #include "serial-imx31.h" | ||
33 | |||
34 | void serial_setup(void) | ||
35 | { | ||
36 | #ifdef UART_INT /*enable UART Interrupts */ | ||
37 | UCR1_1 |= (EUARTUCR1_TRDYEN | EUARTUCR1_RRDYEN | EUARTUCR1_TXMPTYEN); | ||
38 | UCR4_1 |= (EUARTUCR4_TCEN); | ||
39 | #else /*disable UART Interrupts*/ | ||
40 | UCR1_1 &= ~(EUARTUCR1_TRDYEN | EUARTUCR1_RRDYEN | EUARTUCR1_TXMPTYEN); | ||
41 | UCR4_1 &= ~(EUARTUCR4_TCEN); | ||
42 | #endif | ||
43 | UCR1_1 |= EUARTUCR1_UARTEN; | ||
44 | UCR2_1 |= (EUARTUCR2_TXEN | EUARTUCR2_RXEN | EUARTUCR2_IRTS); | ||
45 | |||
46 | /* Tx,Rx Interrupt Trigger levels, Disable for now*/ | ||
47 | /*UFCR1 |= (UFCR1_TXTL_32 | UFCR1_RXTL_32);*/ | ||
48 | } | ||
49 | |||
50 | int tx_rdy(void) | ||
51 | { | ||
52 | if((UTS1 & EUARTUTS_TXEMPTY)) | ||
53 | return 1; | ||
54 | else | ||
55 | return 0; | ||
56 | } | ||
57 | |||
58 | /*Not ready...After first Rx, UTS1 & UTS1_RXEMPTY | ||
59 | keeps returning true*/ | ||
60 | int rx_rdy(void) | ||
61 | { | ||
62 | if(!(UTS1 & EUARTUTS_RXEMPTY)) | ||
63 | return 1; | ||
64 | else | ||
65 | return 0; | ||
66 | } | ||
67 | |||
68 | void tx_writec(unsigned char c) | ||
69 | { | ||
70 | UTXD1=(int) c; | ||
71 | } | ||
72 | |||